JPS59207741A - Cmos logical integrated circuit - Google Patents

Abstract

PURPOSE:To enable to make the input signal of an analog element the judging element of a logical circuit directly by setting the threshold voltage of specified gate circuit to a value different from the threshold voltage of other gate circuit. CONSTITUTION:A power source voltage is set as a reference voltage, for instance, the threshold voltage of an invertor gate IV9 of 5V, of a CMOS logical integrated circuit 1, is set to 3V against the threshold voltage 2.5V of other gate circuit. A reset pulse is generated when a power source is turned on. If the terminal voltage of a condenser C4 is higher than 3V, the output of IV9 obtains an L level, and a reset pulse signal 11 is not sent out from an AND gate. If the terminal voltage of C4 is lower than 3V, an H level is outputted from the IV9, and a signal 11 is generated from the circuit 10. Thus, by monitoring the analog voltage by the IV9 and making the output a gate enable signal of other input signal, function that controls reset can be incorporated in the circuit 1.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to the configuration of a CMOS T+6 logic integrated circuit, particularly a CMOB logic integrated circuit that includes not only logic elements but also analog components in a plurality of input signals. It is related to.

[Background of the invention]

For example, when the backup voltage is used to control the reception or reception of r set pulses during backup operation of a CMOS memory, or when the voltage in an analog change region that occurs at the logic level switching point of the same human input signal pulse is used. When the input signal includes a signal that requires analog elements to be used as a judgment condition, such as when it is necessary to provide a time difference in the input responses of multiple gate circuits, the conventional CMO8 logic integrated circuit , C
A comparator which takes the analog signal as an input signal and has a logic level output is provided before the input of the MO8 logic integrated circuit, and performs signal processing to make the analog input signal conform to the judgment condition of the CMO8 logic integrated circuit.

Therefore, a circuit component forming the comparator is required, which increases the circuit scale and has the drawback of preventing a CMOS logic product circuit having such an input element from being integrated into a single chip.

[Purpose of the invention]

The present invention was made in view of the above circumstances, and its purpose is to provide a CMO in which even if an input signal has an analog element, this input can be used as a judgment element of a 1G connected logic circuit.
8 logic circuits.

[Summary of the invention]

In order to achieve such an object, the present invention sets the threshold voltage of a predetermined gate circuit to a value different from the threshold voltage of other gate circuits, and Depending on the magnitude of the voltage, the output gates other input signals.

Conventionally, the threshold voltage of the C408 gate circuit has been determined by the P-Mo8 PET and N-Mo8F E
It is well known that changes can be seen by changing the process size of T, but so far only one CMO8 theory! In integrated circuits, the threshold value, that is, the criterion for determining the analog component of an input signal, was considered to be one fixed value. The present invention breaks this fixed concept. Hereinafter, the present invention will be explained in detail using Examples.

3- [Embodiments of the invention] FIG. 1 is a circuit diagram showing an embodiment of the present invention.

This is an example in which reception of a reset signal is controlled by a backup voltage.

In the figure, l is a CMO8 logic integrated circuit, which operates on the voltage difference between the first reference voltage 2 and the second reference voltage 3, but when the first reference voltage 2 is no longer applied due to power cutoff. The electric charge accumulated in the capacitor 4 is backed up by the voltage generated in the backup power supply line 6 through the resistor 5.

For this reason, when the power supply is turned on again, an initial reset pulse is generated by the differentiator circuit consisting of capacitor 7 and resistor 8, but the above voltage remains at a predetermined value or higher and backup is performed normally. If the power is turned on again in the meantime, the above reset pulse is not accepted, and the above initial reset pulse is applied only when the terminal voltage of the capacitor 4 drops and the backup operation breaks down. As shown in the figure, the terminal voltage of the capacitor 4 is monitored by the inverter gate 9.

In the above configuration, when the power supply voltage as the first reference voltage 2 is 5V and the second reference voltage 3 is OV, the threshold voltage of the inverter gate 9 is set to the threshold voltage of the other gate circuits 2. If it is set to 3■ for 5V, as shown in Figure 2(a), when the power is turned on,
A reset pulse is generated as shown in (b), but if the terminal voltage of the capacitor 4 is higher than 3V at that time, the output of the inverter 9 goes to "L" level as shown in (C) of the same figure. AND gate circuit! From 0, the same figure (d)
As shown in , the reset pulse signal 11 is not sent out.

On the other hand, if the current terminal voltage of the capacitor is less than 3V, the output of the inverter 9 will be at the "H"" level when the power is turned on, as shown in FIG. A reset pulse signal 11 as shown in FIG.
is not sent. Note that if the capacitor 4 is charged and the terminal voltage rises before the inverter gate 9 judges the terminal voltage of the capacitor 4 when the power is turned on, the above purpose cannot be achieved. ,
The charging current of the capacitor 4 is limited by the resistor 5 to prevent the terminal voltage of the capacitor 4 from rising at the moment the power is turned on. Further, the diode 12 serves to prevent the charge of the capacitor 4 from flowing out to the power supply side when the CMo 8 logic integrated circuit I is backed up by the capacitor 4. In addition, the threshold voltages of the gate circuits other than those shown in FIG. 1 of the CMO8 logic integrated circuit l are 2
．． Set it to 5V.

In this way, the threshold value of only the inverter gate 9 is set to CM
O8 logic integrated circuit! The breakdown voltage (analog voltage) is also set as the breakdown voltage for the backup operation, and the output is used to monitor the breakdown voltage (analog voltage) in the same way as when an external comparator is provided.
That is, by making the gate enable signal of the gate circuit corresponding to the initial reset signal, the function of controlling the reset during the backup operation of the cMOS logic integrated circuit 1 by the backup voltage is incorporated into the CMO8 logic integrated circuit l circuit itself. was completed.

〔Effect of the invention〕

As explained above, according to the present invention, analog (if
The threshold voltage of the gate circuit to which the signal is input is set to a value different from the threshold voltage of the gate circuit corresponding to other input signals, and the output of the corresponding gate circuit is set to a value different from the threshold voltage of the gate circuit corresponding to the other input signal. By adopting the configuration of using the gate enable signal of the circuit, the analog signal can be used as the gate enable signal of the circuit. A CMO8 logic aggregation circuit that can distinguish between different analog elements, which has never been put to practical use, can be constructed with circuit chips, and can be compared to conventional circuits with the same functions. Compared to external circuits, the number of circuit components can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing one embodiment of the present chest generator, and FIG. 2 is a timing chart for explaining its operation. 1... CMO8 logic integrated circuit, 2... First base 1 pressure, 3... Second reference voltage, 9... Inverter gate circuit (predetermined analog voltage input gate circuit input 10-, an AND gate circuit that uses the output of the inverter gate circuit 9 as an enable signal and passes a reset input signal. /+h- -----・,. (e) --1 --. Medium --------1 ---L-11

Claims (1)

[Claims] A CMO8 logic integrated circuit having a plurality of input terminals and operating between a first reference voltage and a second reference voltage,
The threshold voltage of a gate circuit corresponding to a predetermined input signal among a plurality of input signals is set to an intermediate value between the threshold voltage of other gate circuits and the first reference voltage, and A CMO8 logic 4J product circuit characterized in that an output signal is an egate enable signal of a gate circuit corresponding to another input signal, and the other input signal is gated depending on the magnitude of an analog voltage input to the gate circuit. .