JPS5920713U - gain control device - Google Patents
gain control deviceInfo
- Publication number
- JPS5920713U JPS5920713U JP11358682U JP11358682U JPS5920713U JP S5920713 U JPS5920713 U JP S5920713U JP 11358682 U JP11358682 U JP 11358682U JP 11358682 U JP11358682 U JP 11358682U JP S5920713 U JPS5920713 U JP S5920713U
- Authority
- JP
- Japan
- Prior art keywords
- gain control
- control device
- gain
- control signal
- detection pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図はこの考案の一実施例の全体の構成を示すブロッ
ク図、第２図及び第３図はこの考案の一実施例の動作説
明に用いる路線図、第４図及び第５図は可変利得回路の
構成を示す接続図及びその特性を示す路線図、第６図は
この考案の一実施例におけるプリセット手段の一例の構
成を示すブロック図、第７図及び第８図は検出回路の一
例の接続図及びその動作説明に用いる波形図、第９図及
び第１０図は検出回路の他の例の接続図及びその動作説
明に用いる波形図、第１１図はプリセット手段の他の例
の構成を示すブロック図、第１２図及び第１３図はこの
考案の他の実施例のブロック図及びその一部の具体的構
成を示す接続図である。
５ｏ−８７・・・・・・メインスイッチ、Ｓ８・・・・
・・減少スイッチ、Ｓ９・・・・・・増大スイッチ、Ｐ
ｏ〜Ｐ７・・・・・・プリセット端子、１・・・・・・
電源端子、２・・・・・・電源ライン、３・・・・・・
エンコーダ、１０・・・・・・ゲインコントロールアン
プ、２０．３６・・・・・・スイッチ、２１・・・・・
・検出回路、３１・・・・・・カウンタ。
１２ −一一一、−ｊヨｘ１
鴻 会 ＊ シＬ−ｏ
「−Figure 1 is a block diagram showing the overall configuration of an embodiment of this invention, Figures 2 and 3 are route diagrams used to explain the operation of an embodiment of this invention, and Figures 4 and 5 are variable A connection diagram showing the configuration of the gain circuit and a route diagram showing its characteristics, FIG. 6 is a block diagram showing the configuration of an example of the presetting means in an embodiment of this invention, and FIGS. 7 and 8 are examples of the detection circuit. 9 and 10 are connection diagrams of other examples of the detection circuit and waveform diagrams used to explain their operations. FIG. 11 is a configuration of another example of the presetting means. FIGS. 12 and 13 are block diagrams of other embodiments of this invention and connection diagrams showing the specific configuration of a part thereof. 5o-87... Main switch, S8...
...Decrease switch, S9...Increase switch, P
o~P7...Preset terminal, 1...
Power terminal, 2...Power line, 3...
Encoder, 10...gain control amplifier, 20.36...switch, 21...
・Detection circuit, 31...Counter. 12 -111, -jyo x1 Kokai * ShiL-o
“-
Claims (1)
号の値に応じて利得が変化する可変利得回路と、電源の
投入を検出し、検出パルスを発生する検出回路と、異な
る値の複数の利得制御信号のうちで所定のものを、上記
検出パルスの発生時にプリセットすることが可能な手段
とを備えた利得制御装置。means for generating a desired gain control signal; a variable gain circuit whose gain changes according to the value of the gain control signal; a detection circuit that detects power-on and generates a detection pulse; A gain control device comprising: means capable of presetting a predetermined one of the gain control signals at the time of generation of the detection pulse.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11358682U JPS5920713U (en) | 1982-07-27 | 1982-07-27 | gain control device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11358682U JPS5920713U (en) | 1982-07-27 | 1982-07-27 | gain control device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5920713U true JPS5920713U (en) | 1984-02-08 |
Family
ID=30262877
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11358682U Pending JPS5920713U (en) | 1982-07-27 | 1982-07-27 | gain control device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5920713U (en) |
-
1982
- 1982-07-27 JP JP11358682U patent/JPS5920713U/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS616775U (en) | Current-voltage conversion circuit | |
| JPS5920713U (en) | gain control device | |
| JPS5950115U (en) | Protection circuit for switching type amplifier | |
| JPS6040132U (en) | Phase switching circuit | |
| JPS6051737U (en) | power supply | |
| JPS5927682U (en) | Deflection correction circuit | |
| JPS58107612U (en) | AGC circuit | |
| JPS5914426U (en) | input circuit | |
| JPS582023U (en) | switching regulator | |
| JPS59164946U (en) | power control device | |
| JPS60181927U (en) | Transistor switching circuit with protection function | |
| JPS58530U (en) | AM receiver muting device | |
| JPS59183015U (en) | amplifier | |
| JPS5991053U (en) | Broadcast wave receiving device | |
| JPS6059628U (en) | signal input device | |
| JPS6093319U (en) | Amplifier muting circuit | |
| JPS60169800U (en) | Sample/hold circuit | |
| JPS5811332U (en) | Waveform shaping circuit | |
| JPS60171038U (en) | Excessive input limiter | |
| JPS60172434U (en) | Malfunction prevention circuit at startup | |
| JPS6027512U (en) | amplifier power supply | |
| JPS59147313U (en) | amplifier circuit | |
| JPS58150336U (en) | Control device | |
| JPS6030652U (en) | radar transmitter | |
| JPS59180211U (en) | Device connection switching circuit |