JPS5920312B2 - Scan speed modulation circuit - Google Patents

Scan speed modulation circuit

Info

Publication number
JPS5920312B2
JPS5920312B2 JP52082204A JP8220477A JPS5920312B2 JP S5920312 B2 JPS5920312 B2 JP S5920312B2 JP 52082204 A JP52082204 A JP 52082204A JP 8220477 A JP8220477 A JP 8220477A JP S5920312 B2 JPS5920312 B2 JP S5920312B2
Authority
JP
Japan
Prior art keywords
speed modulation
scanning speed
voltage
video signal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52082204A
Other languages
Japanese (ja)
Other versions
JPS5417622A (en
Inventor
進 辻原
克彦 山本
実 竹田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP52082204A priority Critical patent/JPS5920312B2/en
Publication of JPS5417622A publication Critical patent/JPS5417622A/en
Publication of JPS5920312B2 publication Critical patent/JPS5920312B2/en
Expired legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明はテレビジョン受像機の水平走査速度を変調して
輪郭補償を行なう走査速度変調回路に関し、電界強度に
応じて、走査速度変調による輪郭補償量を制御すること
を目的とする。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a scanning speed modulation circuit that performs contour compensation by modulating the horizontal scanning speed of a television receiver. purpose.

走査速度を変調して輪郭補償を行うことは一般曇こ知ら
れている。
It is generally known to perform contour compensation by modulating the scanning speed.

この原理を第1図の波形図を用いて簡単に説明する。同
図aの様な映像信号が加えられた時、これを一次微分し
て同図bの波形を作る。この一次微分した信号電流を主
偏向電流Aに加算して、同図cの様な走査信号を作成す
る。この加算する手段は実際に主偏向ヨークにこの一次
微分信号を流してもよいが、別に補助偏向ヨークを設け
る方が実用的である。これは主偏向ヨークには大きなフ
ライバックパルスが生じており、このパルスが走査速度
変調回路に逆流して、回路のトランジスタとして耐圧が
非常に大きいものを要することや、主偏向ヨークに高周
波の電流が流れにくいということに起因する。この様に
して主偏向電流を映像信号の一次微分波形で変調すると
偏向電波波形の傾斜の急な部分すなわち同図cC7)B
の部分では、走査速度が速くなるので映像は暗くなり、
偏光電流波形の傾斜のゆるやかな部分すなわち同図c(
7)Cの部分では走査速度が遅くなるので映像が明るく
なり、同図dの様に輪郭が強調された映像として映出さ
れる。
This principle will be briefly explained using the waveform diagram in FIG. When a video signal as shown in figure a is applied, it is first differentiated to create the waveform shown in figure b. This linearly differentiated signal current is added to the main deflection current A to create a scanning signal as shown in c in the figure. Although this adding means may actually send this first-order differential signal to the main deflection yoke, it is more practical to provide a separate auxiliary deflection yoke. This is because a large flyback pulse is generated in the main deflection yoke, and this pulse flows back into the scanning speed modulation circuit, requiring a transistor with a very high withstand voltage in the circuit, and the main deflection yoke is subject to high frequency current. This is due to the fact that it is difficult to flow. In this way, when the main deflection current is modulated by the first-order differential waveform of the video signal, the steepest part of the deflection radio waveform, i.e., cC7)B in the same figure.
In the part, the scanning speed becomes faster and the image becomes darker.
The part with a gentle slope of the polarized current waveform, i.e., c (
7) In the part C, the scanning speed becomes slower, so the image becomes brighter, and the image is displayed as an image with emphasized outlines as shown in d of the same figure.

一般に走査速度変調による輪郭補償を行う場合強電界時
すなわち画面のノイズが目立たない状態で走査速度変調
を行なつても画面でのS /Nの劣化はそれほどないが
、弱電界時、すなわち画面のノイズが目立つ状態で、走
査速度変調を行なつた場合、画面でのS/Nがかなり劣
化する。上記欠点を解決する手段として、電界強度に応
じて走査速度変調による輪郭補償量を制御させ、弱電界
時、すなわち画面のノイズが目立つ状態での走査速度変
調による輪郭補償量を減少させて、画面でのS/Nの劣
化を防止する方法が提案されている。
Generally, when contour compensation is performed by scanning speed modulation, the S/N on the screen does not deteriorate much even if scanning speed modulation is performed in a strong electric field, that is, when screen noise is not noticeable, but in a weak electric field, that is, when the screen noise is not noticeable. If scanning speed modulation is performed in a state where noise is noticeable, the S/N ratio on the screen will deteriorate considerably. As a means to solve the above drawbacks, the amount of contour compensation by scanning speed modulation is controlled according to the electric field strength, and the amount of contour compensation by scanning speed modulation is reduced when the electric field is weak, that is, when screen noise is noticeable. A method has been proposed to prevent deterioration of the S/N ratio.

第2図を用いてこの方法を詳細に説明する。図において
、1は映像信号入力端子、2はN犯人力端子、3は直流
増巾器、4はゲート回路、5は走査速度変調回路、6は
補助偏向ヨークである。
This method will be explained in detail using FIG. In the figure, 1 is a video signal input terminal, 2 is an N-force terminal, 3 is a DC amplifier, 4 is a gate circuit, 5 is a scanning speed modulation circuit, and 6 is an auxiliary deflection yoke.

入力端子2にAGC電圧を加え、直流増巾器3で基準電
圧Eoと比較し増巾する。入力端1からの映像信号をゲ
ート回路4に加えAGC電圧に応じて得られた増巾器3
の出力電圧でゲート回路4を開閉して制御している。
The AGC voltage is applied to the input terminal 2, and the DC amplifier 3 compares it with the reference voltage Eo and amplifies it. The video signal from the input terminal 1 is added to the gate circuit 4, and an amplifier 3 is obtained according to the AGC voltage.
The gate circuit 4 is controlled by opening and closing using the output voltage.

したがつて強電界時すなわち、AGC電圧が高い場合、
ゲート回路4は開き、入力端子1からの映像信号が走査
速度変調回路5に入力され走査速度変調による輪郭補償
が行なわれる。また弱電界時すなわち、AGC電圧が低
い場合、ゲート回路4は閉じるため、入力端子1からの
映像信号が走査速度変調回路5に入力されず、走査速度
変調による輪郭補償は行われない。
Therefore, when the electric field is strong, that is, when the AGC voltage is high,
The gate circuit 4 is opened, and the video signal from the input terminal 1 is input to the scanning speed modulation circuit 5, where contour compensation is performed by scanning speed modulation. Furthermore, when the electric field is weak, that is, when the AGC voltage is low, the gate circuit 4 is closed, so the video signal from the input terminal 1 is not input to the scanning speed modulation circuit 5, and contour compensation by scanning speed modulation is not performed.

上記のよう◆こAGC電圧により電界強度の伏態を検出
して弱電界時の走査速度変調による輪郭補償量を減少さ
せれば、画面でのS/Nの劣化を防止できる。
As described above, by detecting the change in electric field strength using the AGC voltage and reducing the amount of contour compensation due to scanning speed modulation in the case of a weak electric field, deterioration of S/N on the screen can be prevented.

このようにしてAGC電圧に応じて走査速度変調による
輪郭補償量を制御させる場合、AGC電圧が受像機によ
つてバラツキがあるため、第2図E。の基準電圧を各セ
ツトごとに調整する必要があつた。第3図にAGC電圧
とアンテナ入力電圧の関係を示す。イはRF,AGC電
圧、口(はIF,AGC電圧である。第3図の様にAG
C電圧の理想的なかけ方として比較的弱電界では1F回
路にだけAGC電圧をかけチユーナにはAGC電圧をか
けないでは最大利得として、雑音が少ない伏態で使用し
、一方入力電圧がある程度以上(E2以上)になつて始
めてRF.AGC電圧をかける。したがつて大きな入力
信号のときはチユーナに十分AGCがかかり、1F入力
が大きくなりすぎて1F回路か飽和しないようにしてい
る。ところで第2図の入力端子2に加えるAGC電圧と
して上記第3図でイに示したRF.AGC電圧を用いて
走査速度変調による輪郭補償を行おうとする場合、アン
テナ入力電圧がE2より低いとRF.AGC電圧が一定
となつているため、電界の強弱による輪郭補償量の制呻
は不可能である。しかもE2にぉける電界は一般に80
dBμ程度の強電界であり、輪郭補償を行なつてS/N
が劣化するほどのレベルで.はない。したがつて、IF
.AGC電圧を用いて走査速度変調回路の利得を制御す
るのが実用性がある。ところが1F.AGC電圧が10
mと非常に小さい値であり、しかも受像機でのバラツキ
に影響・されやすいため、制御が容易でなかつた。
When controlling the amount of contour compensation by scanning speed modulation in accordance with the AGC voltage in this manner, the AGC voltage varies depending on the receiver, so that the amount of contour compensation shown in FIG. 2E. It was necessary to adjust the reference voltage for each set. FIG. 3 shows the relationship between AGC voltage and antenna input voltage. A is the RF, AGC voltage, and ( is the IF, AGC voltage. As shown in Figure 3, the AG
The ideal way to apply the C voltage is to apply the AGC voltage only to the 1F circuit in a relatively weak electric field and do not apply the AGC voltage to the tuner, so use it in a hidden state with less noise as the maximum gain, and on the other hand, when the input voltage is above a certain level (E2 or higher) only when RF. Apply AGC voltage. Therefore, when there is a large input signal, AGC is applied to the tuner sufficiently to prevent the 1F input from becoming too large and saturating the 1F circuit. By the way, as the AGC voltage applied to the input terminal 2 in FIG. 2, the RF. When trying to perform contour compensation by scanning velocity modulation using AGC voltage, if the antenna input voltage is lower than E2, RF. Since the AGC voltage is constant, it is impossible to control the contour compensation amount by changing the strength of the electric field. Moreover, the electric field at E2 is generally 80
It is a strong electric field of about dBμ, and the S/N is reduced by performing contour compensation.
at such a level that it deteriorates. There isn't. Therefore, if
.. It is practical to use the AGC voltage to control the gain of the scan rate modulation circuit. However, 1F. AGC voltage is 10
Since the value of m is very small and is easily affected by variations in the receiver, it is not easy to control.

本発明は上記のような欠点を除去した走査速度変調回路
を提供するものである。
The present invention provides a scanning speed modulation circuit that eliminates the above-mentioned drawbacks.

第4図に本発明の走査速度変調回路の一実施例]を示す
FIG. 4 shows an embodiment of the scanning speed modulation circuit of the present invention.

図において、1は映像信号を加える入力端子、12は同
期信号分離回路からの同期信号が加わる入力端子、13
はゲート回路、14は利得制御回路、5は走査速度変調
回路、6は補助偏向ヨークである。ここで入力端子1に
映像信号を加えゲート回路13に導かれる。
In the figure, 1 is an input terminal to which a video signal is applied, 12 is an input terminal to which a synchronization signal from a synchronization signal separation circuit is applied, and 13
14 is a gate circuit, 14 is a gain control circuit, 5 is a scanning speed modulation circuit, and 6 is an auxiliary deflection yoke. Here, a video signal is applied to the input terminal 1 and guided to the gate circuit 13.

入力端子12に同期分離回路からの同期信号を加えてゲ
ート回路13へ導き、前記英像信号を同期信号でゲート
する。すなわち弱電界時に映像信号の同期信号内に重畳
されるノイズを同期信号の期間だけ検出する。上記検出
信号をダイオードD1とコンデンサC1で整流して直流
電圧にし、利得制御回路14の利得制御電圧とする。し
たがつて入力端子1からの映像信号を 利得制両回路4
に加え、前記直流電圧に応じて(電界強度に応じて)映
像信号の利得を制(財)して、走査速度変調回路5に加
えれば電界強度に応じて走査速度変調による輪郭補償量
を制御することができる。以下本実施例の回路の動作を
第5図、第6図を用いて詳細に説明する。強電界時には
入力端子1に第6図aの様な映像信号が加えられ、ゲー
ト回路13のゲート用トランジスタTrlのベースに導
かれ入力端子12からの同図bの同期信号をエミツタに
加えることにより、映像信号は同期信号でゲートされる
。すなわち強電界時に映像信号に重畳されるノイズを同
期信号の期間だけ検出している。上記検出信号をダイオ
一 ドD1とコンデンサC1で整流してeのような直流
電圧とする。比較的強電界のときはノイズが少ないので
この整流電圧は低くE1〔〕となる。利得制御回路14
における利得制(財)用トランジスタTr,のベースに
加ええる前記直流電圧E1と、エミツタで抵抗R1と馬
の分圧によつて得た電圧(以下基準電圧E。と呼ぶ)と
比較した場合、直流電圧E1とEOは殆んど差がないた
め、利得制御用トランジスタT,2のCE間が高インピ
ーダンスとなるため入力端子1からの映像信号は減衰せ
ずに走査速度変調回路5に導びかれる。つまり、コンデ
ンサC2を通して信号分がバイパスされる量は非常に少
ない。したがつて強電界時では比較的多くの走査速度変
調による輪郭補償量が得られる。一方弱電界時には入力
端子1に第6図Cの様にノイズが重畳された映像信号が
加えられ、ゲート用トランジスタTrlのベースに導か
れ、入力端子12からの同図bの同期信号がエミツタに
加えられるので、映像信号が同期信号でゲートされる。
A synchronization signal from a synchronization separation circuit is applied to an input terminal 12 and guided to a gate circuit 13, and the image signal is gated with the synchronization signal. That is, noise superimposed on the synchronization signal of the video signal during a weak electric field is detected only during the period of the synchronization signal. The detection signal is rectified by a diode D1 and a capacitor C1 to a DC voltage, which is used as a gain control voltage for the gain control circuit 14. Therefore, the video signal from the input terminal 1 is input to the gain control circuit 4.
In addition, if the gain of the video signal is controlled according to the DC voltage (according to the electric field strength) and added to the scanning speed modulation circuit 5, the amount of contour compensation by scanning speed modulation can be controlled according to the electric field strength. can do. The operation of the circuit of this embodiment will be explained in detail below with reference to FIGS. 5 and 6. In the case of a strong electric field, a video signal as shown in Fig. 6a is applied to the input terminal 1, guided to the base of the gate transistor Trl of the gate circuit 13, and a synchronizing signal shown in Fig. 6b from the input terminal 12 is applied to the emitter. , the video signal is gated with a synchronization signal. That is, noise superimposed on the video signal during a strong electric field is detected only during the synchronization signal period. The above detection signal is rectified by a diode D1 and a capacitor C1 to a DC voltage such as e. When the electric field is relatively strong, there is little noise, so this rectified voltage is low and becomes E1 []. Gain control circuit 14
When comparing the DC voltage E1 that can be applied to the base of the gain control transistor Tr at the emitter with the voltage obtained by dividing the resistor R1 and the voltage at the emitter (hereinafter referred to as reference voltage E), Since there is almost no difference between the DC voltages E1 and EO, there is a high impedance between the gain control transistors T and CE of the gain control transistors 2, so the video signal from the input terminal 1 is guided to the scanning speed modulation circuit 5 without being attenuated. It will be destroyed. In other words, the amount of the signal component bypassed through the capacitor C2 is very small. Therefore, in the case of a strong electric field, a relatively large amount of contour compensation can be obtained by scanning speed modulation. On the other hand, in the case of a weak electric field, a video signal with superimposed noise as shown in Fig. 6C is applied to the input terminal 1, and is guided to the base of the gate transistor Trl, and a synchronization signal shown in Fig. 6B from the input terminal 12 is sent to the emitter. The video signal is gated with the synchronization signal.

したがつて同図aの様に弱電界時に映像信号に重畳され
るノイズを同期信号の期間だけ検出される。同図dに示
す検出信号をダイオードD1とコンデンサC1で整流す
ると同図EOE2(V〕の直流電圧となる。利得制両用
トランジスタTr2のベースに加える前記直流電圧E2
と、エミツタで抵抗R1とR2の分圧によつて得た基準
電圧E。と比較した場合、直流電圧E2がかなり高いた
め、利得制御用トランジスタTr2のC−E間が低イン
ピーダンンスとなるため、入力端子1からの映像信号の
かなりの部分がコンアンサC2およびT,2を通つてバ
イパスされ走査速度変調回路5には減衰された映像信号
が導びかれる。したがつて弱電界時では比較的少ない走
査速度変調による輪郭補償量しか得られない。すなわち
、画面のノイズが日立つ弱電界時では走査速度変調によ
る輪郭補償量を減衰させて、画面でのS/Nの劣化を防
止することができる。以上のように本発明は電界強度に
応じて映像信号に重畳されるノイズの量を同期信号の期
間だけ検出し、前記検出信号を整流して直流電圧を得、
前記映像信号を利得制哩回路に加えて前記直流電圧に応
じて(電界強度に応じて)、映像信号の量を制両して、
走査速度変調回路に加えることにより電界強度に応じて
走査速度変調による輪郭補償量を制両することができる
Therefore, as shown in FIG. 3A, noise superimposed on the video signal when the electric field is weak is detected only during the period of the synchronization signal. When the detection signal shown in the figure d is rectified by the diode D1 and the capacitor C1, it becomes a DC voltage of EOE2 (V) in the figure.The DC voltage E2 is applied to the base of the gain controlling transistor Tr2.
and the reference voltage E obtained by dividing the voltage between resistors R1 and R2 at the emitter. Since the DC voltage E2 is quite high, the impedance between C and E of the gain control transistor Tr2 becomes low, so a considerable part of the video signal from the input terminal 1 passes through the converter C2 and T,2. The attenuated video signal is bypassed through the scanning speed modulation circuit 5 and guided to the scanning speed modulation circuit 5. Therefore, in the case of a weak electric field, only a relatively small amount of contour compensation can be obtained by scanning speed modulation. That is, in the case of a weak electric field when screen noise is high, the amount of contour compensation by scanning speed modulation can be attenuated to prevent deterioration of the S/N ratio on the screen. As described above, the present invention detects the amount of noise superimposed on a video signal according to the electric field strength only during the synchronization signal period, rectifies the detection signal to obtain a DC voltage,
Adding the video signal to a gain control circuit and controlling the amount of the video signal according to the DC voltage (according to electric field strength),
By adding it to the scanning speed modulation circuit, the amount of contour compensation due to scanning speed modulation can be controlled in accordance with the electric field strength.

したがつて弱電界時、すなわち画面のノイズが目立つ状
態での走査速度変調による輪郭補償量を減少させて、画
面でのS/Nの劣化を防止することができる。
Therefore, it is possible to reduce the amount of contour compensation by scanning speed modulation when the electric field is weak, that is, when noise on the screen is noticeable, thereby preventing deterioration of the S/N ratio on the screen.

また電界強度の検出手段として、AGC電圧を用いるの
でなく映像信号に重畳されるノイズの量を検出した信号
を整流して得た直流電圧で利得制御回路を動作させてい
るため受像機のバラツキを考慮しなくてもよいため、調
整の必要もない。
In addition, as a means of detecting electric field strength, the gain control circuit is operated with a DC voltage obtained by rectifying a signal that detects the amount of noise superimposed on the video signal, rather than using an AGC voltage, which eliminates variations in the receiver. Since there is no need to take this into consideration, there is no need for adjustment.

【図面の簡単な説明】[Brief explanation of drawings]

第1図A,b,c,d(は走査速度変調の原理を示す波
形図、第2図は従来の走査速度変調回路の構成を示すプ
ロツク図、第3図はAGC電圧を示す特性図、第4図は
本発明の一実施例における走査速度変調回路の構成を示
すプロツク図、第5図は同走査速度変調回路の具体的構
成を示す電気結線図、第6図a−eはその動作を示す波
形図である。 1・・・・・・映像信号入力端子、12・・・・・・同
期信号入力端子、13・・・・・・ゲート回路、14・
・・・・・利得制両回路、5・・・・・・走査速度変調
回路。
Figure 1 A, b, c, d (are waveform diagrams showing the principle of scanning speed modulation, Figure 2 is a block diagram showing the configuration of a conventional scanning speed modulation circuit, Figure 3 is a characteristic diagram showing AGC voltage, FIG. 4 is a block diagram showing the configuration of the scanning speed modulation circuit in one embodiment of the present invention, FIG. 5 is an electrical wiring diagram showing the specific configuration of the same scanning speed modulation circuit, and FIGS. 6 a to 6e show its operation. 1... Video signal input terminal, 12... Synchronization signal input terminal, 13... Gate circuit, 14.
...Gain control circuit, 5...Scanning speed modulation circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 映像信号の同期信号を検出する手段と、映像信号を
前記同期信号でゲートする手段と、前記ゲートして得ら
れた信号内に含まれる雑音成分を整流する手段と、映像
信号を走査速度変調回路に給供する手段と、走査速度変
調による輪郭補償を行うための補助偏向ヨークを含む走
査速度変調手段と、前記整流信号により走査速度変調手
段の利得を制御する手段を有する走査速度変調回路。
1 means for detecting a synchronization signal of a video signal, means for gating the video signal with the synchronization signal, means for rectifying noise components contained in the signal obtained by said gating, and scanning speed modulation for the video signal. A scanning velocity modulation circuit comprising means for supplying the scanning velocity to the circuit, scanning velocity modulation means including an auxiliary deflection yoke for performing contour compensation by scanning velocity modulation, and means for controlling the gain of the scanning velocity modulation means by the rectified signal.
JP52082204A 1977-07-08 1977-07-08 Scan speed modulation circuit Expired JPS5920312B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52082204A JPS5920312B2 (en) 1977-07-08 1977-07-08 Scan speed modulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52082204A JPS5920312B2 (en) 1977-07-08 1977-07-08 Scan speed modulation circuit

Publications (2)

Publication Number Publication Date
JPS5417622A JPS5417622A (en) 1979-02-09
JPS5920312B2 true JPS5920312B2 (en) 1984-05-12

Family

ID=13767883

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52082204A Expired JPS5920312B2 (en) 1977-07-08 1977-07-08 Scan speed modulation circuit

Country Status (1)

Country Link
JP (1) JPS5920312B2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57142466A (en) * 1981-02-27 1982-09-03 Sanyo Electric Co Motor driver for auger type ice making machine
JPS60155265U (en) * 1984-03-26 1985-10-16 シャープ株式会社 Image quality correction circuit
JP2712248B2 (en) * 1988-03-17 1998-02-10 ソニー株式会社 Speed modulation circuit
JPH0257670U (en) * 1988-10-20 1990-04-25
JPH05122558A (en) * 1991-10-25 1993-05-18 Fujitsu General Ltd Television receiver

Also Published As

Publication number Publication date
JPS5417622A (en) 1979-02-09

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