JP2993586B2 - Scan speed modulation circuit - Google Patents

Scan speed modulation circuit

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Publication number
JP2993586B2
JP2993586B2 JP5089760A JP8976093A JP2993586B2 JP 2993586 B2 JP2993586 B2 JP 2993586B2 JP 5089760 A JP5089760 A JP 5089760A JP 8976093 A JP8976093 A JP 8976093A JP 2993586 B2 JP2993586 B2 JP 2993586B2
Authority
JP
Japan
Prior art keywords
signal
video signal
scanning speed
modulation
modulation circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP5089760A
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Japanese (ja)
Other versions
JPH06303451A (en
Inventor
良典 石井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
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Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5089760A priority Critical patent/JP2993586B2/en
Publication of JPH06303451A publication Critical patent/JPH06303451A/en
Application granted granted Critical
Publication of JP2993586B2 publication Critical patent/JP2993586B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】この発明は、テレビジョン受信機
において、陰極線管(CRT)上の映像の輪郭補正に使
用される走査速度変調回路に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a scanning speed modulation circuit used in a television receiver to correct the contour of an image on a cathode ray tube (CRT).

【0002】[0002]

【従来の技術】図3は、従来のテレビジョン受信機の走
査速度変調回路の概略構成図である。図において、1は
CRT(図示せず)に配設された変調コイル、2は直流
阻止コンデンサ、3及び4は走査速度変調回路の出力段
を構成するプッシュプル回路のトランジスタ、5及び6
はドライブ段を構成するSEPP回路のトランジスタ、
7は増幅回路、8は2次微分回路である。
2. Description of the Related Art FIG. 3 is a schematic configuration diagram of a scanning speed modulation circuit of a conventional television receiver. In the figure, 1 is a modulation coil disposed on a CRT (not shown), 2 is a DC blocking capacitor, 3 and 4 are transistors of a push-pull circuit constituting an output stage of a scanning speed modulation circuit, 5 and 6
Is a transistor of the SEPP circuit constituting the drive stage,
Reference numeral 7 denotes an amplification circuit, and reference numeral 8 denotes a secondary differentiation circuit.

【0003】次に動作について説明する。まず映像信号
が2次微分回路8に入力され、輪郭信号が作られる。こ
の輪郭信号を増幅回路7で増幅し、ドライブ段のSEP
P回路で終段のプッシュプル回路をドライブする。終段
のプッシュプル回路は、変調コイル1に映像信号の1次
微分電流を流している。動作原理については、特公昭6
0ー53950号公報等に記載され公知であるのでここ
では省略する。
Next, the operation will be described. First, a video signal is input to the secondary differentiating circuit 8 to generate a contour signal. This contour signal is amplified by the amplifier circuit 7, and the SEP of the drive stage is
The final stage push-pull circuit is driven by the P circuit. The final stage push-pull circuit allows the primary differential current of the video signal to flow through the modulation coil 1. The operating principle is described in
It is described in, for example, Japanese Patent Application Laid-Open No. 0-53950 and is well-known, so that the description is omitted here.

【0004】図4に、理想的な場合のCRTのカソ−ド
の信号(図4(a))と変調コイル1に流れる電流(図
4(b))とCRT表示面での輝度出力(図4(c))
の時間関係を示す。変調コイル1に流れる電流によって
発生する磁界とCRTの水平偏向コイル(図示せず)に
流れる電流によって発生する磁界が加算され、tA 〜t
B の期間は早く走査されるため輝度としては暗くなり、
B 〜tC の期間は遅く走査されるため、輝度出力の立
上りは急峻となり明るくなる。また、映像の白→黒のト
ランジェント部においては逆に、tD 〜tE の期間は遅
く走査され輝度出力は急峻に立ち下がり、tE 〜tF
期間は早く走査され、輝度は暗くなる。このような動作
をすることで輝度出力は、見かけ上プリシュ−ト、オ−
バ−シュ−トがつきCRT表示面における映像の立上
り、立下りのトランジェント部が急峻となり、映像の鮮
鋭度が上がる。なお、映像の輪郭信号は、上記のように
映像信号を微分して得るほか、ディレイラインDLを利
用して得ることもできる。
FIG. 4 shows an ideal case of a cathode ray tube (CRT) signal (FIG. 4A), a current flowing through the modulation coil 1 (FIG. 4B), and a luminance output on the CRT display surface (FIG. 4B). 4 (c))
Shows the time relationship. The magnetic field generated by the current flowing through the modulation coil 1 and the magnetic field generated by the current flowing through the horizontal deflection coil (not shown) of the CRT are added, and t A to t A
During period B, the brightness is dark because the scanning is performed early,
Since scanning is performed slowly during the period from t B to t C , the rise of the luminance output becomes sharp and bright. Moreover, contrary to the white → black transient portion of the video, t D ~t period is scanned slowly luminance output of E falls steeply, period t E ~t F is scanned earlier, the luminance becomes dark . By performing such an operation, the luminance output is apparently pre-shot, auto-
Burst is applied, and the rising and falling transition portions of the image on the CRT display surface become steep, and the sharpness of the image is increased. It should be noted that the video contour signal can be obtained by differentiating the video signal as described above, or by using the delay line DL.

【0005】[0005]

【発明が解決しようとする課題】従来の走査速度変調回
路は以上のような構成、機能を有しているので、図4か
らも分かるようにtA 〜tB 間及びtE 〜tF 間は映像
信号としては白側へ振幅があるため、走査速度を早くし
ても輝度出力が幾分出る。このため映像の輪郭部では急
峻な輪郭がつくが、その前後に輝度が尾を引いた状態と
なり見苦しくなる欠点があった。
Since the conventional scanning speed modulation circuit has the above-described configuration and function, it can be seen from FIG. 4 that the circuit between t A and t B and between t E and t F. Since the image signal has an amplitude to the white side as a video signal, even if the scanning speed is increased, some luminance output is obtained. For this reason, a sharp outline is formed in the outline portion of the image, but the luminance has a tail before and after the outline, and there is a disadvantage that the image becomes unsightly.

【0006】この発明は上記のような問題点を解消する
ためになされたもので、映像の黒から白への立上り及び
白から黒への立下りのトランジェント部を両方とも急峻
なエッジとして表示されるような走査速度変調回路を得
ることを目的としている。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and both the transition portions of the rising edge from black to white and the falling edge from white to black are displayed as steep edges. It is intended to obtain such a scanning speed modulation circuit.

【0007】[0007]

【課題を解決するための手段】この発明に係る走査速度
変調回路は、映像信号が供給される陰極線管の水平走査
速度を磁界によって変調する変調コイルに、上記映像信
号の立上り、立下りに対応して、上記映像信号を1次微
分した1次微分信号と、この1次微分信号を遅延した遅
延信号とを、選択的に供給するようにしたものである。
A scanning speed modulation circuit according to the present invention includes a modulation coil for modulating a horizontal scanning speed of a cathode ray tube to which a video signal is supplied by a magnetic field, in response to rising and falling of the video signal. Then, a first-order differential signal obtained by first-order differentiating the video signal and a delayed signal obtained by delaying the first-order differential signal are selectively supplied.

【0008】また、この発明に係る走査速度変調回路
は、映像信号を1次微分し、上記1次微分信号を出力す
る手段と、上記1次微分信号を所定時間遅延させた遅延
信号を出力する手段と、上記1次微分信号を積分し、そ
の積分出力レベルに応じて上記1次微分信号または上記
遅延信号を選択的に切り替えて変調コイルに供給する制
御手段を備えている。
A scanning speed modulation circuit according to the present invention first-differentiates a video signal and outputs the first-order differential signal, and outputs a delayed signal obtained by delaying the first-order differential signal for a predetermined time. And a control means for integrating the primary differential signal, selectively switching the primary differential signal or the delay signal according to the integrated output level, and supplying the signal to the modulation coil.

【0009】[0009]

【作用】この発明における走査速度変調回路は、映像信
号を1次微分して得た1次微分信号を映像信号の振幅変
化の立上り部用、この1次微分信号を遅延させた遅延信
号を映像信号の振幅変化の立下り用として各々独立して
用意し、この2つの信号を選択的に切り替えることによ
り、映像振幅変化のトランジェント部は、すべて走査速
度を遅くするように変調コイルに電流を流す。また、2
つの信号を切り替える動作は、1次微分波形を積分した
積分出力にもとづいてこの積分出力レベルが0より大き
いときだけ遅延させない1次微分波形を選択するように
行なわれる。したがって切り替え動作の制御は1次微分
信号より幅広い切り換え信号によって行なわれる。
The scanning speed modulation circuit according to the present invention uses a first-order differential signal obtained by first-order differentiation of a video signal for a rising portion of an amplitude change of the video signal, and converts a delayed signal obtained by delaying the first-order differential signal into a video signal. By preparing the signals independently for the falling of the amplitude change of the signal, and selectively switching these two signals, the transient portion of the video amplitude change causes a current to flow through the modulation coil so as to slow down the scanning speed. . Also, 2
The operation of switching the two signals is performed so as to select a primary differential waveform that is not delayed only when the integrated output level is greater than 0 based on an integrated output obtained by integrating the primary differential waveform. Therefore, the switching operation is controlled by a switching signal wider than the primary differential signal.

【0010】[0010]

【実施例】実施例1.図1はこの発明の一実施例を示す
ブロック構成図である。図において、11はCRT(図
示せず)に配設された変調コイル、12は直流阻止コン
デンサ、13は映像信号(輝度信号)の入力端子、14
は映像信号を1次微分する1次微分回路、15は1次微
分信号を映像信号の立上り、立下りトランジェント部に
対応する時間だけ遅延させるディレイラインDL1、1
6はスイッチ(SW)で、1次微分回路14とディレイ
ライン15とを切り替えるように接続されている。17
はSW16の切り替え動作を制御する制御装置で、1次
微分出力を積分する積分回路を備えている。18はSW
16の出力側に接続された増幅器、19は変調コイル1
1へ電流を流すドライブ回路、20は色信号の入力端
子、21は色復調及び増幅を行う映像信号処理回路、2
2はCRTドライブ回路、23はCRT、24はディレ
イラインDL2、25は輝度信号と色信号の時間合わせ
を行うディレイラインDL3である。
[Embodiment 1] FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, reference numeral 11 denotes a modulation coil disposed on a CRT (not shown), 12 denotes a DC blocking capacitor, 13 denotes an input terminal of a video signal (luminance signal), 14
Is a first-order differentiating circuit for performing a first-order differentiation of the video signal, and 15 is a delay line DL1, 1 that delays the first-order differential signal by a time corresponding to the rising and falling transient portions of the video signal.
A switch (SW) 6 is connected to switch between the primary differentiating circuit 14 and the delay line 15. 17
Is a control device for controlling the switching operation of the SW 16 and has an integrating circuit for integrating the primary differential output. 18 is SW
An amplifier connected to the output side of 16 and 19 is a modulation coil 1
1 is a drive circuit for flowing current to 1, 20 is a color signal input terminal, 21 is a video signal processing circuit for performing color demodulation and amplification,
2, a CRT drive circuit; 23, a CRT; 24, a delay line DL2; 25, a delay line DL3 for adjusting the time of a luminance signal and a chrominance signal.

【0011】図2は各部の波形とタイミングを示してい
る。同図(a)は入力端子13の入力映像信号(輝度信
号)波形、(b)は1次微分回路14から出力される1
次微分信号波形、(c)はディレイライン15により1
次微分信号を映像信号の立上り、立下りトランジェント
部に相当する時間だけ遅延させた遅延信号波形、(d)
はSW16の切り替え動作の後の出力信号波形、(e)
はディレイライン16により映像信号を遅延させた信号
波形、(f)は速度変調コイル11に流れる電流波形、
(g)はCRT表示面における輝度出力波形、(h)は
制御装置17から出力されるSW切り替え信号である。
FIG. 2 shows the waveforms and timing of each part. 3A shows the waveform of an input video signal (luminance signal) at the input terminal 13, and FIG.
The second derivative signal waveform, (c) is 1
(D) a delayed signal waveform obtained by delaying the next differential signal by a time corresponding to the rising and falling transition portions of the video signal;
Is the output signal waveform after the switching operation of SW16, (e)
Is a signal waveform obtained by delaying the video signal by the delay line 16, (f) is a current waveform flowing through the speed modulation coil 11,
(G) is a luminance output waveform on the CRT display surface, and (h) is a SW switching signal output from the control device 17.

【0012】次に動作について説明する。まず図2
(a)のような映像信号(輝度信号)が1次微分回路1
4に入力され、図2(b)の1次微分信号が得られる。
更にこの1次微分信号を遅延させるディレイライン15
を通して図2(c)の信号が得られる。これら2つの信
号がSW16のa側、b側にそれぞれ入力される。この
SW16の切り替え動作は積分回路を含む制御装置10
によって制御される。この制御装置17はディレイ前の
1次微分信号を入力され、この1次微分信号を積分して
その積分出力レベルが正出力(0は除く)の時のみSW
16をa側に切り替え、その他の時はb側に切り替える
ように働く。SW16によって切り替えられた後の微分
信号は図2(d)に示す信号となる。この信号を増幅器
18で増幅し、ドライブ回路19で速度変調コイル11
に電流を流すと図2(d)の信号が積分されてそれより
幅の広い電流信号が流れる。その信号を図2(f)に示
す。この変調信号にCRTカソ−ドの映像信号のタイミ
ングを合わせるために、ディレイライン24によって図
2(e)に示すように映像信号が遅延される。
Next, the operation will be described. First, FIG.
A video signal (luminance signal) as shown in FIG.
4 to obtain the primary differential signal shown in FIG.
Further, a delay line 15 for delaying the primary differential signal
2 (c) is obtained. These two signals are input to a side and b side of SW16, respectively. The switching operation of the SW 16 is performed by the control device 10 including the integrating circuit.
Is controlled by The controller 17 receives the primary differential signal before the delay, integrates the primary differential signal, and switches SW only when the integrated output level is a positive output (except 0).
16 is switched to the a side, and at other times, it is switched to the b side. The differentiated signal after being switched by the SW 16 is a signal shown in FIG. This signal is amplified by an amplifier 18, and the speed modulation coil 11 is
2D, the signal shown in FIG. 2D is integrated, and a wider current signal flows. The signal is shown in FIG. In order to match the timing of the video signal of the CRT cathode with the modulated signal, the video signal is delayed by the delay line 24 as shown in FIG.

【0013】図2(f)に示すような電流を速度変調コ
イル11に流すと、図2(g)に示すように映像信号の
立上がる直前のtA 〜tB は走査が早くなり輝度出力は
下がる。次の映像信号の立上りトランジェント部のすべ
ての期間tB 〜tC 間は走査が遅くなり輝度出力は上が
る。同様に映像信号の立下りトランジェント部のtD
E 間は走査速度が遅くなり輝度出力が上がり、立下り
後のtE 〜tF 間は走査速度は早くなり輝度出力が下が
る。この結果、CRT表示面の輝度出力は全体として図
2(g)のようになり、映像信号の立上り及び立下りの
両方共、映像信号の振幅変化のトランジェント部はとも
に走査速度が遅くなり、CRT表示上で急峻なエッジと
なる。また白側のピ−クの前後を黒側へ引っ張ることに
より、輪郭が更に鮮鋭になる。
When a current as shown in FIG. 2 (f) is supplied to the velocity modulation coil 11, the scanning is accelerated from t A to t B immediately before the rising of the video signal as shown in FIG. Goes down. Between all periods t B ~t C rising transient portion of the next video signal is scanned luminance output slower rises. Similarly, t D of the falling transient portion of the video signal
During t E, the scanning speed decreases and the luminance output rises, and between t E and t F after the fall, the scanning speed increases and the luminance output decreases. As a result, the luminance output of the CRT display surface as a whole is as shown in FIG. 2 (g), and both the rising and falling of the video signal, the transient portion of the amplitude change of the video signal has a low scanning speed, and the CRT has a low scanning speed. A sharp edge appears on the display. Further, the outline is further sharpened by pulling the black side before and after the white peak.

【0014】[0014]

【発明の効果】以上のように、この発明の走査速度変調
回路によれば、映像信号の立上り及び立下りの両方共、
映像信号のトランジェント部の期間はすべて走査速度を
遅らせることができ、CRT表示面上では時間軸圧縮さ
れ周波数が上がったように見えるので、CRTに表示さ
れる映像の鮮鋭度を向上させる効果がある。また、映像
信号のトランジェント部の前後に残留したなまったCR
T表示を示す従来の表示に比較して、残留した表示部が
少なく、むしろ少し黒側に引っ張る縁取りをつけること
ができ、輪郭を一層はっきりさせることが可能となる。
As described above, according to the scanning speed modulation circuit of the present invention, both the rising and falling of the video signal
The scanning speed can be slowed down during all the transition periods of the video signal, and the time axis is compressed on the CRT display surface, so that the frequency appears to be higher, so that the sharpness of the video displayed on the CRT is improved. . Also, the CR that remains before and after the transient portion of the video signal
Compared with the conventional display showing the T display, the remaining display portion is small, and a border for pulling slightly to the black side can be provided, so that the outline can be further clarified.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の一実施例を示すブロック構成図であ
る。
FIG. 1 is a block diagram showing an embodiment of the present invention.

【図2】図1の動作を説明するためのタイミングチャ−
トである。
FIG. 2 is a timing chart for explaining the operation of FIG. 1;
It is.

【図3】従来の走査速度変調回路の一例を示す概略構成
図である。
FIG. 3 is a schematic configuration diagram illustrating an example of a conventional scanning speed modulation circuit.

【図4】従来回路の動作を説明するためのタイミングチ
ャ−トである。
FIG. 4 is a timing chart for explaining the operation of the conventional circuit.

【符号の説明】[Explanation of symbols]

11:速度変調コイル 12:直流阻止コンデンサ 13:映像信号入力端子 14:1次微分回路 15:ディレイラインDL1 16:スイッチ(SW) 17:制御装置 18:増幅器 19:ドライブ回路 20:色信号入力端子 21:映像信号処理回路 22:CRTドライブ回路 23:CRT 24:ディレイラインDL2 25:ディレイラインDL3 11: Speed modulation coil 12: DC blocking capacitor 13: Video signal input terminal 14: First-order differentiator circuit 15: Delay line DL1 16: Switch (SW) 17: Control device 18: Amplifier 19: Drive circuit 20: Color signal input terminal 21: video signal processing circuit 22: CRT drive circuit 23: CRT 24: delay line DL2 25: delay line DL3

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 映像信号が供給される陰極線管の水平走
査速度を磁界によって変調する変調コイルに、上記映像
信号の立上り、立下りに応じた変調電流を流し、陰極線
管表示面における映像の鮮鋭度を上げる走査速度変調回
路において、上記映像信号の立上り、立下りに対応し
て、上記映像信号を1次微分した1次微分信号と、この
1次微分信号を遅延した遅延信号とを、上記変調コイル
に選択的に供給するようにしたことを特徴とする走査速
度変調回路。
An image signal is supplied to a modulation coil which modulates a horizontal scanning speed of a cathode ray tube by a magnetic field, and a modulation current corresponding to the rise and fall of the video signal is supplied to sharpen an image on a cathode ray tube display surface. In a scanning speed modulation circuit for increasing the degree, a first-order differential signal obtained by first-order differentiation of the video signal and a delay signal obtained by delaying the first-order differential signal corresponding to the rising and falling of the video signal, A scanning speed modulation circuit characterized in that it is selectively supplied to a modulation coil.
【請求項2】 映像信号が供給される陰極線管の水平走
査速度を磁界によって変調する変調コイルに、上記映像
信号の立上り、立下りに応じた変調電流を流し、陰極線
管表示面における映像の鮮鋭度を上げる走査速度変調回
路において、上記映像信号を1次微分し、この1次微分
信号を出力する手段と、上記1次微分信号を上記映像信
号の立上り、立下りトランジェント部に対応する時間だ
け遅延させた遅延信号を出力する手段と、上記1次微分
信号を積分し、その積分出力レベルに応じて上記1次微
分信号または上記遅延信号を選択的に切り替えて上記変
調コイルに供給する制御手段とを備えたことを特徴とす
る走査速度変調回路。
2. A modulation current according to the rise and fall of the video signal is passed through a modulation coil that modulates the horizontal scanning speed of a cathode ray tube to which a video signal is supplied by a magnetic field, thereby sharpening an image on a cathode ray tube display surface. Means for first-differentiating the video signal and outputting the first-differential signal in a scanning speed modulation circuit for increasing the degree, and deriving the first-differential signal for a time corresponding to the rising and falling transient portions of the video signal Means for outputting a delayed signal delayed, and control means for integrating the primary differential signal, selectively switching the primary differential signal or the delay signal according to the integrated output level, and supplying the signal to the modulation coil And a scanning speed modulation circuit.
JP5089760A 1993-04-16 1993-04-16 Scan speed modulation circuit Expired - Fee Related JP2993586B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5089760A JP2993586B2 (en) 1993-04-16 1993-04-16 Scan speed modulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5089760A JP2993586B2 (en) 1993-04-16 1993-04-16 Scan speed modulation circuit

Publications (2)

Publication Number Publication Date
JPH06303451A JPH06303451A (en) 1994-10-28
JP2993586B2 true JP2993586B2 (en) 1999-12-20

Family

ID=13979677

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5089760A Expired - Fee Related JP2993586B2 (en) 1993-04-16 1993-04-16 Scan speed modulation circuit

Country Status (1)

Country Link
JP (1) JP2993586B2 (en)

Also Published As

Publication number Publication date
JPH06303451A (en) 1994-10-28

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