JPS59193074U - Luminance signal regeneration circuit - Google Patents

Luminance signal regeneration circuit

Info

Publication number
JPS59193074U
JPS59193074U JP8843183U JP8843183U JPS59193074U JP S59193074 U JPS59193074 U JP S59193074U JP 8843183 U JP8843183 U JP 8843183U JP 8843183 U JP8843183 U JP 8843183U JP S59193074 U JPS59193074 U JP S59193074U
Authority
JP
Japan
Prior art keywords
luminance signal
circuit
regeneration circuit
signal regeneration
emphasis circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8843183U
Other languages
Japanese (ja)
Inventor
洋次郎 南
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP8843183U priority Critical patent/JPS59193074U/en
Publication of JPS59193074U publication Critical patent/JPS59193074U/en
Pending legal-status Critical Current

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  • Television Signal Processing For Recording (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はＶＴＲの輝度信号再生回路の概略ブロック図、
第２図は本実施例回路の概略ブロック図である。 主な図番の説明、５・・・ＦＭ復調回路、６・・・ディ
エンファシス回路、１５・・・積分回路、１６・・・比
較回路。 Ｌイｉ 糾甑１Figure 1 is a schematic block diagram of a VTR luminance signal regeneration circuit.
FIG. 2 is a schematic block diagram of the circuit of this embodiment. Explanation of main figure numbers, 5...FM demodulation circuit, 6...De-emphasis circuit, 15...Integrator circuit, 16...Comparison circuit. Lii 笾甑1

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 記録時、プリエンファシス回路により輝度信号の高域成
分を強調し、再生時、ディエンファシス回路により前記
高域成分を抑圧してなるビデオテープレコーダにおいて
、再生輝度信号中のノイズ成分を検出する回路を設け、
この検出回路出力により前記ディエンファシス回路の高
域成分抑圧量を可変することを特徴とする輝度信号再生
回路。A circuit for detecting noise components in a reproduced luminance signal is provided in a video tape recorder in which a pre-emphasis circuit emphasizes high-frequency components of a luminance signal during recording, and a de-emphasis circuit suppresses the high-frequency components during reproduction. established,
A luminance signal reproducing circuit characterized in that the amount of high frequency component suppression of the de-emphasis circuit is varied by the output of the detection circuit.
JP8843183U 1983-06-08 1983-06-08 Luminance signal regeneration circuit Pending JPS59193074U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8843183U JPS59193074U (en) 1983-06-08 1983-06-08 Luminance signal regeneration circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8843183U JPS59193074U (en) 1983-06-08 1983-06-08 Luminance signal regeneration circuit

Publications (1)

Publication Number Publication Date
JPS59193074U true JPS59193074U (en) 1984-12-21

Family

ID=30218341

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8843183U Pending JPS59193074U (en) 1983-06-08 1983-06-08 Luminance signal regeneration circuit

Country Status (1)

Country Link
JP (1) JPS59193074U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63139487A (en) * 1986-12-01 1988-06-11 Mitsubishi Electric Corp Video signal processing circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63139487A (en) * 1986-12-01 1988-06-11 Mitsubishi Electric Corp Video signal processing circuit

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