JPS59191627A - Constant current circuit - Google Patents

Constant current circuit

Info

Publication number
JPS59191627A
JPS59191627A JP6542383A JP6542383A JPS59191627A JP S59191627 A JPS59191627 A JP S59191627A JP 6542383 A JP6542383 A JP 6542383A JP 6542383 A JP6542383 A JP 6542383A JP S59191627 A JPS59191627 A JP S59191627A
Authority
JP
Japan
Prior art keywords
voltage
transistor
constant current
circuit
conductivity type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6542383A
Other languages
Japanese (ja)
Inventor
Tatsuji Matsuura
達治 松浦
Kazumasa Matsui
松井 一征
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6542383A priority Critical patent/JPS59191627A/en
Publication of JPS59191627A publication Critical patent/JPS59191627A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G05F3/242Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage

Abstract

PURPOSE:To obtain a constant current source which has no variation of the set current despite the variation of the threshold voltage of a constant current generating transistor TR, by using a voltage source which varies in response to the variation of the threshold voltage of said TR. CONSTITUTION:A voltage dividing circuit consisting of transistor FET12-15 is provided between a power supply VDD10 and a power supply VSS11. The output voltage 21 of the voltage dividing circuit is supplied to a constant current generating FET20. Then the voltage 21 varies in response to the variation of the threshold voltage of the FET20. Thus it is possible to obtain a constant current source which has no variation of the set current despite the variation of the threshold voltage of the TR.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は集積化された定電流回路に関するもので、特に
トランジスタのしきい電圧の変動を許容する定電流回路
を提供するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to an integrated constant current circuit, and particularly to a constant current circuit that allows fluctuations in the threshold voltage of a transistor.

〔発明の背景〕[Background of the invention]

従来の定電流回路は第1図に示すようにダイオード接続
した相補導電型すなわちPMO8とNMO8トランジス
タ(ゲートとドレインを接続したトランジスタ)12お
よび13を抵抗と見なして電源■DD10と電源VBI
+11に対する分圧回路を構成し、この分圧回路出力2
1に発生する電圧を定電流発生用トランジスタ20に印
加して定電流回路の出力22であるそのドレインに定電
流を発生させるものであった。
As shown in Fig. 1, a conventional constant current circuit uses diode-connected complementary conductivity type PMO8 and NMO8 transistors (transistors with gates and drains connected) 12 and 13 as resistors, and connects the power supply DD10 and the power supply VBI.
Construct a voltage divider circuit for +11, and output 2 of this voltage divider circuit.
1 is applied to a constant current generating transistor 20 to generate a constant current at its drain, which is the output 22 of the constant current circuit.

また従来の定電流回路の別の例として第2図に、アクテ
ィブロード形差動増幅回路のノ(イアス発生に適した定
電流回路を示す。第2図の回路は、第1図の回路に対し
て、■DD10側のトランジスタ12と分圧回路出力2
1の間にV 1111側のトランジスタ13と同し極性
のチャネルのダイオード接続したトランジスタを挿入し
たものである。この回路はチップの製造ばらつきによる
素子特性の変動があるとそれに対応して差動増幅回路の
動作点が安定になるように定電流値が増減する定電流回
路である。したがって素子特性が変動したとしても設定
電流の変動を抑えなければならない応用にはこの回路は
適していなかった。
Furthermore, as another example of a conventional constant current circuit, FIG. 2 shows a constant current circuit suitable for generating a negative current in an active load type differential amplifier circuit. On the other hand, ■Transistor 12 on the DD10 side and voltage divider circuit output 2
A diode-connected transistor with a channel of the same polarity as the transistor 13 on the V 1111 side is inserted between the transistors 1 and 1. This circuit is a constant current circuit in which the constant current value increases or decreases in response to variations in element characteristics due to variations in chip manufacturing so that the operating point of the differential amplifier circuit becomes stable. Therefore, this circuit is not suitable for applications where fluctuations in the set current must be suppressed even if the element characteristics change.

第1図の定電流回路の場合にも特にこのような応用を考
慮していないため、素子特性の変動とくにしきい電圧の
変動により定電流値が変動する欠点があった。第1図の
回路でNMO8)ランジスタのしきい電圧をVTR,そ
の変動をΔVTN 。
In the case of the constant current circuit shown in FIG. 1 as well, since such applications are not particularly taken into consideration, there is a drawback that the constant current value fluctuates due to fluctuations in element characteristics, particularly fluctuations in threshold voltage. In the circuit shown in Figure 1, the threshold voltage of the NMO8) transistor is VTR, and its fluctuation is ΔVTN.

PMO8)ランジスタのしきい電圧をVTP、その変動
をΔVTP%電源電圧をVan (Vs s = 0 
)とするとき出力電流I。utの変動ΔI outはで
あり、電源電圧が低いときには出力電流の変動割合が大
きかった。
PMO8) The transistor threshold voltage is VTP, its fluctuation is ΔVTP%, and the power supply voltage is Van (Vs s = 0
), then the output current I. The variation in ut is ΔI out, and when the power supply voltage is low, the rate of variation in the output current is large.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、トランジスタのしきい電圧が変動して
も設定電流が変動しない定電流源を提供することにある
An object of the present invention is to provide a constant current source whose set current does not change even if the threshold voltage of a transistor changes.

〔発明の概要〕[Summary of the invention]

本発明は上記目的を達成するため、分圧回路を改良して
、分圧回路の出力電圧が、定電流発生用トランジスタの
しきい電圧変動に対応して変動するようにしたものであ
る。
In order to achieve the above object, the present invention improves a voltage divider circuit so that the output voltage of the voltage divider circuit changes in response to changes in the threshold voltage of a constant current generating transistor.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明を実施例を参照して詳細に説明する。第3
図は本発明による定電流回路の一実施例の回路図である
Hereinafter, the present invention will be explained in detail with reference to Examples. Third
The figure is a circuit diagram of an embodiment of a constant current circuit according to the present invention.

トランジスタ12.13.14.15が分圧回路であり
、第2図の分圧回路のトランジスタ13と14の間にダ
イオード接続したPMO8)ランジスタ15を挿入し、
トランジスタ13と15の接続点を分圧電圧V。ut3
を出力する分圧回路出力21としたものである。トラン
ジスタ20は、この分圧電圧から設定電流を発生するた
めの素子である。トランジスタ23は、トランジスタ2
0のドレインでおる端子22を充分高い電圧にバイアス
し、トランジスタ200発生する設定電流が端子22の
電圧に依ら々いようにするだめの素子である。トランジ
スタ23と24によるカレントミラー回路により端子2
5に設定電流に等しい定厖流供給出力を得る。また定電
流すい込み源が必要な場合にはトランジスタ23.26
によるカレントミラー回路と27.28によるカレント
ミラー回路により端子29に設定電流に等しい定電流す
い込み出力を得ることができる。なお、負荷の電圧が十
分高いときには、端子22を直接電流すい込み出力とす
ることができる。
Transistors 12, 13, 14, and 15 are a voltage divider circuit, and a diode-connected PMO8) transistor 15 is inserted between transistors 13 and 14 of the voltage divider circuit in FIG.
The connection point between transistors 13 and 15 is a divided voltage V. ut3
The voltage dividing circuit output 21 outputs the voltage. The transistor 20 is an element for generating a set current from this divided voltage. Transistor 23 is transistor 2
This element is used to bias the terminal 22, which has a drain of 0, to a sufficiently high voltage so that the set current generated by the transistor 200 does not depend on the voltage at the terminal 22. Terminal 2 is connected to terminal 2 by a current mirror circuit formed by transistors 23 and 24.
5 to obtain a constant current supply output equal to the set current. In addition, if a constant current sink source is required, the transistor 23.26
A constant current sinking output equal to the set current can be obtained at the terminal 29 by the current mirror circuit according to 27.28. Note that when the voltage of the load is sufficiently high, the terminal 22 can be used as a direct current sink output.

本発明の特徴は分圧回路の構成にある。このように構成
すると分圧回路の出力電圧がNMO8のしきい電圧の変
動に対応して変動し、かつPMOSのしきい電圧の変動
にはよらないように設計できる。
The feature of the present invention lies in the configuration of the voltage dividing circuit. With this configuration, it is possible to design the output voltage of the voltage dividing circuit to vary in accordance with variations in the threshold voltage of the NMO 8 and not to vary in response to variations in the threshold voltage of the PMOS.

そのためには分圧回路の出力電圧V。ut3を(2)式
に示すように電源電圧vDDの1/2とNMO8のしき
い電圧■τNの和に等しくなるように、トランジスタサ
イズを決めればよい。(説明を簡単にするために、計算
はV fillをOvとして行なう−NMO8)ランジ
スタ20のドレイン端子22が充分高い電圧にバイアス
されていると、トランジスタ20の出力電流■。utは
ゲート・ソース間電圧Vanとしきい電圧vTNにより
決まる。トランジスタ20の移動度をβ20 %サイズ
を(W/ L ) 20とすると出力電流工。utは ・・・・・・・・・・・・(3) となる。本実施例の構成ではゲート・ソース間電圧は■
。ut3に等しいので出力電流はとなる。すなわち出力
電流はNMO8,PMO8のしきい電圧にはよらない。
For this purpose, the output voltage V of the voltage divider circuit is required. The transistor size may be determined so that ut3 is equal to the sum of 1/2 of the power supply voltage vDD and the threshold voltage ■τN of NMO8, as shown in equation (2). (For simplicity, calculations are made with V fill as Ov - NMO8) If the drain terminal 22 of transistor 20 is biased to a sufficiently high voltage, the output current of transistor 20 . ut is determined by the gate-source voltage Van and the threshold voltage vTN. If the mobility of the transistor 20 is β20% and the size is (W/L)20, then the output current is: ut is......(3). In the configuration of this embodiment, the gate-source voltage is
. Since it is equal to ut3, the output current is. That is, the output current does not depend on the threshold voltages of NMO8 and PMO8.

したがってしきい電圧値の変動があっても出力電流は変
化しない。
Therefore, even if the threshold voltage value fluctuates, the output current does not change.

さて、分圧回路のトランジスタサイズを以下に示す関係
を満足するように設計すれば出力電圧が(2)式を満足
するようにできることを説明する。
Now, it will be explained that if the transistor size of the voltage dividing circuit is designed to satisfy the relationship shown below, the output voltage can be made to satisfy the expression (2).

ダイオード接続したMOSトランジスタのドレイン電流
をIf とするとそのトランジスタのゲート・ソース間
電圧Voε1は(5)式で表わされる。
If the drain current of a diode-connected MOS transistor is If, the gate-source voltage Voε1 of the transistor is expressed by equation (5).

ここでVTはしきい電圧、βは移動度、(W/L)はサ
イズである。したがって分圧回路の出力電圧V out
3および電源電圧■DDを分圧回路に流れる電流Ilで
表わすと ・・・・・・・・・・・・(6) ・・・・・・・・・・・・(7) となる。ここで添数はトランジスタの番号に対応させて
いる。簡単のため と書いて(6)、(7)式から電流I+を消去すると・
・・・・・・・・・・・・・・(9)となる。したがっ
てK 12 =に13 +に14 +に15となるよう
にトランジスタサイズを設計すれば、すなわちしきい電
圧を除いた正味のゲート・ソース間電圧の和(Van 
 2VTN  2■丁P)を二等分するように分圧回路
のトランジスタサイズを設計すれば、出力電圧が となり(2)式を満足させることができる。
Here, VT is the threshold voltage, β is the mobility, and (W/L) is the size. Therefore, the output voltage of the voltage divider circuit V out
3 and the power supply voltage DD are represented by the current Il flowing through the voltage dividing circuit as follows. (6) (7) Here, the subscript corresponds to the transistor number. For simplicity's sake, if we eliminate the current I+ from equations (6) and (7), we get
・・・・・・・・・・・・・・・(9) Therefore, if the transistor size is designed so that K 12 = 13 + 14 + 15, the sum of the net gate-source voltages excluding the threshold voltage (Van
If the transistor size of the voltage dividing circuit is designed so as to divide 2VTN 2P) into two equal parts, the output voltage will be as follows, and equation (2) can be satisfied.

なお、この分圧回路における下側アクティブ抵抗のPM
O8,NMO8の接続の順番は任意でもよいが、本実施
例のようにPMO8を一番上にすることが望ましい。P
MO8の基板効果の影響を小さくできるからである。ま
たNMO8の基板効果はトランジスタ14に示すように
ウェルとソースを接続することにより影響を無くすこと
ができ(9) る。
Note that the PM of the lower active resistance in this voltage dividing circuit is
Although the order of connection of O8 and NMO8 may be arbitrary, it is preferable to connect PMO8 at the top as in this embodiment. P
This is because the influence of the substrate effect of MO8 can be reduced. Further, the influence of the substrate effect of the NMO 8 can be eliminated by connecting the well and the source as shown in the transistor 14 (9).

〔発明の効果〕〔Effect of the invention〕

シミュレーションによれば第3図の回路で5■の電源を
用いトランジスタのしきい電圧VTRをIVとしVTH
’c 0.2 V変化させると、出力電流値の変動は0
.3チであった。第1図の回路での変動は26%である
から大幅に改善されている。
According to the simulation, in the circuit shown in Fig. 3, using a 5-inch power supply and setting the transistor threshold voltage VTR to IV, VTH
'c If you change 0.2 V, the fluctuation of the output current value will be 0.
.. It was 3 chi. The variation in the circuit of FIG. 1 is 26%, which is a significant improvement.

なお、本発明は、Vgall側のNMO8)ランジスタ
13のドレインを分圧回路出力としてカレントミラー回
路の極性を反転させること、Nウェルを用いた相補MO
Sプロセスを用いること等の変形を含むことは明らかで
ある。また、トランジスタ14と15にダイオード接続
した他のトランジスタ(複数個であって良い)を追加し
、またトランジスタ12にダイオード接続した他のトラ
ンジスタ(複数個であっても良い)を追加することする
ことも可能である。
Note that the present invention is to invert the polarity of a current mirror circuit by using the drain of NMO8) transistor 13 on the Vgall side as a voltage dividing circuit output, and to create a complementary MO using an N-well.
It is clear that variations such as using the S process are included. Further, another diode-connected transistor (it may be plural) is added to the transistors 14 and 15, and another diode-connected transistor (it may be plural) is added to the transistor 12. is also possible.

これまで詳しく説明したように、本発明によればしきい
電圧の変動に依存しない定電流源を実現(10) できる。
As explained in detail above, according to the present invention, a constant current source that does not depend on threshold voltage fluctuations can be realized (10).

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図は従来の定電流回路の例、第3図は
本発明の実施例を示す回路図である。 20・・・定電流発生用トランジスタ、12,13゜1
4.15・・・分圧回路を構成するトランジスタ、21
・・・分圧回路の出力端子、23.24・・・定電流供
給源を構成するカレントミラー回路、23゜26.27
.28・・・定電流すい込み源を構成するカレントミラ
ー回路。 代理人 弁理士 高橋明夫 (11) ■ 1 図    篤 2 凶 γ 3 図 Iθ ss
1 and 2 are examples of conventional constant current circuits, and FIG. 3 is a circuit diagram showing an embodiment of the present invention. 20...Transistor for constant current generation, 12, 13゜1
4.15...Transistor constituting a voltage dividing circuit, 21
... Output terminal of voltage divider circuit, 23.24 ... Current mirror circuit constituting constant current supply source, 23°26.27
.. 28...Current mirror circuit that constitutes a constant current sinking source. Agent Patent attorney Akio Takahashi (11) ■ 1 Figure Atsushi 2 Kyōγ 3 Figure Iθ ss

Claims (1)

【特許請求の範囲】 1、定電流発生用トランジスタと前記トランジスタを駆
動する電圧源から成る定電流回路において、定電流発生
用トランジスタのしきい電圧変動に対応して発生電圧が
変動する電圧源を用いたことを特徴とする定電流回路。 2、定電流発生用トランジスタとして第1導電型トラン
ジスタを用い、前記トランジスタを駆動する電圧源とし
てダイオード接続した第1導電型トランジスタ2個とダ
イオード接続した第2導電型トランジスタ1個を直列接
続した合成アクティブ抵抗とダイオード接続した第2導
電型トランジスタ1個のアクティブ抵抗による分圧回路
を用いた定電流回路。 3、上記定電流発生回路において、分圧回路の出力電圧
を電源電圧の半分と第1導電型トランジスタのしきい電
圧の和にほぼ等しくしたことを特徴とする第2項の定電
流回路。 4、定電流発生用トランジスタとして第1導電型トラン
ジスタを用い、前記トランジスタを駆動する電圧源とし
て2個以上のダイオード接続した第1導電型トランジス
タと1個以上のダイオード接続した第2の導電型トラン
ジスタを直列接続した合成アクティブ抵抗と1個以上の
ダイオード接続した第2導電型トランジスタを直列接続
したアクティブ抵抗による分圧回路であって、分圧回路
の出方電圧がほぼ電源を分圧した成分と第1導電型トラ
ンジスタのしきい値の成分とだけからなる分圧回路を用
いたことを特徴とする定電流回路。
[Scope of Claims] 1. In a constant current circuit consisting of a constant current generating transistor and a voltage source for driving the transistor, a voltage source whose generated voltage fluctuates in response to threshold voltage fluctuations of the constant current generating transistor is provided. A constant current circuit characterized in that it is used. 2. A combination in which a first conductivity type transistor is used as a constant current generating transistor, and two diode-connected first conductivity type transistors and one diode-connected second conductivity type transistor are connected in series as a voltage source for driving the transistor. A constant current circuit using a voltage divider circuit with an active resistor and one active resistor of a second conductivity type transistor connected to a diode. 3. The constant current generating circuit according to item 2, wherein the output voltage of the voltage dividing circuit is approximately equal to the sum of half the power supply voltage and the threshold voltage of the first conductivity type transistor. 4. A first conductivity type transistor is used as a constant current generating transistor, and two or more diode-connected first conductivity type transistors and one or more diode-connected second conductivity type transistors are used as a voltage source for driving the transistor. This is a voltage divider circuit using an active resistor in which a composite active resistor is connected in series with a second conductivity type transistor connected in series with one or more diodes, and the output voltage of the voltage divider circuit is almost a component obtained by dividing the voltage of the power supply. A constant current circuit characterized by using a voltage divider circuit consisting only of a threshold value component of a first conductivity type transistor.
JP6542383A 1983-04-15 1983-04-15 Constant current circuit Pending JPS59191627A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6542383A JPS59191627A (en) 1983-04-15 1983-04-15 Constant current circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6542383A JPS59191627A (en) 1983-04-15 1983-04-15 Constant current circuit

Publications (1)

Publication Number Publication Date
JPS59191627A true JPS59191627A (en) 1984-10-30

Family

ID=13286638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6542383A Pending JPS59191627A (en) 1983-04-15 1983-04-15 Constant current circuit

Country Status (1)

Country Link
JP (1) JPS59191627A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0905898A2 (en) * 1997-09-25 1999-03-31 Siemens Aktiengesellschaft An improved apparatus for current pulse generation in voltage down converters

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0905898A2 (en) * 1997-09-25 1999-03-31 Siemens Aktiengesellschaft An improved apparatus for current pulse generation in voltage down converters
EP0905898A3 (en) * 1997-09-25 1999-12-15 Siemens Aktiengesellschaft An improved apparatus for current pulse generation in voltage down converters

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