JPS5918651B2 - Hardness measurement display method and device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method and apparatus capable of measuring and displaying the hardness of a sample from an indentation formed on the sample surface.

Conventionally, there is a method that recognizes the outline of an indentation on a sample surface, calculates the size of the indentation from this outline, and obtains a hardness value.

However, with such conventional means, the hardness value is determined after recognizing the entire contour of the indentation during calculation, which poses a problem in that signal processing becomes complicated.

The present invention aims to solve these problems by visually recognizing the entire outline of the impression of the image displayed on the monitor screen and manually aligning the marker with this outline. Determine the maximum dimension of the indentation, calculate this dimension value to determine the hardness of the sample, and
It is an object of the present invention to provide a hardness measurement and display method and an apparatus therefor, which enable dimension values, hardness, and markers to be displayed on a monitor screen.

Therefore, the hardness measurement and display method of the present invention images the indentation formed on the sample surface using a solid-state camera, displays the indentation image on the sample surface on the monitor screen, and also marks the indentation image. Then, by manually extending and contracting the marker on the same monitor screen, the marker is superimposed on the maximum dimension position of the indentation image, and the hardness of the sample is displayed based on the maximum dimension value of the indentation image. It is characterized by

The hardness measurement and display device of the present invention also includes a solid-state camera that images an indentation formed on a sample surface and converts it into an electrical signal, and a binarization circuit that binarizes the electrical signal from the solid-state camera. It is equipped with a monitor screen that receives the binarized electric signal from the binarization circuit and displays it as an indentation image, and a marker generation circuit that outputs a horizontal or vertical marker signal on the monitor screen. , is equipped with a manual controller that can manually adjust the length and position of the marker by delaying the marker signal from the marker generation circuit, and adjusts the maximum dimension of the indentation on the sample by receiving the marker signal adjusted by the manual controller. A first calculation circuit that calculates a value, and a first display section that receives a signal from the first calculation circuit and displays the maximum dimension value of the indentation of the sample, and a first calculation circuit that calculates the value. a second calculation circuit that calculates the hardness of the sample based on a signal from the circuit;
a second display unit that displays the hardness of the sample in response to a signal from the arithmetic circuit; a binarized electrical signal from the binarization circuit; and a marker signal from the marker generation circuit. A synthesizer is provided, and the monitor screen also serves as the first and second display sections.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A hardness measurement and display method and apparatus thereof as an embodiment of the present invention will be described below with reference to the drawings. The attached drawings show the hardness measurement and display device according to the present invention. Fig. 1 is its overall configuration diagram, Figs. 2 and 3 are electrical circuit diagrams showing its main parts, and Fig. 4 shows its sample surface. A schematic diagram showing an example of displaying an image and a hardness value, and FIGS. 5 to 9 are explanatory diagrams showing means for determining the hardness of a sample from an indentation. As shown in FIG. 1, a light projection system 3 is provided that irradiates light onto the surface of the sample 2 on which an indentation 1 has been formed. It is composed of a half mirror 6 and an objective lens 7.

Moreover, a polarizing plate 8 is interposed between the condenser lens 5 and the half mirror 6 so as to be detachable.

The light irradiated onto the sample surface through the light projection system 3 is reflected by the sample surface, and this reflected light is sent to the objective lens 7 and the half mirror 6.
and is guided through a lens group 9 consisting of a relay lens and an eyepiece. That is, the objective lens 7, half mirror 6, and lens group 9 constitute a reflection system 10. Note that the objective lens 7 and the half mirror 6 are configured as members common to the light projection system 3 and the reflection system 10.

By the way, a solid-state camera 11 is provided in the vicinity of the lens group 9, and this solid-state camera 11 is provided at a position facing the lens group 9 and is constructed by having a large number of photoelectric conversion elements arranged in a matrix. Photoelectric conversion element group 1
It has 2.

Thereby, this photoelectric conversion element group 12 can convert reflected light into an electrical signal. Note that the photoelectric conversion element group 12 is formed by integrating about 490 x 408 photoelectric conversion elements in a matrix in a space of, for example, 9.7 mm x 12.7 i1.

Further, a binarization circuit 13 that binarizes the electrical signal from the photoelectric conversion element group 12 is provided.

This binarization circuit 13 compares the electric signal from each photoelectric conversion element of the photoelectric conversion element group 12 with a predetermined threshold value, and when the input electric signal is larger than this threshold value, it becomes "1". Conversely, when the output signal is small, an output signal corresponding to "O" is output. In general, the amount of light reflected from the light irradiated onto the indentation 1 is guided to the reflection system 10 less than the amount of light reflected from the light irradiated onto the other surface of the sample 2, so that it is The obtained binary signal is
The part of the impression 1 becomes a signal corresponding to "0", and the part other than the impression 1 becomes a signal corresponding to "1".

The binarized electric signal from the binarization circuit 13 is supplied to the cathode ray tubes 14 as the display sections 1 and 2 via the synthesizer 15 in accordance with the arrangement order of the matrix, and as a result, as shown in FIG. As shown, an image 1'75S of the impression 1 is projected on the screen 14a serving as the monitor screen.
These solid-state camera 11, binarization circuit 13, synthesizer 15, and cathode ray tube 14 constitute an indentation image display system.

Note that the synthesizer 15 is a multi-input adding circuit.

Similarly, the binarized electrical signals from the binarization circuit 13 are successively supplied to a second arithmetic circuit 16 such as a microcomputer in the same manner as in the matrix arrangement order. 1st~
As shown in FIG. 3, a horizontal marker generation circuit 18 includes a horizontal arithmetic unit 17 as a first arithmetic circuit, and a vertical marker generation circuit 20 includes a vertical arithmetic unit 19 as a first arithmetic circuit. are provided, and a synthesizer 1 outputs a horizontal marker signal MH and a vertical marker signal M, respectively.
5.

As shown in FIG. 2, the delay circuit 21 constituting the horizontal marker generation circuit 18 inputs the horizontal blanking signal BH and adjusts the variable resistor 22 as a manual controller using the adjustment knob 47a (see FIG. 4). By doing so, a signal for determining the starting point of the horizontal marker MKH indicated by the symbol A (see FIG. 4) on the cathode ray tube 14 is supplied to the pulse generating circuit 23.

This pulse generating circuit 23 includes a variable resistor 24 as a manual controller, that is, an adjustment knob 4 connected thereto.
Adjust the pulse width with 7b (see Figure 4), and
The AND circuit 25 is supplied with a pulse width signal PH that determines the end point of the horizontal marker MKH indicated by the symbol B (see FIG. 4).

Furthermore, a delay circuit 26 is provided, and this delay circuit 26 inputs the vertical blanking signal BV and determines the upper end of the vertical width W of the horizontal marker MKH (see FIG. 4) using a variable resistor 27. The signal determining this upper end is supplied to the pulse generating circuit 28.

The pulse generation circuit 28 adjusts the pulse width with a variable resistor 29 to determine the lower end of the vertical width W of the horizontal marker MKH, and sends the determined upper and lower ends signals to the AND circuit 25. supply.

The AND circuit 25 receives the pulse width signals from the pulse generation circuits 23 and 28, and outputs the horizontal marker MK shown in FIG.
The horizontal direction marker signal MH that generates H is supplied to the combiner 15.

As shown in FIG. 3, a vertical marker generation circuit 20 is provided, and a delay circuit 30 of this generation circuit 20 inputs a vertical blanking signal B and controls a variable resistor 31 as a manual controller using an adjustment knob 47c. By adjusting with [see FIG. 4], the symbol C [4th
A signal for determining the starting point of the vertical marker MKV shown by [see figure] is supplied to the pulse generating circuit 32. This pulse generating circuit 32 adjusts the pulse width using a variable resistor 33 as a manual controller, that is, an adjustment knob 47d (see FIG. 4) connected to the variable resistor 33, and adjusts the pulse width using a reference numeral D on the cathode ray tube 14 (see FIG. 4). A pulse width signal PV that determines the end point of the vertical marker MKV shown is supplied to the AND circuit 34.

Further, a delay circuit 35 is provided, and this delay circuit 35 inputs the horizontal blanking signal BH and determines the left end of the horizontal width W2 (see FIG. 4) of the vertical marker MKV using a variable resistor 36. The signal determining this left end is supplied to the pulse generation circuit 37.

The pulse generating circuit 37 adjusts the pulse width with a variable resistor 38 to determine the right end of the horizontal width W2 of the horizontal marker MKH, and sends the determined signals of the left end and right end to the AND circuit 34. supply.

The AND circuit 34 receives the pulse width signals from the pulse generation circuits 32 and 37, and outputs the vertical marker MK shown in FIG.
A vertical marker signal MV that generates V is supplied to the combiner 15.

These horizontal and vertical marker generation circuits 18 and 20, synthesizer 15, and cathode ray tube 14 constitute a marker display system. Furthermore, as shown in FIG. 2, a horizontal arithmetic unit 17 constituting the horizontal marker generation circuit 18 is provided, which inputs the horizontal pulse width signal PH from the pulse generation circuit 23 to a counter 39. The adjusted clock signal from the clock generation circuit 40 is counted only while the signal PH is being input.

This counter 40 uses the horizontal blanking signal BH as a clear signal, counts the length corresponding to the horizontal length of the horizontal direction marker MKH on the sample 2 shown in FIG. 4, and outputs the result. is supplied to the latch circuit 41.
The latch circuit 41 is a circuit that inputs the output from the counter 39 and holds it for one screen or several screens.The output of this latch circuit 41 is supplied to the second arithmetic circuit 16. There is. In addition, the vertical marker generation circuit 2
0 is provided, which inputs the vertical pulse width signal PV from the pulse generation circuit 32 to the counter 42, and inputs the vertical pulse width signal PV from the clock generation circuit 43 only while this signal PV is input. It is designed to count the adjusted clock signal. This counter 42 uses the vertical blanking signal BV as a clear signal, counts the length corresponding to the length of the vertical marker MKV shown in FIG. 4 in the vertical direction on the sample 2, and outputs the result. is supplied to the latch circuit 44. The latch circuit 44 is
This circuit inputs the output from the counter 42 and holds it for one screen to several screens, and the output of this latch circuit 44 is supplied to the second arithmetic circuit 16.

By the way, there are Brinell hardness, Vickers hardness, Knoop hardness, etc. that indicate the hardness of a sample, and these hardnesses are determined as follows, assuming that the test load for creating an indentation is F. To determine the Brinell hardness HB, as shown in FIG.
It is sufficient to find x+DydX,dy and set the blade to Dm, and thereby the Brinell hardness HB becomes as follows.

In addition, in order to obtain the hardness HV, as shown in FIG. 6, as shown in FIG. Find the lengths of the diagonals DX' and Dy', and ? may be set as Dm, and the Pickers hardness H is then as follows.

Here, k is a constant.

Further, in order to obtain the Knoop hardness HK, it is sufficient to obtain the maximum dimension 2 in a predetermined direction in the indentation 1, as shown in FIG. 8, and thereby the Knoop hardness HK becomes as follows.

Here, K' is a constant.

The hardness of the sample 2 is calculated by selecting the above calculation formula as appropriate.

For example, when determining the Vickers hardness HV, use the above (2)
) is set in the second arithmetic circuit 16, and the marker is expanded and contracted within the cross-shaped range in the center so as to include the diagonal line of the indentation as shown by diagonal lines in FIG.
2 obtained by matching these markers to ~1Δ
Determine the lengths of the diagonals Dx' and Dy' from the valued electric signal,
Using this data as data and the values of F and k stored in advance, equation (2) is calculated to produce an output corresponding to the Vickers hardness HV.

In addition, when calculating the Brinell hardness HB, in almost the same way as when calculating the above-mentioned Vickers hardness HV, the marker can be expanded and contracted within the cross-shaped range, and the obtained value can be obtained by aligning these markers with the contours 1a to 1d. The hardness of the sample 2 is determined by measuring the maximum dimension of the indentation 1 based on the signal, and when determining the Knoop hardness HK, the maximum dimension of the indentation 1 is measured as shown by diagonal lines in Fig. 9. The hardness of the sample 2 is determined based on the signal obtained by extending and contracting the marker only in the central portion so as to include the diagonal line and aligning the marker with the contours 1a and 1b.

The output from the second arithmetic circuit 16 is inputted to the cathode ray tube 14 serving as the first and second display units and the printer 45 via an appropriate interface (not shown), and as a result, as shown in FIG. On the screen 14a of the cathode ray tube 14, the maximum dimension L (
here 1234), the maximum dimension L2 of the specimen indentation in the vertical direction (here 56.7) and the hardness value (here 8
．． 9) are displayed or these values are printed by the printer 45.

It is also possible to input the output from the second arithmetic circuit 16 to the computer 46 and perform further desired arithmetic processing based on the hardness value.

The cathode ray tube 14 serves as both the first and second display sections,
On the screen 14a, as shown in FIG. 4, the indentation image V and the hardness value of the sample 2 are displayed simultaneously, and the lengths of the indentation in the horizontal and vertical directions are also displayed. , the first and second display sections may be provided separately, and for example, the indentation image 1' may be displayed on a cathode ray tube 14, and the hardness of the sample 2 may be displayed digitally on a liquid crystal element or a diagonal tube. good. In order to measure and display the hardness of a sample with the above-described configuration, the light projection system 3 irradiates the surface of the sample 2 with light, and the reflected light from the sample surface is transmitted to the photoelectric conversion element group of the solid-state camera 11. 12 into an electrical signal, and this electrical signal is binarized by a binarization circuit 13. Based on this binarized electrical signal, the screen 14a of the cathode ray tube 14 is converted into an electrical signal.
An indentation image V on the sample surface is displayed above.

Further, the second arithmetic circuit 16 is operated based on the binary electric signal.
By simply measuring the maximum dimension of the indentation 1, the hardness of the sample 2 can be quickly measured.
is displayed on the screen 14a almost simultaneously with the indentation image V, and is printed by the printer 45.

Note that the signal from the second arithmetic circuit 16 is also supplied to the computer 46 as needed, and is subjected to desired arithmetic processing.

At this time, the light from the light projection system 3 is irradiated onto the sample surface through the polarizing plate 8, so even if the indentation 1 is minute, for example, 20 μm or less, the maximum dimension of the indentation 1 can be clearly confirmed, and the minute indentation 1 is formed. The hardness of sample 2 can also be accurately measured and displayed.

The reason why the impression 1 can be clearly recognized by irradiating light through the polarizing plate 8 in this manner is as follows. Generally, when the indentation 1 becomes minute, the magnification of the objective lens 7 is increased from 40 to
100, which increases the numerical aperture of the objective lens 7.

As a result, the amount of light reflected from inside the indentation 1 increases, and the difference from the light reflected from the surface of the sample 2 decreases, making the outline of the indentation 1 unclear. This is because by interposing it in the optical system 3, the light from the projection system 3 can be polarized, and thereby the difference between the light reflected from inside the indentation and the light reflected from the surface of the sample 2 can be made sufficiently large. .

Furthermore, in addition to the above-mentioned means for manually measuring the sample in the horizontal and vertical directions, if an automated calculation means is provided and used in combination, the values measured by this calculation means can be used in conjunction with the above-mentioned manual means. This can be recognized by comparing it with the obtained numerical value. Note that although the embodiment shows an example in which the markers are combined, the markers may be configured as a pair of left and right markers in the horizontal direction. This can be achieved by providing a circuit after the pulse generating circuit 32 and a separate AND circuit.

This pair of markers also provides substantially the same effect as the embodiment shown in FIGS. 1-4. The same applies to vertical markers. As described above in detail, the hardness measurement and display method and apparatus of the present invention provide the following effects and advantages.

(1) Even in cases where automatic measurement is difficult, such as when there are scratches, imprints, etc. around the indentation on the sample surface, which may be confused with the indentation, the marker can be manually extended or retracted to locate the maximum dimension of the indentation image. It is possible to measure the hardness accurately.

(2) In a device having an automatic measurement function, it is also possible to check whether automatic measurement is being performed correctly.

(3) The indentation image and the hardness of the sample can be displayed simultaneously on the monitor screen.

(4) The currently measured maximum dimension position of the indentation image can be confirmed by the marker on the monitor screen.

[Brief explanation of drawings]

The figures show an apparatus for carrying out the hardness measurement and display method as an embodiment of the present invention. Fig. 1 is an overall configuration diagram thereof, and Figs. 2 and 3 are electric circuits showing the main parts thereof. FIG. 4 is a schematic diagram showing an example of displaying the image of the sample surface and the hardness value, and FIGS. 5 to 9 are explanatory diagrams showing means for determining the hardness of the sample from the indentation. 1...Indentation, 1t...Indentation image, 2...
...Sample, 3...Light projection system, 4...Illumination lamp, 5...Condensing lens, 6...
Half mirror, 7...Objective lens, 8...
...Polarizing plate, 9...Lens group, 10...
・Reflection system, 11... Solid-state camera, 12...
...Photoelectric conversion element group, 13... Binarization circuit, 14... Braun tube that also serves as the first and second display sections, 14a... As a monitor screen screen, 15... combiner, 16... second arithmetic circuit, 17... horizontal arithmetic unit as first arithmetic circuit, 18... ...Horizontal marker generation circuit, 19... Vertical arithmetic unit as first arithmetic circuit, 20... Vertical marker generation circuit, 2
1...delay circuit, 22...variable resistor,
23... Pulse generation circuit, 24... Variable resistor, 25... AND circuit, 26...
・Delay circuit, 27... Variable resistor, 28...
...Pulse generation circuit, 29...Variable resistor, 30
...Delay circuit, 31...Variable resistor, 3
2...Pulse generation circuit, ~33...Variable resistor, 34...AND circuit, 35...
・Delay circuit, 36...Variable resistor, 37...
...Pulse generating circuit, 38...Variable resistor, 39
... Counter, 40 ... Clock generation circuit, 41 ... Latch circuit, 42 ... Counter, 43 ... Clock generation circuit, 44 ...・
...Latch circuit, 45...Printer, 46...
...Calculator, 47a-47d...Adjustment knob.

Claims (1)

[Claims] 1. An image of an indentation formed on a sample surface is captured by a solid-state camera, and an image of the indentation on the sample surface is displayed on a monitor screen, and a marker is superimposed and displayed on the indentation image, Then, the marker is manually expanded and contracted on the monitor screen to be superimposed on the maximum dimension position of the indentation image, and the hardness of the sample is displayed based on the maximum dimension value of the indentation. , Hardness measurement display method. 2. A solid-state camera that images the indentation formed on the sample surface and converts it into an electrical signal, a binarization circuit that binarizes the electrical signal from the solid-state camera, and a digital signal from the binarization circuit.
It is equipped with a monitor screen that receives digitized electrical signals and displays them as an indentation image, and a marker generation circuit that outputs marker signals in the horizontal or vertical direction on the monitor screen, and also receives marker signals from the marker generation circuit. a first calculation circuit comprising a manual controller capable of manually adjusting the length and position of the marker by delaying the time, and calculating a maximum dimension value of the indentation on the sample in response to the marker signal adjusted by the manual controller; , a first display section that receives a signal from the first arithmetic circuit and displays the maximum dimension value of the indentation on the sample, and displays the hardness of the sample based on the signal from the first arithmetic circuit. The second step that calculates
a second display section that receives a signal from the second arithmetic circuit and displays the hardness of the sample, and generates a binarized electric signal from the binarization circuit and the marker. a synthesizer for synthesizing marker signals from the circuit;
A hardness measurement and display device, characterized in that the monitor screen also serves as the first and second display sections.