JPS59186471A - Television receiver - Google Patents

Abstract

PURPOSE:To obtain invariably stable horizontal and vertical synchronizing pulses by detecting the reception states of a weak and an intense electric field, etc., and controlling the width of the time when a reset signal is supplied to a counter for obtaining vertical synchronizing pulses on the basis of said detection signal. CONSTITUTION:A voltage comparator 44 compares a reference voltage V2 with the voltage of a control signal VC' in a weak electric field. When VC' >V2' a control signal PV is supplied to a pulse width control circuit 43. Consequently, the time constant of the pulse width control circuit 43 is controlled to shorten the time width of the transmission of a pulse signal PC to a swtich S1. On the other hand, noise components in a color television signal fi decrease in an intense electric field. Therefore, the level of the output voltage VC of a noise detecting circuit 7 drops and the control signal CC' also drops in level. When VC' <V2, the control signal PV supplied to the pulse width control circuit 43 is not obtained any more. In this case, the pulse width control circuit 43 resets the shortening of the transmission time width.

Description

[Detailed description of the invention] 〔Technical field〕 The present invention relates to a television receiver.

[Background technology]

Television receivers have a method called a countdown synchronous processing method. The above method counts horizontal synchronization pulses obtained from a synchronization separation circuit to obtain a horizontal synchronization signal and a vertical synchronization signal.

Prior to the invention of the present application, the inventor investigated the above-mentioned type of television receiver and found that it had the following defects.

That is, when receiving television broadcasts, the reception conditions are not uniform depending on the geographical conditions and the state of radio wave propagation. When the electric field is strong, the received signal does not contain noise components, etc.
Therefore, no noise component appears in the horizontal synchronization pulse obtained from the synchronization separation circuit.

In this case, the 11525 power counter circuit for counting horizontal sync pulses and obtaining vertical sync pulses also performs accurate counting operations. However, in a weak electric field, the received signal is weak, so the 11525 force counter circuit cannot perform the above-described accurate counter operation. For this reason, every time the 11525 counter counts 525, it is reset. However, in the case of a weak electric field, noise components are likely to occur in the reset signal, so studies by the inventors have revealed that if the reset signal is always set in a state where it can be reset, the noise component will cause the 11525 counter to be reset. was made into Due to the above noise component] 1525
When the counter is reset, the frequency of the vertical synchronization signal that is supposed to be obtained every 525 counts becomes unstable, causing the screen displayed on the picture tube to move up and down.

Furthermore, the same phenomenon as in the case of a weak electric field described above may also occur when a magnetic recording/reproducing device (VTR) is switched to a special playback mode such as high-speed playback and the playback signal is supplied to a television receiver. This was discovered through study by the inventor. In this case, the frequency of the horizontal synchronization signal width (nominally 15750Hz
) and the frequency of the vertical synchronization signal fv (nominally 60 Hz), 262.5H, fluctuates, thereby causing the above-mentioned phenomenon.

[Purpose of the invention]

An object of the present invention is to provide a television receiver that can always obtain stable horizontal and vertical synchronization pulses regardless of the reception conditions, such as strong electric fields, 9 weak electric fields, etc.

[Summary of the invention]

A brief summary of the invention disclosed in the patent application is as described above.

In other words, the reception state of weak electric field 9 strong electric field, etc. is detected, and based on the detection signal, the time width in which a reset signal is supplied to the counter for obtaining the vertical synchronization pulse is controlled, and the reset operation due to noise components etc. in the weak electric field is controlled. This is to achieve the purpose of always obtaining stable horizontal and vertical synchronization pulses.

An embodiment of a television receiver to which the present invention is applied will be described below with reference to FIGS. 1 and 2.

1 is a receiving antenna, and received radio waves f.

is supplied to the high frequency amplification circuit 2'. High frequency amplifier circuit 2
has a tuning circuit, and a desired frequency signal fo' is selected and supplied to the mixing circuit 3 at the next stage. The local oscillation circuit 4 receives the above-mentioned frequency signal f. A frequency fL that is always 58.75 MHz higher than the carrier frequency of ' is oscillated and supplied to the frequency mixing circuit 3.

Note that the frequency fL is a frequency for a video carrier wave.

The output signal fM of the frequency mixing circuit 3 is the frequency signal fo'
and the frequency signal fL.

The output signal f of the video intermediate frequency circuit 5 is the output signal f of the video intermediate frequency circuit 5.
and the audio signal processing system 11.

The output signal fi of the video amplification circuit 6 is a video signal 9 color signal,
This is a so-called color television signal that includes a horizontal synchronization signal, a vertical synchronization signal, an audio signal, etc. The output signal f is a video signal processing system 122, a color signal processing system 13, and a synchronization signal processing system 14.
is supplied to each circuit block. Note that audio signal processing system 1
1 has an F'M detection circuit and an amplifier circuit, and a speaker 19
You can get audio output from. The video signal processing system 12 includes a video detection circuit, a video amplification circuit, etc., and obtains a luminance signal Y. The color signal processing system 13 is roughly divided into a color demodulation circuit and a color synchronization circuit, and the former is composed of a band amplification circuit, a nine-color demodulation circuit, a matrix circuit, a primary color output circuit, and the like. Further, the color synchronization circuit includes a burst amplification circuit, a nine-color subcarrier oscillation circuit, a phase shift circuit, and the like. The luminance signal Y is supplied to the primary color output circuit, and color difference signals of RY, G-Y, and BY are supplied from the matrix circuit. Then, from the primary color output circuit, R (red),
G (green) and B (red) color signals are obtained and supplied to each cathode of the picture tube 22.

Next, the operation of the synchronous signal processing system 140 will be described.

The synchronization separation circuit 31 separates the horizontal synchronization signal fH9 and the vertical synchronization signal fv from the color television signal f, and passes the bypass filter 32. It is supplied to a low-pass filter 41. From the bypass filter 32, a horizontal synchronizing pulse H shown in the 21st case is output.
Only differential pulses synchronized with P are obtained and supplied to the automatic phase control circuit 33 at the next stage. The automatic phase control circuit 33 is
A phase comparison is made between the horizontal synchronizing pulse H1 and an output signal HP' of a 1/2 power counter circuit (frequency dividing circuit) 35, which will be described later. Then, an output signal ■ with a voltage level corresponding to the phase difference between the two. The oscillation frequency f of the voltage controlled oscillation circuit 34 is determined by: is controlled to 2fH.

The oscillation frequency fo is 1/1 to obtain the horizontal synchronization signal fH.
The signal is supplied to the two-power counter circuit 35, and is also supplied to the Vc11525 counter circuit 36 to obtain the vertical synchronization signal fv, and is further supplied to the 262.5H delay circuit 37 as a clock signal. A pulse signal HP' with a frequency of 15,750 Hz is obtained from the 1/2 force counter circuit 35, and AP'
O circuit 33. The signal is supplied to the horizontal drive circuit 38. A sawtooth wave current fHs with a frequency of 15,750 Hz is obtained from the horizontal drive circuit 38 and is supplied to the horizontal deflection coil of the deflection coils 21. Also, ]1525 counter circuit 36
A pulse signal fvP with a frequency of 60 Hz is obtained from
262.5H delay circuit 37. The signal is supplied to the vertical drive circuit 39.

A sawtooth wave current fv6 with a frequency of 60 Hz is obtained from the vertical drive circuit 39, and is supplied to the vertical deflection coil of the deflection coils 21.

From the low-pass filter 41, a voltage signal fv' is obtained by integrating the vertical synchronizing signal fP as shown in FIG. 203+. The voltage signal fv' is a reference voltage V.

is supplied to a voltage comparator 42 provided with. voltage signal f
When the voltage level of V' is higher than the reference voltage V, a pulse signal Po as shown in FIG. 2(0) is obtained. The pulse signal PC is supplied to the AND circuit 510 input terminal a and the pulse width control circuit 43.

The pulse width control circuit 43 performs different operations in a weak electric field and in a strong electric field, and the control signal (2o) for this operation is obtained as described below.

First, we will discuss the case of a weak electric field.

When the electric field is weak, an AM component due to noise is superimposed on the color television signal f. Since the noise detection circuit 7 detects the color television signal f1, when a noise component is superimposed, its output voltage vc becomes high level. Output voltage V. The AGO circuit 8 operates according to the level change, and controls the frequency characteristics of the video intermediate frequency circuit 5. A control signal V for this purpose. ' is supplied to the video intermediate frequency circuit 5, and at the same time, the positive phase input terminal (+) of the voltage comparator 44.
Also supplied.

The voltage comparator 44 compares the reference voltage (2) and the control signal vo'. Then, the voltage level of both is Vc/)
When V, the control signal Pv is supplied to the pulse width control circuit 43. As a result, the time constant of the pulse width control circuit 430 is controlled, and the transmission time width of the pulse signal Po to the switch S is shortened.

- In the case of a strong electric field, the noise component in the color television signal f1 is reduced. Therefore, the output voltage V of the noise detection circuit 7. The voltage level of the control signal V c / obtained from the AGO circuit 8 also decreases.

Then, when Vo/(V), the control signal Pv that was being supplied to the pulse width control circuit 43 can no longer be obtained.

At this time, the shortening of the transmission time width is canceled in the pulse width control circuit 43.

Next, the opening/closing operation of switch S will be described.

That is, the 262.5 delay circuit 37 is supplied with a 2fH frequency signal fo as a clock signal, and sequentially counts this signal. Further, the vertical pulse fvP obtained from the 11525 counter is supplied as a reset signal. As a result, the frequency signal f. In other words, the output signal V is shifted by 262.5H every 525 counts. is supplied to the AND circuit 510 input terminal. And the output signal V. and the above pulse signal P. When synchronized with the output signal V of the AND circuit 51. ' is supplied to the RAM 52.

The RAM 52 receives the output signal V. ' is sequentially memorized to a predetermined address each time it is supplied.

Finally, the RAM 52 has a determination circuit (not shown) and outputs a signal V. ' is supplied every 262.5 H, the switch S1 is turned on.

Then, when the switch S1 is operated in an on state, a pulse signal P is generated. is supplied to the reset terminal R of the 11525 counter 36 via switch SI. Therefore, 1152
The frequency of the vertical pulse fv obtained from the 5 counter 36 is stabilized.

What should be noted here is that the transmission time (gate-on time) of the pulse signal PC is shortened by the pulse width control circuit 43 in the case of a weak electric field. In the case of a weak electric field, the time width of the pulse signal PC fluctuates due to the noise component, and other pulse signals appear due to the noise component. However, the pulse signal P. By shortening the gate-on time of the 11525 counter 36, the pulse signal PC necessary for resetting the 11525 counter 36 is supplied as a positive cent signal. Pulse signals generated outside the shortened gate-on time are blocked, thereby preventing the 11525 counter 36 from being reset unexpectedly.

The above circuit operation is performed in the same way when the VTR is set to high-speed reproduction and the reproduction signal is supplied, and the frequency of the vertical pulse fvP obtained from the 11525 counter 36 is stabilized.

〔effect〕

(1) Detect whether the received signal is in a weak electric field or a strong electric field, and shorten the time for transmitting a reset signal to the counter that obtains a vertical synchronization pulse only in the case of a weak electric field.

Therefore, unnecessary reset signals are prevented from being supplied to the counter, and the frequency of the vertical synchronization pulse is stabilized.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a television receiver showing one embodiment of the present invention, and the second prisoner (B) (0) is a waveform diagram for explaining the circuit configuration of the television receiver. 31... r'lA separation circuit, 41... Ronox filter, 42.44... Voltage comparator, 36... 1
/525 counter, 37...262.5 H delay circuit, 51...AND circuit, 52...RAM, 43...
... Norculus width control circuit, S, ... Gate-on control switch, fv'... Voltage signal, PC... Pulse signal, fvp... Vertical synchronization/(Rus.

Claims (1)

[Claims] 1. A comparator that compares the base level and the level of the received signal and obtains a detection signal when the received signal is above the reference level, a pulse width control circuit that shortens the signal transmission time when the detection signal is supplied, and a counting operation. and a counter circuit for obtaining a vertical synchronization pulse, the television receiver being configured such that the supply time of the reset signal supplied to the counter circuit is regulated by the pulse width control circuit. .