JPS59183043U - fm stereo receiver - Google Patents
fm stereo receiverInfo
- Publication number
- JPS59183043U JPS59183043U JP1983076696U JP7669683U JPS59183043U JP S59183043 U JPS59183043 U JP S59183043U JP 1983076696 U JP1983076696 U JP 1983076696U JP 7669683 U JP7669683 U JP 7669683U JP S59183043 U JPS59183043 U JP S59183043U
- Authority
- JP
- Japan
- Prior art keywords
- noise
- circuit
- stereo receiver
- stereo
- noise reduction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Noise Elimination (AREA)
- Stereo-Broadcasting Methods (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のFMステレオ受信機の一例を示す要部ブ
ロック回路図、第2図はこの考案によるFMステレオ受
信機の一例を示す要部ブロック図、第3図、第4図はこ
の考案にFMステレオ受信機の他の実施例を示す要部ブ
ロック図である。
1・・・・・・入力端子、2・・・・・・IFアンプ、
3・・・・・・復調回路、4・・・・・・ノイズ検出回
路、5・・・・・・ノイズリダクション回路、6・・・
・・・ステレオ復調回路、7a。
7b・・・・・・出力端子、8・・・・・・サプレッサ
ー回路、9・・・・・・ループ利得調整回路、9a・・
・・・・入力端子。Fig. 1 is a block diagram of the main parts showing an example of a conventional FM stereo receiver, Fig. 2 is a block diagram of main parts showing an example of an FM stereo receiver according to this invention, and Figs. FIG. 2 is a block diagram of main parts showing another embodiment of the FM stereo receiver. 1...Input terminal, 2...IF amplifier,
3... Demodulation circuit, 4... Noise detection circuit, 5... Noise reduction circuit, 6...
...Stereo demodulation circuit, 7a. 7b... Output terminal, 8... Suppressor circuit, 9... Loop gain adjustment circuit, 9a...
...Input terminal.
Claims (1)
の出力端に接続されたノイズリダクション回路と、この
ノイズリダクション回路に含まれるノイズ信号の検出時
にノイズ検出信号を発生して、前記ノイズリダクション
回路を制御することによりノイズリダクションを行なっ
た信号をステレオ復調回路に供給させるノイズ回路とを
備えたFMステレオ受信機。A demodulation circuit that demodulates a composite signal, a noise reduction circuit connected to the output end of this demodulation circuit, and a noise detection signal generated when detecting a noise signal included in this noise reduction circuit to control the noise reduction circuit. An FM stereo receiver comprising: a noise circuit that supplies a noise-reduced signal to a stereo demodulation circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983076696U JPS59183043U (en) | 1983-05-20 | 1983-05-20 | fm stereo receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983076696U JPS59183043U (en) | 1983-05-20 | 1983-05-20 | fm stereo receiver |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59183043U true JPS59183043U (en) | 1984-12-06 |
JPH042517Y2 JPH042517Y2 (en) | 1992-01-28 |
Family
ID=30206743
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1983076696U Granted JPS59183043U (en) | 1983-05-20 | 1983-05-20 | fm stereo receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59183043U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5289011A (en) * | 1976-01-20 | 1977-07-26 | Ratsukusu Kk | Method of eliminating oscillation of radio receiver |
-
1983
- 1983-05-20 JP JP1983076696U patent/JPS59183043U/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5289011A (en) * | 1976-01-20 | 1977-07-26 | Ratsukusu Kk | Method of eliminating oscillation of radio receiver |
Also Published As
Publication number | Publication date |
---|---|
JPH042517Y2 (en) | 1992-01-28 |
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