JPS59178829A - Failure detecting system of receiver - Google Patents

Failure detecting system of receiver

Info

Publication number
JPS59178829A
JPS59178829A JP58052523A JP5252383A JPS59178829A JP S59178829 A JPS59178829 A JP S59178829A JP 58052523 A JP58052523 A JP 58052523A JP 5252383 A JP5252383 A JP 5252383A JP S59178829 A JPS59178829 A JP S59178829A
Authority
JP
Japan
Prior art keywords
receiver
squelch
output
circuit
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58052523A
Other languages
Japanese (ja)
Other versions
JPS6357975B2 (en
Inventor
Masabumi Ito
伊東 正文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58052523A priority Critical patent/JPS59178829A/en
Publication of JPS59178829A publication Critical patent/JPS59178829A/en
Publication of JPS6357975B2 publication Critical patent/JPS6357975B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/10Means associated with receiver for limiting or suppressing noise or interference
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/20Monitoring; Testing of receivers

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
  • Noise Elimination (AREA)

Abstract

PURPOSE:To prevent mis-detection of a failure of receiver by ORing exclusively the result of comparison of a noise squelch output and a carrier squelch output respectively with a lower limit value so as to block the discriminating operation of a failed receiver with the output of operation. CONSTITUTION:In a figure (a), 10 is a squelch circuit of the 1st receiver and 12 shows a squelch circuit of the 2nd receiver. A squelch gate signal from the squelch circuits 10, 12 is applied to an exclusive OR gate 18 via lines 14 and 16 and ORed exclusively. A figure (b) shows the constitution of the squelch circuits 10 and 12. In the figure (b), the exclusive OR between the output of the 1st detecting circuit 38 detecting whether or not the non-sound band noise component of the demodulated output of each receiver is a prescribed lower limit value or over and of the 2nd detecting circuit 40 detecting whether or not the carrier component of each receiver is a prescribed lower limit or over is operated by an exclusive NOR gate 42 to block the discrimination of a failed receiver depending on the output.

Description

【発明の詳細な説明】 発明の技術分野 本発明は、FM受信機あるいはAGC(自動利得制御機
構)付のA、 M受信機の障害発生を検出する方式に関
する。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a method for detecting the occurrence of a failure in an FM receiver or an A or M receiver equipped with an AGC (automatic gain control mechanism).

技術の背景 受信機の障害検出は、一般に2台以上の同等とみなされ
る受信機を並列に動作させそれぞれのスケルチ機構力を
デジタル的もしくはアナログ的に処理することによって
行われる。この場合、各受信機がそれぞれ基準受信機と
なりうるように構成される。
Background of the Technology Receiver failure detection is generally performed by operating two or more equivalent receivers in parallel and digitally or analogously processing the squelch mechanism force of each receiver. In this case, each receiver is configured to be able to serve as a reference receiver.

受信機のスケルチ機能とは、弱電界入力時に受信機雑音
を出力しないようにする機能であり、復調器出力あるい
は音声周波増幅器をスケルチゲート信号によって開閉す
ることによって行わizる。
The squelch function of the receiver is a function that prevents receiver noise from being output when a weak electric field is input, and is performed by opening and closing the demodulator output or the audio frequency amplifier using a squelch gate signal.

スケルチゲ−ト信号を発生させる方式としては、スケル
チ出力の相違から次の三種類のものがある。
There are three types of methods for generating squelch gate signals based on differences in squelch output:

(1)復調器出力に含まれる音声周波数帯域外の雑音成
分をスケルチ出力として検出しその検出レベルの大小に
よってスケルチゲ−ト信号を発生させるノイズスケルチ
方式、(2)搬送波(中間周波)成分をスケルチ出力と
して検出し、その検出レベルの大小によってスケルチゲ
ート信号を発生させるキャリアスケルチ方式、(3)復
調器出力の非音声周波数帯域の雑音成分及び搬送波成分
の両方をスケルチ出力として用いる併用方式。
(1) A noise squelch method that detects the noise component outside the audio frequency band included in the demodulator output as a squelch output and generates a squelch gate signal depending on the detection level; (2) Squelches the carrier wave (intermediate frequency) component. A carrier squelch method detects it as an output and generates a squelch gate signal depending on the magnitude of the detection level, and (3) a combined method uses both the noise component in the non-audio frequency band of the demodulator output and the carrier wave component as the squelch output.

従来技術と問題点 従来の障害検出方式として次の二つの方法が知られてい
る。
Prior Art and Problems The following two methods are known as conventional failure detection methods.

(a)  第1図に示すように、第1受信機と第2受信
機とがそれぞれスケルチゲート信号検出用のしきい値S
Q+ 、 SQ2を有し、スケルチ出力がこれらのしき
い値を越えたか否かによってスケルチダート信号を発生
させ、第1及び第2受信機からのスケルチゲート信号を
排他的論理和回路によって論理演算することによって障
害受信機を判定する方法、(b)  第2図に示すよう
に第1受信機のスケルチ出力及び第2受信機のスケルチ
出力をそのアナログ量の凍ま差動増幅器に印加し、その
差動増幅器の出力をしきい値と比較すると共に極性判定
して障害受信機を判定する方法。
(a) As shown in FIG. 1, the first receiver and the second receiver each have a threshold value S for squelch gate signal detection.
Q+ and SQ2, generates a squelch dart signal depending on whether the squelch output exceeds these thresholds, and performs a logical operation on the squelch gate signals from the first and second receivers using an exclusive OR circuit. (b) As shown in FIG. 2, the squelch output of the first receiver and the squelch output of the second receiver are applied to the analogue freezing differential amplifier; A method for determining a faulty receiver by comparing the output of a differential amplifier with a threshold value and determining polarity.

しかしながら前記(a)の方法は、各受信機のしきい値
SQl、SQ2間に差があるときその中間領域で誤った
障害判定をしてしまう恐れがち之。各受信機は、これら
が構成上回等であるとしても特性的には必ず差異が生じ
るものであり、しきい値SQs 。
However, in the method (a), when there is a difference between the threshold values SQl and SQ2 of each receiver, there is a risk that an erroneous failure determination may be made in the intermediate region. Even if each receiver has a superior configuration, there will always be differences in characteristics, and the threshold value SQs.

SQ2間にもいくらかの差異が必ず存在するものである
。また、前記(b)の方法は、各受信機のスケルチ出力
としてノイズスケルチ出力とキャリアスケルチ出力との
両方を加算したものを用いた場合に、ノイズスケルチ出
力とキャリアスケルチ出力との相関関係が一定に保たれ
ないことかあるだめ、誤った障害判定を行ってしまう恐
れがある。例えば、電車の・9ンタグラフと給電線との
摺動によって生じる火花放電や電波の異常伝搬等に基づ
くレベル的、周波数的に異常な妨害電波換言すれば周波
数、レベルが不安定で大きく偏移する電波、あるいは受
信機の中間周波フィルタの減衰領域付近の周波数帯域の
電波等は、受信機内での位相回転が激しいため、搬送波
があるにもかかわらず復調雑音が多くスケルチ出力カー
ブにおけるノイズ領域とキャリア領域との直線性が保た
れない。このだめ誤った障害判定を行う恐れがある。
There will always be some differences between SQ2. In addition, in the method (b) above, when the squelch output of each receiver is the sum of both the noise squelch output and the carrier squelch output, the correlation between the noise squelch output and the carrier squelch output is constant. If this is not maintained, there is a risk of incorrect failure determination. For example, abnormal radio interference in terms of level and frequency due to spark discharge caused by sliding between a train's antenna graph and the power supply line, abnormal propagation of radio waves, etc. In other words, the frequency and level are unstable and greatly deviate. Radio waves, or radio waves in the frequency band near the attenuation region of the receiver's intermediate frequency filter, undergo severe phase rotation within the receiver, so even though there is a carrier wave, there is a lot of demodulation noise, and the noise region and carrier in the squelch output curve Linearity with the area is not maintained. This may lead to incorrect failure determination.

発明の目的 従って本発明は従来技術の上述の不都合を解決するもの
であり、本発明の目的は、受信機障害の誤検出がなく、
安定した検出が素早く行える障害検出方式を提供するこ
とにある。
OBJECTS OF THE INVENTION Accordingly, the present invention solves the above-mentioned disadvantages of the prior art, and it is an object of the present invention to avoid false detection of receiver failures,
The object of the present invention is to provide a fault detection method that can perform stable detection quickly.

発明の構成 上述の目的を達成する本発明の特徴は、複数の受信機の
スケルチ機構からの出力に応じて障害受信機の判定を行
う受信機の障害検出方式において、各受信機の復調出力
の非音声帯域雑音成分が所定の下限値以上であるか否か
を検出する第1検出回路と、各受信様の搬送波成分が所
定の下限値以上であるか否かを検出する第2検出回路と
、前記第1及び第2検出回路の出力の排他的論理和を演
算する回路と、該演算回路の出力に応じて前記障害受信
機判定動作を阻止する回路とを備えだことにある。
Structure of the Invention A feature of the present invention that achieves the above-mentioned object is that in a receiver fault detection method that determines a faulty receiver according to outputs from squelch mechanisms of a plurality of receivers, the demodulated output of each receiver is a first detection circuit that detects whether the non-voice band noise component is greater than or equal to a predetermined lower limit; and a second detection circuit that detects whether or not the carrier wave component of each receiver is greater than or equal to the predetermined lower limit. , a circuit for calculating an exclusive OR of the outputs of the first and second detection circuits, and a circuit for blocking the faulty receiver determination operation in accordance with the output of the calculation circuit.

発明の実施例 第3図は本発明の一実施例の全体の構成を概略的に表わ
している。同図において、10は第1受信機のスケルチ
回路、12は第2受信機のスケルチ回路を示している各
スケルチ回路10 、1.2からのスケルチゲート信号
は線14.16を介してエクスクル−シブオアゲート1
8に印加され排他的論理和演算される。エクスクル−7
プオアグート18の出力はアンドゲート20を介して警
報器22に印加される。また、各スケルチ回路10.1
2からの障害判定阻止信号は線24.26を介してオア
ゲート28に印加され、このオアゲート28の出力はア
ンドゲート20の否定入力に印加されこのアンドゲート
20のオンオフ制御を行う。
Embodiment of the Invention FIG. 3 schematically shows the overall configuration of an embodiment of the invention. In the figure, 10 indicates the squelch circuit of the first receiver, and 12 indicates the squelch circuit of the second receiver.The squelch gate signals from each squelch circuit 10, 1.2 are externally connected via lines 14.16. Shibuorgate 1
8 and is subjected to an exclusive OR operation. Excl-7
The output of the poor gate 18 is applied to the alarm 22 via an AND gate 20. In addition, each squelch circuit 10.1
2 is applied to an OR gate 28 via lines 24 and 26, and the output of this OR gate 28 is applied to the negative input of an AND gate 20 to control ON/OFF of this AND gate 20.

第4図は第3図の各スケルチ回路10.12の構成を示
している。同図において、30は受信機復調出力の高域
雑音成分を検出し正の整流出力を発生するノイズスケル
チ検出回路であり、32は搬送波成分を検出し負の整流
出力を発生するキャリアスケルチ検出回路である。ノイ
ズスケルチ検出回路30及びキャリアスケルチ検出回路
32からの出力はそれぞれ第5図に示す如き、対着信入
力特性を有している。これらの出力は加算器34におい
て互いに加算され、両者の特性が直線的に接合するよう
に設定される。この場合、受信機の入力換算で−15〜
+15 dBμVの範囲で任意にミー−ティング可能な
ように設定される。加算器34の出力は比較回路36に
おいて所定のしきい値と比較され、その結果スケルチゲ
ート信号が形成される。このスケルチゲート信号は第3
図に示す如く各受信機のスケルチ回路10.12から出
力され、線14.16をそれぞれ介してエクスクル−シ
ブオアゲート18に印加される。各受信機からのスケル
チダート信号とエクスクルーシプオアケ゛−ト18の出
、力と障害判定内容との関係は次表の如くなる。
FIG. 4 shows the configuration of each squelch circuit 10, 12 in FIG. 3. In the figure, 30 is a noise squelch detection circuit that detects the high-frequency noise component of the receiver demodulated output and generates a positive rectified output, and 32 is a carrier squelch detection circuit that detects the carrier component and generates a negative rectified output. It is. The outputs from the noise squelch detection circuit 30 and the carrier squelch detection circuit 32 each have incoming call input characteristics as shown in FIG. These outputs are added together in an adder 34, and the characteristics of both are set so as to be linearly joined. In this case, -15 ~ in terms of receiver input
It is set so that meetings can be held arbitrarily within the range of +15 dBμV. The output of adder 34 is compared with a predetermined threshold in comparison circuit 36, resulting in the formation of a squelch gate signal. This squelch gate signal
As shown, the signals are output from squelch circuits 10.12 of each receiver and applied to exclusive OR gates 18 via lines 14.16, respectively. The relationship between the squelch dart signal from each receiver, the output of the exclusion channel 18, the power, and the fault determination contents is as shown in the following table.

本発明では、このような判定結果に判定阻止乗件を加味
して真の障害のみを検出するようにしているのである。
In the present invention, only true faults are detected by adding the judgment blocking condition to such judgment results.

判定阻止はアンドゲート20をオフとすることによって
行われ、このアンドゲート20のオン、オフはオアゲー
ト28の出力によって行われる。オアゲート28には前
述の如く、各スケルチ回路10.12から障害判定阻止
信号が印加される。各スケルチ回路において、障害判定
阻止信号は、比較回路(第1及び第2検出回路)38及
び40、エクスクルーシプノアグート42によって形成
される。即ち、ノイズスケルチ検出回路30からのノイ
ズスケルチ出力は比較回路38において所定の下限値し
1以上であるが否が判別される。以上の場合はtt 1
 n、未満の場合は′O”の信号が比較回路38から出
力される。一方、キャリアスケルチ検出回路32からの
キャリアらケルチ出力は比較回路40においてその絶対
値が所定の下限値し2以上であるか否か判別される。以
上の場合は°1”、未満の場合は′0”の信号が比較回
路40から出力される。各比較回路38及び40からの
出力はエクスクルーシプノアケ゛−ト42に印加されそ
の狛果得られる障害判定阻止信号とその意味する内容は
次表の如くなる。
The judgment is inhibited by turning off the AND gate 20, and the AND gate 20 is turned on and off by the output of the OR gate 28. As described above, the fault determination prevention signal is applied to the OR gate 28 from each squelch circuit 10.12. In each squelch circuit, a fault determination prevention signal is formed by comparison circuits (first and second detection circuits) 38 and 40 and an exclusive no-agut 42. That is, the comparison circuit 38 determines whether the noise squelch output from the noise squelch detection circuit 30 is equal to or greater than a predetermined lower limit value of 1 or not. If above, tt 1
n, an 'O' signal is output from the comparator circuit 38. On the other hand, the carrier squelch output from the carrier squelch detection circuit 32 is outputted by the comparator circuit 40 when its absolute value is a predetermined lower limit value and is 2 or more. It is determined whether or not there is a signal. If it is above, a signal of 0 is output from the comparison circuit 40. If it is less than 0, a signal of 0 is output from the comparison circuit 40. The fault determination prevention signals applied to the gate 42 and their meanings are as shown in the following table.

以下余白 どちらか一方あるいは両方の受信機からの障害判定阻止
信号が1”となればオアゲート28の出力が1”となり
アンドゲート20が閉じて障害判定動作が阻止される。
If the failure determination prevention signal from one or both of the receivers becomes 1'', the output of the OR gate 28 becomes 1'', the AND gate 20 closes, and the failure determination operation is inhibited.

障害判定動作が阻止されるのは、比較回路38及び40
の出力が共に′0”あるいは共に′1#と々っだ場合で
ある。
The fault determination operation is blocked by the comparison circuits 38 and 40.
This is a case where the outputs of both are '0' or both are '1#'.

比較回路38及び40の出力が共に°“0″となるのは
、スケルチ出力がLlより小さくかつキャリアスケルチ
出力の絶対値がL2よシ小さい場合である(第6図のa
の部分)。この範囲ではノイズスケルチ出力とキャリア
スケルチ出力との直線性が保てないため、またレベルが
不安定なだめ障害判定を行わないようにしているのであ
る。一方、比較回路38及び40の出力が共に1”とな
るのは、ノイズスケルチ出力が51以上でありかつキャ
リアスケルチ出力がL2以上の場合である。
The outputs of the comparison circuits 38 and 40 are both "0" when the squelch output is smaller than Ll and the absolute value of the carrier squelch output is smaller than L2 (a in FIG. 6).
part). In this range, the linearity between the noise squelch output and the carrier squelch output cannot be maintained, and the level is unstable, so failure determination is not performed. On the other hand, the outputs of the comparison circuits 38 and 40 are both 1'' when the noise squelch output is 51 or more and the carrier squelch output is L2 or more.

このような状態は通常溝えられないだめ障害判定動作を
行っているのである。即ち、スケルチ出力が第6図の−
どちらか一方の斜線の範囲内にあるときのみ障害判定動
作を行うようにしている。
Normally, in such a situation, the failure judgment operation is carried out because it cannot be resolved. That is, the squelch output is - in Fig. 6.
The fault determination operation is performed only when the range is within one of the diagonal lines.

発明の効果 以上詳細に説明したように本発明によればノイズスケル
チ出力及びキャリアスケルチ出力をそれぞれ下限値と比
較した結果を排他的論理和演算し、その演算出力により
障害受信機判定動作の阻止を行うようにしているため、
受信機障害の誤検出を硫失に防止することができる。正
しい検出が安定して行えるため、@薔検出時に意図的に
時間遅れを起す等の必要がなく比較的高速の受信機障害
検出を行うことができる。
Effects of the Invention As explained in detail above, according to the present invention, the results of comparing the noise squelch output and the carrier squelch output with the lower limit values are subjected to an exclusive OR operation, and the output of the operation is used to prevent the faulty receiver determination operation. Because I try to do it,
Erroneous detection of receiver failure can be completely prevented. Since correct detection can be performed stably, there is no need to intentionally cause a time delay when detecting @rose, and receiver failure detection can be performed at a relatively high speed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は従来の障害検出方式の説明図、第3
図は本発明の一実施例の全体、を表わすブロック図、第
4図は第3図のスケルチ回路のブロック図、第5図はス
ケルチ出力の特性図、第6図は本発明における障害判定
阻止範囲を説明する図である。 10.12・・・スケルチ回路、18・・・エクスクル
ーシプオアケ”−ト、20・・・アンドゲート、22・
・・警報器、28・・・オアゲート、30・・・ノイズ
スケルチ検出回路、32・・・キャリアスケルチ検出回
路、34・・・加算回路、36,38.40・・・比較
回路、42・・・エクスクル−シブノアブート。 第1受信機   第2受信機 第4図 0 U 第5図
Figures 1 and 2 are explanatory diagrams of conventional failure detection methods;
FIG. 4 is a block diagram of the squelch circuit shown in FIG. 3, FIG. 5 is a squelch output characteristic diagram, and FIG. 6 is a block diagram showing the entire embodiment of the present invention. It is a figure explaining a range. 10.12...Squelch circuit, 18...Exclusion or gate, 20...And gate, 22.
... Alarm, 28... OR gate, 30... Noise squelch detection circuit, 32... Carrier squelch detection circuit, 34... Addition circuit, 36, 38.40... Comparison circuit, 42...・Exclusivino boot. 1st receiver 2nd receiver Fig. 4 0 U Fig. 5

Claims (1)

【特許請求の範囲】 1 複数の受信機のスケルチ機構からの出力に応じて障
害受信機の判定を行う受信機の障害検出方式において、
各受信機の復調出力の非音声帯域雑音成分が所定の下限
値以上であるか否かを検出する第1検出回路と、各受信
機の搬送波成分が所定の下限値以上であるか否かを検出
する第2検出回路と、前記第1及び第2検出回路の出力
の排他的論理和を演算する回路と、該演算回路の出力に
応じて前記障害受信機判定動作を阻止する回路とを備え
たことを特徴とする受信機の障害検出方式。 2 各受信機の前記スケルチ機構が復調出力の非音声帯
域雑音成分と搬送波成分との両成分を用いるものである
特許請求の範囲第1項記載の障害検出方式。 3 前記スケルチ機構が復調出力の非音声帯域雑音成分
と搬送波成分とを加算する加算回路と、該加算回路の出
力を所定のしきい値と比較する回路とを含んでいる特許
請求の範囲第2項記載の障害検出方式。
[Claims] 1. A receiver fault detection method that determines a faulty receiver according to outputs from squelch mechanisms of a plurality of receivers,
a first detection circuit that detects whether the non-voice band noise component of the demodulated output of each receiver is greater than or equal to a predetermined lower limit; and a first detection circuit that detects whether the carrier wave component of each receiver is greater than or equal to the predetermined lower limit. A second detection circuit for detecting the faulty receiver, a circuit for computing an exclusive OR of the outputs of the first and second detection circuits, and a circuit for blocking the faulty receiver determination operation according to the output of the arithmetic circuit. A fault detection method for a receiver is characterized by: 2. The fault detection method according to claim 1, wherein the squelch mechanism of each receiver uses both a non-voice band noise component and a carrier wave component of the demodulated output. 3. Claim 2, wherein the squelch mechanism includes an adder circuit that adds a non-voice band noise component and a carrier wave component of the demodulated output, and a circuit that compares the output of the adder circuit with a predetermined threshold value. Fault detection method described in section.
JP58052523A 1983-03-30 1983-03-30 Failure detecting system of receiver Granted JPS59178829A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58052523A JPS59178829A (en) 1983-03-30 1983-03-30 Failure detecting system of receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58052523A JPS59178829A (en) 1983-03-30 1983-03-30 Failure detecting system of receiver

Publications (2)

Publication Number Publication Date
JPS59178829A true JPS59178829A (en) 1984-10-11
JPS6357975B2 JPS6357975B2 (en) 1988-11-14

Family

ID=12917100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58052523A Granted JPS59178829A (en) 1983-03-30 1983-03-30 Failure detecting system of receiver

Country Status (1)

Country Link
JP (1) JPS59178829A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02159841A (en) * 1988-12-14 1990-06-20 Matsushita Electric Ind Co Ltd Receiver fault detector
JPH0298535U (en) * 1989-01-25 1990-08-06
JPH04247723A (en) * 1991-02-01 1992-09-03 Fujitsu Ten Ltd Detector for radio communication wave
JP2020053786A (en) * 2018-09-26 2020-04-02 株式会社日立国際電気 wireless device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02159841A (en) * 1988-12-14 1990-06-20 Matsushita Electric Ind Co Ltd Receiver fault detector
JPH0298535U (en) * 1989-01-25 1990-08-06
JPH04247723A (en) * 1991-02-01 1992-09-03 Fujitsu Ten Ltd Detector for radio communication wave
JP2020053786A (en) * 2018-09-26 2020-04-02 株式会社日立国際電気 wireless device

Also Published As

Publication number Publication date
JPS6357975B2 (en) 1988-11-14

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