JPS59178549A - Shift ring circuit - Google Patents

Abstract

PURPOSE:To enable using for log out in a module such as LSI etc. by forming a shift ring circuit connected only to a shift register latch to be logged out when executing log out. CONSTITUTION:When log out is performed by occurrence of an error, clock of a terminal C1 is stopped, a terminal S1 is set to 1, and clock A and clock B are applied from terminals A1 and B1 respectively. Accordingly, only the first shift ring circuit 12 is shifted out from a terminal So1. At this time, terminals A, B, S of shift register latches 5G, 5H etc. connected to the second shift ring circuit 15 are 0, and normal clock from a terminal C2 does not stop. Accordingly, these shift register latches 5G, 5H etc. continue normal operation. Thus, a shift ring circuit that is connected only to a shift register latche to be logged out when executing log out during system operation is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a shift ring circuit in a logic circuit designed to improve testability.

In recent years, as the degree of integration of LSIC (large-scale integrated circuits) has improved significantly, the amount of logic included in one unit to be tested has increased. Time and costs increase rapidly. To deal with this, conventionally, a shift function was added to the memory holder (lunch) in the logic circuit, and all the latches were connected by a shift hash to form one shift register (hereinafter referred to as a shift ring circuit). ) is generally widely used.

In a conventional shift ring circuit configured in this way, a large number of memory holders (launches) in one test object such as an LST are all connected to the shift ring circuit, so there is no shift path. It is possible to retrieve the value of each latch externally through - or set an arbitrary value to each latch, and each latch
It can be regarded as a pseudo-human power/output driver, and the entire circuit will be made into a combinational circuit (a circuit with only gates and no latches) - commercials such as the so-called "D algorithm")
((1mputer aided design)
This enables automatic test generation by a program.

FIG. 1 is a block diagram of a conventional launch having the above-mentioned shift function. (1) is the 2T01 selector, and when the shift mode terminal "other" has a value of "1", the shift-in input "
S IJ is selected, and the shift mode terminal “Sword is” O
When the value is "1", the input rDJ is selected. (2) (31 is a level sensitive bracket, and when the terminal I'CLKl is the value "1", the value of the terminal middle moon is selected. IJ1 is output as is to terminal rDOJ.Also, terminal r
(, ILl(When j is the value "O", the value of q in the terminal immediately before reading "O" is held.

Next, Fig. 2 shows the shift register latch (5) that is assembled into one block of the latch of the building in Fig. 1 mentioned above.During normal operation, this shift register latch (5)
5) Shift mode input terminal rsj, A clock input terminal JAJ, and B clock input terminal The values of the six input terminals are held at "0".
It goes without saying that the clock and B clock are generally called "shift clocks" and are used exclusively for shifting. At this time, the data input terminal ``Q'' is the terminal of the first latch (2), and the normal clock input terminal [Q is OFI, and the terminal of the first latch (2) is passed through the gate (4). In addition, the terminal ID01 of the first latch (2) is connected one-to-one to the “Q” terminal.
The shift register latch (5) performs a normal launch operation.

Next, in the shift mode, the value of the shift mode terminal "S" is set to 1", and the normal clock input terminal "q" is held at D", and the value of the shift mode terminal "S" is set to 1", and the normal clock input terminal "q" is held at D", and the value of the shift mode terminal "S" is set to The terminals are sequentially energized and set to +Nt QK so that the value of the shift-in terminal "S" is transmitted to the shift terminal I'sOI, and this state is shown in the time chart of FIG.

Next, Figure 4 shows one logic module such as an LSI (
6), multiple shift register clutches (5A) (5
B) Shift terminal 1'-8OJ of (5C) and (5D)
and the shift-in terminal "S month" respectively.
In the block diagram showing the configuration of the IJ song path, the broken line between shift register latches (5B) and (5C) indicates that a large number of shift register latches are connected between them, although not shown. It shows.

In order to shift the IJ song path in FIG.
After setting the shift mode terminal "S month value to 1" and setting the shift-in data to the shift-in terminal [5IIJ, change the terminal "A1" and the terminal "B month to 1", as in the case of Fig. 3 above. Similarly, if you apply the A clock and B clock, the shift-out data will be transferred to the terminal "
They will be output sequentially starting in August.

Note that it is also possible to use the above-mentioned shift-in data for other purposes than testing, for example.

When an error occurs during system operation, the system clock is stopped and the service processor is shifted.
It can also be used for what is called a 10-day shift circuit, in which the contents of the shift register latch connected to the song path are shifted out and recorded as data for error analysis. If used, the following problems will occur.

That is, when a shift operation is performed in the shift ring circuit of FIG. 4 described above, the clock is normally stopped (terminals 1'-C1J l'-C2J are fixed at "0"),
Each shift register latch serves as a path for shift data. That is, during the execution of a shift, the normal functions of each shift register clutch are completely stopped. However, when the shift ring circuit described above is used for "logout", the shift register clutch may have to operate as usual even during logout. For example, "dynamic RAM J refresh system (the ill1 circuit corresponds to this, and the fourth
If the shift register latches (5e) (5D) shown in the figure are shift L/') scratches as described above, the shift register latches (5C) (5f)) are
You must continue to cultivate islands as usual even while logging out. In other words, the clock supply to the terminals of these shift register latches must not be stopped.
These shift register latches must not become a path for shift data. Therefore, the shift ring circuit of the logic module containing the above-mentioned shift register latch - which needs to be removed from the "shift hash" for "logout" - in Fig. 4 - shift register latch C3C)C50) Itf Y may be removed from the shift ring circuit. However - the shift ring circuit in this case has the disadvantage that even if it can be used for "logout", automatic test generation by a CAD program is not possible.

In addition, as another means, the shift register clutches (5C) (5D) shown in FIG. 4 and other shift data and clutches (5A) (5B) are divided into different groups
This is a method of creating two completely separate shift ring circuits, with the shift register launch (5C) (5D) & shift ring circuit not included being used for both testing and logout, and the shift register latch (5C) ( The shift ring circuit configured by the logic module (5D) is intended to be used only for testing purposes, but in such a case, two sets of shift ring circuits are required, so the logic module (
6) Each terminal "S1 month rAIJ rB month circle month and l'
- Two sets of 8 oil are required, resulting in an increase of 5 pins. And if the logic module (6) is an LSI,
Bottles are extremely valuable, and an increase in the number of bottles has the disadvantage of being a huge burden.

The present invention has been made with attention to this point, and an object thereof is to provide a shift ring circuit that can be used for one logout without increasing the number of module bins too much.

That is, FIG. 5 shows an embodiment of this invention.
(11) is one logic module like LSZ, and (
12) is the shift ring circuit of Era 1, which is configured by connecting multiple shift register latches (5E) (5F), etc., which may be shifted during logout. (15) must operate normally even during logout. A second shift ring circuit configured by connecting a plurality of shift register clutches < 5G) (5H), etc., which must be connected, the shift-in terminal "S1" of the logic module (11)
This first shift ring circuit (12) is connected to the shift-in terminal 'S' of the shift ring circuit (12), and this first shift ring circuit (12)
Shift terminal [SO, l is the second shift] IJ song 1
5) The shift-in terminal “S” is connected to the
One input of the 2TO1 selector (18) and 1. It is made like this. Further, the input terminal 1"I'J of the logic module 11) is a feature of the present invention, and a signal indicating whether or not it is in the test mode is input to the input terminal 1"I'J. Sometimes, the value of this input terminal "J", l is set to "1"), thereby creating an AND game) (19),
(20) and (21) open and shift mode terminal “S”
The values of month, A clock terminal n month, and B clock terminal mark month are
The signal is transmitted to each shift register clutch (5G) (5H), etc. that constitute the second shift ring circuit (15). In addition, the above 2'l”01 selector (18
), the output of the second shift ring circuit (15) is selected and na JLy (11) (7)
Terminal "5O7J Vctii is applied.

Therefore, in this case, the first shift ring circuit (12) and the second shift ring circuit (15) are connected to each other to form one shift ring circuit and perform rJb operation.

Next, when operating as a system, input terminal 1 is O.
” (19).

(20) and (21) are closed and each shift register clutch (5G) belongs to the second shift ring circuit (15)
(5H), each terminal rsJ, rAJ, "river value becomes 0", and in the 2TO1 selector (18), the input pane opening" is "O", so the shift ring circuit (12 ) is selected and output to the terminal rso of the logic module (11).

Next, when an error occurs and logout is performed, the clock on the terminal C is stopped, the middle phase of the terminal is set to 1'', and the A clock is output from the terminals A1 and A, respectively. and B clock are applied, and only the first shift ring circuit (12) is configured to be shifted out from the terminal "SO1". This moment,
Terminal leg "river" of each shift register launch (5G) (5H) etc. connected to the second shift ring circuit (15)
Since the sword remains at "0" and the normal clock from terminal 2 does not stop, these shift register latches (5G) (5H), etc. continue to operate normally.

As described above, according to the shift ring circuit of the present invention, all shift register clutches in a logic module can be used during testing without increasing the number of pins of the module (only 1 pin increases) in a module such as an LSI. A shift ring circuit connected to each other is formed, and
When a logout is executed during system operation, a shift ring circuit is formed in which only the logout shift register latch is connected. Therefore, as described above, the shift ring circuit of the present invention can be used not only for automatic test generation using a CAD program, but also for logout, etc. It has excellent effects and can be used for other purposes as well.

[Brief explanation of the drawing]

Figure 1 is a block diagram of a conventional latch with a shift function, Figure 2 is a block diagram of a shift register latch that combines multiple launches into one block, and Figure 3 is a block diagram of a shift register latch that has a shift function. FIG. 4 is a block diagram showing a shift ring circuit in one logic module such as an LSI, and FIG. 5 is a block diagram showing an embodiment of the present invention. In the drawing, (5E) (5F) (5G) O6 and (5H) are shift register latches, (11) is a logic module, (
12] is the first (D shift) IJ link circuit% (15) is the second shift ring circuit, (18) is the selector, (19)
(20H21) is increased by the AND gate. Note that the same reference numerals in the figures indicate the same or corresponding parts. Agent Makoto Kuzuno - Figure 1 Figure 2 Shift A > M hand (SI) A70・N7 (A) U・N + 26 power (0) 87 Kuchi・N7 (B) Amount of 1 set of Kift +(So) Figure 4

Claims (1)

[Scope of Claims] (1) In a logic module provided with a first shift ring circuit consisting of a plurality of shift register clutches having a shift function and a second shift I/J song path, during testing. A shift ring circuit is formed in which all shift register latches in the logic module are connected to each other, and when logout is executed during system operation, a selector is connected to form a shift ring circuit in which only shift register latches to be logged out are connected. A shift ring circuit characterized in that it is inserted into first and second shift ring circuits. (The shift according to claim 1, characterized in that a 2TO1 selector is used as the 2+ selector) IJ song path. (6) The selector receives the output of the first shift ring circuit,
inputting the output of the second shift ring circuit, selecting the output of the second shift ring circuit when the test signal is ON, selecting the output of the first shift ring circuit when the test signal is OFF, 2. The shift ring circuit according to claim 1, wherein the shift ring circuit is configured to output to a shift out terminal of a logic module.