JPS5917605B2 - Circuit device for parallel connection of AC systems - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is a switch-on circuit device for connecting AC systems in parallel or for connecting a generator to an AC system in operation. The phase positions of the voltages of the AC system are compared in a phase comparator, which includes a logic circuit for generating a pulse train having a width proportional to the phase angle between the voltages, and a logic circuit disposed after the logic circuit. a filter for obtaining a triangular wave voltage that changes with the period of the frequency difference between the two voltages, a differentiating circuit connected to the filter, and a differentiating circuit coupled to the differentiating circuit and the filter for determining the turning-on point of the switch. Regarding those equipped with a limit value circuit.

The circuit arrangement can then include a control arrangement for the generators to be connected to form a j5 synchronization arrangement or can be used as a parallel connection arrangement. Such an electronic circuit arrangement is known from German Patent No. 1,538,087.

The circuit arrangement is constructed entirely electronically and is therefore almost perfect with respect to the achievable measuring accuracy. The object of the invention is to further improve the known electronic circuit arrangement in order to achieve a very high operational reliability and thus to meet the ever-increasing demands in this regard. To achieve this object, according to the invention, the phase comparison device of the electronic circuit arrangement mentioned at the outset generates a further pulse train with a pulse width proportional to the angle reduced by the phase angle between 180 and the voltage. Another logic circuit is placed after this logic circuit, and from this logic circuit, the waveform changes at the period of the frequency difference between the two voltages, and has a transition of 1800 for one triangular wave voltage. A further phased triangular voltage is generated, and a further limit value circuit for determining the switching point is connected to the further filter, on the one hand directly and on the other hand via a further differentiating circuit.

The advantages of the circuit arrangement according to the invention, compared to known electronic circuit arrangements for parallel connection of alternating current systems, are firstly that it has a higher operational reliability and that false alarms do not occur due to the influence of disturbances when determining the switching point. However, it has significantly increased.

This is due to the different processing of the measured voltages in both channels of the phase comparator. In order to be able to generate a parallel connection, both channels must supply signals at the same time. A further advantage of the circuit arrangement according to the invention is that it allows erroneous commands to be avoided even in the event of a component failure. That is, when a component fails in a channel of the phase comparator and therefore this channel does not operate normally, a parallel connection command is not generated since corresponding signals must always be generated from both channels at the same time. In the circuit device according to the present invention,
It must be ensured that parallel connection commands are generated only under permissible frequency difference and phase angle conditions. This again presupposes that signals are supplied simultaneously from both limit value circuits of the phase comparison device of the circuit arrangement according to the invention. This requirement can only be achieved with sufficient accuracy and at very high cost at small frequency differences. In order to avoid such costs, it is possible to place a voltage divider after the other limit value circuit in one channel, from which the other limit value circuits can be connected via an auxiliary amplifier by means of a low applied voltage. It is advantageous if the responsive threshold of the limit value circuit of one of the channels is slightly controlled. This ensures that one further limit value circuit, in undisturbed operation, actually reaches its response value simultaneously with the other limit value circuit and therefore within the defined small tolerance range of both limit value circuits. , when another condition to be observed for parallel connection is satisfied,
A signal is generated that can generate a parallel connection command.
Next, the present invention will be explained in detail with reference to embodiments shown in the drawings. The part of the circuit arrangement according to the invention shown in FIG. 1 includes an input terminal 1 to which, for example, the voltage U of an operating alternating current system is applied.

A voltage U2, which is, for example, the voltage of a generator to be connected in parallel, is applied to another terminal 2. A limiter circuit 3 is coupled to the input terminal 1, and a limiter circuit 4 is coupled to the input terminal 2. The output 5 of the limiter circuit 3 is on the one hand directly connected to the input 6 of the AND circuit 7 of the logic circuit 8 and to the further logic circuit 1.
1 and, on the other hand, indirectly via an inverter 12 with the input 13 of the further AND circuit 14 of the further logic circuit 11 and the input 15 of the further AND circuit 16 of the logic circuit 8. combined. Limiter circuit 4
The output 17 of is coupled on the one hand directly with the input 18 of the AND circuit 10 and the input 19 of the AND circuit 16 and on the other hand via another inverter 20 with the input 21 of the AND circuit 14 and the input 22 of the AND circuit 7. There is.

An adder 23 is arranged after the AND circuits 10 and 14 of the logic circuit 11, while another adder 24 is connected after the AND circuits 7 and 16.

At the input 25 of the waveform 26 connected downstream and configured as a low-frequency waveform, a pulse train with pulses consisting of the sum of the output pulses of the AND circuits 7 and 16 is produced, on the other hand, by a separate adder. A pulse train consisting of the sum of the output pulses of the AND circuits 10 and 14 appears at the input of a further waver 28 arranged after 23 and configured as a low-frequency waver. Therefore, at the output terminal 29 of the wave converter 26, a triangular wave voltage Ud as shown in the diagram A of FIG. 4 is generated. At the output terminal 30 of the further transducer 28, a phase-shifted triangular voltage Ud2 180 as shown in diagram B of FIG. 4 is produced. Based on Figure 3, how to
It will be explained how a triangular wave voltage is generated according to the figure.

In diagram 1 of FIG. 3, voltage U1 is plotted as a function of time t.

From this voltage U, the limiter circuit 3 (see FIG. 1) generates a bell train having the sign a and shown in the diagram. Similarly, the voltage U2 is entered in the diagram at time t.
From this, a pulse train b is formed by the limiter circuit 4 (see the diagram in FIG. 3). Pulse trains a and b are connected to the end circuit 10
Therefore, the pulse train c shown in the diagram of FIG. 3 is generated at the output of this AND circuit. In the AND circuit 14, the reverse pulse trains a and b are combined,
Therefore, a pulse train d as shown in the diagram of FIG. 3 is generated at the output of this AND circuit. The pulse trains c and d are added in an adder 23, so that at the output of this adder a pulse train e as shown in the diagram of FIG. 3 results. The width of the individual pulses of the pulse train e is therefore, if ψ denotes the phase angle between the two alternating voltages U1 and U2:
Corresponds to an angle of 1801-φ. A triangular wave voltage Ud2 as shown in diagram B in FIG. 4 is generated from this pulse train e by another wave generator 28. The evaluation of the pulse train a and the reverse pulse train by the AND circuit 7 produces the pulse train f shown in the diagram of FIG.
From the reverse pulse train 1 and the pulse train b, a pulse train g shown in the diagram of FIG. 3 is obtained.

By means of the adder 24 connected downstream, a pulse train h (see diagram x in FIG. 3) is obtained, the width of each pulse corresponding to the phase angle φ between the two alternating current voltages U and U2. It will be done. From this pulse train h, a voltage U1 is generated by the tear wave generator 26.
When the phase angle ψ between U and U2 changes periodically due to the frequency difference between U and U2 based on the assumed angle φ=60U, it is shown in diagram A of FIG. A triangular wave voltage Ud is obtained. This triangular wave voltage Udl is phase shifted by 1800 with respect to another triangular wave voltage Ud2. One triangular wave voltage Udl (see diagram A in Figure 4) is directly connected to the first
It is supplied to a terminal 31, which is coupled to the output terminal 29 of the wave generator 26 according to the figure.

The triangular wave voltage Ud, is supplied to a differentiator circuit 32 (FIG. 2) which includes an operational amplifier 33 with suitable wiring. Differential circuit 32
A rectangular wave voltage is therefore produced at the output 34, the height of which is determined by the slope of the triangular wave voltage Udl. The square wave voltage is supplied to a multiplier 35 that includes an operational amplifier 36.
One input 37 of the operational amplifier 36 is coupled to an output 38 of a regulating device 39, which supplies an auxiliary voltage whose height corresponds to the closing time Te of the respective switch used. Another input 40 of operational amplifier 36 is connected to the output of differentiator circuit 32. The output of the multiplier 35 includes the slave DUd, the switch-on time Te and the differential quotient.
A voltage is generated that is proportional to the Dt product.

Since the triangular wave voltage Udl is proportional to the respective instantaneous phase angle φ between the voltages U1 and U2, this product also corresponds to the equation Te-1000. The output voltage of the multiplier 35, together with the triangular wave voltage Ud connected via the conductor 41, is also applied to the operational amplifier 4.
4 is fed to an input 42 of an adder 43 containing .4. The summing device 43 supplies at its output 45 a voltage corresponding to the sum of the triangular wave voltage and the output voltage of the multiplier 35 . The voltage at the output 45 is fed via an analog amplifier 46 to a limit value circuit 47 which, when its limit value is reached, is fed via a downstream gate circuit 48 to an output 49 in parallel to a processing unit, not shown. Generates a release signal that controls the granting of a connection command. This release signal is applied to both voltages U1 and U for a time corresponding to the closing time Te of the switch used, respectively.
2 (see A in FIG. 4).
Another input terminal 50, which is directly coupled to the output 30 of the F wave generator 28, is provided with another differential voltage for forming a rectangular wave voltage from another triangular wave voltage Ud2 phase shifted by 180 with respect to the first triangular wave voltage. A circuit 51 is connected.

The square wave voltage is fed via an amplifier 52 to another multiplier 53 which includes an operational amplifier 54 . A further input 55 of the operational amplifier 54 which is not coupled to the differentiating circuit 51 is coupled to the output terminal 36 of the regulating device 39 . Output 56 of multiplier 53
Accordingly, the switch's individual input time Te and the differential quotient? A voltage proportional to the Dtdt product from top to bottom is generated.

A triangular wave voltage Ud2 supplied via a conductor 57 is added to this output voltage of the multiplier 53. This sum voltage reaches the input 58 of a further summing device 59 with an operational amplifier 60, the output 61 of which is connected to a further analog amplifier 62. After this amplifier 62 there is a further limit value circuit 63 which, at a defined value of the sum voltage, sends a further release signal at its output via a further gate circuit 65 to a further output 66. generates a signal that appears as . This further release signal is likewise generated before the point of phase angle coincidence by the closing time Te of the switch used (see diagram B in FIG. 4). In order to ensure that a signal actually appears at the output or output 49 of the limit value circuit 47 at the same time as the release signal of another limit value circuit 63, a voltage divider 67 is connected to the output 64 of the limit value circuit 63; Across resistor 68, a voltage drop occurs whenever the potential at output 64, which is normally at zero, is changed due to the response of limit value circuit 63.

The voltage dropped across the resistor 68 of the voltage divider 67 is led to the input 42 of the operational amplifier 44 of the summing device 43 via an operational amplifier 69 which is used for decoupling. Therefore, operational amplifier 6
A low applied voltage is supplied via 9 to the input of operational amplifier 44. Thereby, the output voltage of the operational amplifier 44 is level-shifted slightly in the direction of reaching the response value of the limit value circuit 47 earlier (slightly lower than the voltage USl in diagram 3 of FIG. 5, which will be described later). (This means shifting the zero-passing point T2 slightly earlier). By doing this, the variable resistor 6 is roughly adjusted so that the limit value circuit 47 responds more slowly than the limit value circuit 63.
8 allows both limit value circuits 47 and 63 to respond at the same time, thereby making it possible to avoid the complexity of the adjustment work. Of course, in order to prevent the limit value circuit 47 from operating when the limit value circuit 63 malfunctions due to an interference signal, the level shift is necessary. The magnitude of the applied voltage that determines should be kept to the minimum necessary. This causes the release signal to appear at output 49 at approximately the same time as at output 66 when the circuit arrangement is operating normally. FIG. 5 will be used to explain the method of operation of the circuit arrangement according to the invention with regard to preventing erroneous input commands due to the influence of interfering signals.

In this FIG. 5, the output 61 of the adder 59 is shown in the diagram 1.
The voltage US2 at is shown. This voltage is produced by adding another triangular wave voltage Ud2 shown in broken lines and a rectangular wave voltage Ur2 at the output of the differentiating circuit 51 shown in diagram 2 of FIG. In diagram 3 of FIG. 5, the voltage USl at the output 45 of the summing device 43 is shown. The dashed curve shows the triangular wave voltage Ud, as present at the input 31. The sum voltage occurring at the output 45 of the summing device 43 is designated Us. Diagram 4 in Figure 5 is the differential circuit 3
2 shows the square wave voltage Url at the output 34 of 2. In diagram 5 of FIG. 5 a jamming signal is shown. As can be seen from diagram 1 of FIG. 5, the jamming signal acts on the voltage US2 in such a way that, at the time of occurrence of the jamming signal, a sharp increase in the value of this voltage occurs.

If Ua, designates the response value of a further limit value circuit 63, then this limit value circuit supplies a release signal at time T1 to a processing device (not shown) in the event of a disturbance signal, which signals the processing device. Control in the direction of supplying parallel connection instructions. As can be seen from diagram 3 of FIG. 5, no changes in the signal supply are caused here by the disturbance signal, which likewise affects the amplitude of the voltage Us,. That is, the threshold value Ua2 of the limit value circuit 47 is the same as the neutral axis, and the limit value circuit 47 issues a release signal when the input signal falls below this neutral axis. Therefore, the limit value circuit 47
At the time T when the disturbance signal is generated, no release signal is output, and since the release signals from both limit value circuits 47 and 63 do not match, no parallel connection command is generated. Time T
Only when the response value of one limit value circuit 47 and at the same time the response value of the other limit value circuit 63 is reached in 2, does a parallel connection command occur if the other conditions are met.

The present invention proposes a circuit device for connecting alternating current systems in parallel or for connecting a generator to an operating alternating current system, which is excellent in terms of high operational reliability.

[Brief explanation of drawings]

1 and 2 show an embodiment of a circuit device according to the invention, and FIGS. 3 to 5 show diagrams for explaining the operating mode of the circuit device. 3, 4... Limiter circuit, 8, 11...
・Logic circuit, 7, 10, 14, 16...AND circuit, 12, 20...Inverter, 23, 24
... Adder, 26, 28 ... F wave unit,
32, 51... Differential circuit, 33, 36, 44,
52, 54, 60, 69... operational amplifier, 35
, 53...Multiplier, 39...Adjusting device, 43,59...Adding device, 46,62...
...Analog amplifier, 47,63...Limit value circuit, 48,65...Gate circuit, 67...
...Voltage divider.

Claims (1)

[Claims] 1. A circuit device for turning on a switch for connecting AC systems in parallel or for connecting a generator to an AC system in operation, the phase position of the voltage of the AC systems to be connected in parallel. are compared in a phase comparator, which includes a logic circuit for generating a pulse train having a width proportional to the phase angle between the voltages, and a logic circuit arranged after the logic circuit to calculate the frequency difference between the two voltages. A filter for obtaining a periodically changing triangular wave voltage, a differentiating circuit connected to the filter, and a limit value circuit coupled to the differentiating circuit and the filter for determining the point at which the switch is turned on. , the phase comparator detects both voltages U_1, U_2 from 180°.
another logic circuit 11 for generating another pulse train e with a pulse width proportional to the angle reduced by the phase angle between
Another filter 28 is disposed after the other logic circuit 11, and in this filter, the voltage changes at a period equal to the frequency difference between the two voltages U_1 and U_2, and has a phase shift of 180° with respect to one triangular wave voltage Ud_1. A further triangular wave voltage Ud_2 is generated, and a further limit value circuit 63 is connected to the further filter 28, on the one hand directly and on the other hand via a further differentiating circuit 51, for determining the switching point. A circuit device for connecting AC systems in parallel, characterized in that a parallel connection command is output on the condition that signals are generated simultaneously from limit value circuits. 2. In the device according to claim 1, a voltage divider 67 is arranged after the further limit value circuit 63, and from this voltage divider, when the further limit value circuit 63 reacts, an amplifier 69 is arranged.
A circuit device for connecting alternating current systems in parallel, characterized in that a small added voltage is transmitted to the limit value circuit 47 via.