JPS59175266A - Facsimile response device - Google Patents

Abstract

PURPOSE:To convert and output an input character code string into a facsimile signal with a small capacity of memory and simple circuit by converting the character code string for one line's share into a character pattern and outputting the pattern into plural line signals. CONSTITUTION:The character code for one line's share is inputted from an input section and writen sequentially in a character code storage circuit 13. The character code of the head designated by an output of a character number counter circuit 14 is read from the character code storage circuit 13. On the other hand, an output of a scanning line counter circuit 16 represents the 1st scanning line number. A character pattern storage circuit 15 reads the character code and the character pattern stored in the address location represented by the scanning line number and transmits them to a parallel/series converting circuit 18. This parallel/series converting circuit 18 converts serially the character pattern and outputs it and transmits it to a line corresponding section via an output terminal 19.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a facsimile response device that outputs a facsimile message input in character code to a facsimile terminal, and more particularly to a circuit that converts and outputs an input character code into a dot-format facsimile signal.

FIG. 1 is a block diagram showing an example of a conventional facsimile answering device. That is, a facsimile message represented by a character code is inputted from the input terminal 5 to the input section 2,
Characters output by input section 2.

The code pattern converter 1 converts the code into an nXm dot matrix character pattern, stores one line worth of character patterns, and then sends it to the line handling unit 4, which then converts the dot format facsimile signal for one line. output one by one. The code pattern converter described above has a built-in memory circuit for editing that can store character patterns for one line.
Data converted into character patterns for each character code must be stored in the storage circuit.

The above-mentioned conventional device requires an editing memory circuit with a large storage capacity, and also requires complicated control such as specifying the address for storing character patterns in the editing memory circuit, resulting in a time-consuming editing process. There is a drawback that it takes a long time. Further, although it is necessary to output the facsimile signal for each scanning line from the line corresponding section, the facsimile signal for the first scanning line can only be output after editing of the character pattern for one line is completed. In other words, there is a drawback that the response is delayed by the editing processing time.An object of the present invention is to solve the above-mentioned conventional drawbacks, and to quickly convert an input character code string into a scanning line by facsimile using a small memory and a simple circuit. An object of the present invention is to provide a facsimile response device capable of converting and outputting a 7-bit signal.

The answering device of the present invention is a facsimile answering device that inputs a facsimile message expressed in a character code, converts it into a dot-format facsimile signal, and includes a character code storage circuit that stores a character code for one line; A character number counting circuit outputs an address signal for sequentially reading out the character codes stored in the character code storage circuit, and a character number counting circuit that stores a character pattern represented by an nXm dot matrix and stores the character code and the number of scanning lines described below. A character pattern storage circuit that outputs n-bit patterns in parallel on arbitrary scanning lines of the character pattern using the scanning line number given from the counting circuit as an address input, and a scanning line number of the character pattern read from the character pattern storage circuit. a scanning line number counting circuit for sequential designation; a parallel-to-serial conversion circuit for serially converting the parallel pattern output from the character pattern storage circuit; and a character number counting circuit for inputting the number of characters and the number of scanning lines for one line. Then, by controlling the step of the scanning line number counting circuit, the pattern on one scanning line of one line of character pattern is sequentially outputted from the character pattern storage circuit, and then the scanning line number counting circuit is stepped. and a control circuit that initializes the character number counting circuit and sequentially outputs the pattern of each character on the next scanning line, converts a character code string for one line into a character pattern, and outputs it as m line signals. It is characterized by

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 2 is a block diagram showing one embodiment of the present invention.

That is, character codes for one line are inputted from an input section (not shown) and sequentially written into the character code storage circuit 13.

Further, the control circuit 17 is given the number of characters and the number of scanning lines for one line. When the input of characters for one line is completed, the control circuit 17 initializes the character number counting circuit 14 and the scanning line number counting circuit 16. Then, from the character code storage circuit 13,
The first character code specified by the output of the character count circuit 14 is read out. On the other hand, the output of the scanning line number counting circuit 16 indicates the first scanning line number. The character pattern storage circuit 15 stores the data at the address position indicated by the character code and scanning line number (on the first line of the first character).
Reads the n-bit character pattern and converts it into parallel/serial converter 18
Send to. Parallel-to-serial conversion circuit! 18 serially converts and outputs the n-bit character pattern according to a clock signal given from the control circuit 17, and sends it out via an output terminal 19 to a line corresponding section (not shown).

Next, the control circuit 17 advances the character count circuit 14 to read the second character code. The n-bit pattern of the first line of the second character is read out from the character pattern storage circuit 15 based on the character code and the scanning line number (first line) indicated by the scanning line number counting circuit, and is read out by the parallel-to-serial conversion circuit 18. It is serially converted. Similarly, character count circuit 1
4° is successively run up to the number of characters in one line, and the n-bit pattern of the first line of each character is serially converted and outputted from the output terminal 19. That is, the first line of the character pattern of one line of characters is output as a facsimile signal.

When the character number counting circuit counts up to the number of characters for one line, the control circuit 17 causes the scanning line number counting circuit 16 to run, initializes the character number counting circuit 14, and repeats the above operation again. The facsimile signal of the l fin is sent out.The same operation is repeated and the 7th facsimile signal of the mth line is sent.
An axis signal is sent to the sending facsimile terminal.

FIG. 3 is a block diagram showing an example of the configuration of the character pattern storage circuit of the above embodiment. That is, the character code 51 and the scanning line number 52 are input to the address conversion circuit 53,
The address conversion circuit 53 includes a read-only memory circuit (ROM) 5 in which an n-bit pattern on the scanning line among the character patterns corresponding to the character code is stored in advance.
4 and outputs an address signal. ROM'
A corresponding n-bit pattern is read from the above address of 54.

In this embodiment, the character pattern corresponding to the input character code is sequentially read out one line (n pits) at a time from a read-only memory circuit that stores the character pattern of the nxm dot matrix, and one line of input character string is created. After sending out the corresponding character pattern in units of scanning lines, the character pattern on the next scanning line is read out, and m line signals are sequentially sent out. It is possible to convert and output character codes for one line into character patterns in units of scanning lines without using a large capacity memory for editing data obtained by converting codes into character patterns. Therefore, there is an effect that a large capacity memory for editing and complicated editing processing are unnecessary. In addition, the character pattern of each character can be sent out onto the scanning line one after another without waiting for editing to finish, allowing for quick conversion processing with a simple configuration.
As a result, processing power improves.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a conventional facsimile answering device, FIG. 2 is a block diagram showing an embodiment of the present invention,
FIG. 3 is a block diagram showing an example of the character pattern storage circuit of the above embodiment. In the figure, 1... code pattern conversion section, 2...
・Input section, 3...Control section, 4...Line support section,
・Input terminal, 6...output terminal, 11...input terminal,
12... Clock input terminal, 13... Character code storage circuit, 14... Character number counting circuit, 15... Character pattern storage circuit, 16... Scanning line number counting circuit, 1゛7
...control circuit, 18... to parallel-serial conversion circuit, 19...
- Output terminal, 51...Character code 1.52...Scanning line number, 53...Address conversion circuit, 54...Read-only storage circuit, 55...Output terminal. Agent Patent Attorney: 1) Toshi Sou

Claims (1)

[Claims] In a facsimile answering device that inputs a facsimile message expressed in a character code, converts it into a dot-format facsimile signal, and outputs it, a character code storage circuit that stores a character code for one line, and a character code storage circuit that stores a character code for one line are provided. A character number counting circuit outputs an address signal for sequentially reading out the stored character codes, and a character pattern represented by an nXm dot matrix is stored and given from the character code and the scanning line number counting circuit described later. A character pattern storage circuit that uses a scanning line number as an address input and outputs n-bit patterns on arbitrary scanning lines of the character pattern in parallel, and a scanning system that sequentially specifies the scanning line number of the character pattern to be read from the character pattern storage circuit. a line number counting circuit; a parallel-to-serial conversion circuit that serially converts the parallel patterns output from the character pattern storage circuit; and a parallel-to-serial conversion circuit that inputs the number of characters and the number of scanning lines for one line; By controlling the step of the path, the pattern on one scanning line of one line of character pattern is sequentially outputted from the character pattern storage circuit, and then the scanning line number counting circuit is incremented to It is equipped with a control circuit that initializes a character count circuit and outputs each character pattern on the next scanning line 31 times, and converts a character code string for one line into a character pattern and outputs it as m line signals. A facsimile answering device featuring: