JPS59173498U - Pulse motor drive circuit - Google Patents

Pulse motor drive circuit

Info

Publication number
JPS59173498U
JPS59173498U JP6631083U JP6631083U JPS59173498U JP S59173498 U JPS59173498 U JP S59173498U JP 6631083 U JP6631083 U JP 6631083U JP 6631083 U JP6631083 U JP 6631083U JP S59173498 U JPS59173498 U JP S59173498U
Authority
JP
Japan
Prior art keywords
pulse motor
phases
signal
excitation
drive circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6631083U
Other languages
Japanese (ja)
Inventor
小沢 明
Original Assignee
神鋼電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 神鋼電機株式会社 filed Critical 神鋼電機株式会社
Priority to JP6631083U priority Critical patent/JPS59173498U/en
Publication of JPS59173498U publication Critical patent/JPS59173498U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は4相パルスモータの駆動方法を一般的、概略的
に説明するためのブロック図、第2図は4相パルスモー
タのダブルト2相励磁を説明するためのシーケンス図、
第3図は本考案によるパルスモータ駆動装置の一実施例
を示す回路図1、第4図は第3図のカウンタのカウント
とROMの出力との関係を示す図である。 符号の説明、CN・・・・・・アップダウンカウンタ、
ROM・・・・・・リードオンメモリ、INI、 IN
2. IN3・・・・・・インバータ、pcl、pc2
.pc3・・・・・・ホトカプラ、E、VCI、VC2
・・・・・・電源電圧、R1゜R2,R3・・・・・・
抵抗器、opl・・・・・・演算増幅器、Ql、Q2.
Q3.Q4.Q5・・・・・・トランジスタ、PM・・
・・・・パルスモータ、A、 B、 C,D・・・・・
・4相パルスモータの各相。
FIG. 1 is a block diagram for generally and schematically explaining the driving method of a 4-phase pulse motor, and FIG. 2 is a sequence diagram for explaining double 2-phase excitation of a 4-phase pulse motor.
FIG. 3 is a circuit diagram 1 showing an embodiment of the pulse motor driving device according to the present invention, and FIG. 4 is a diagram showing the relationship between the count of the counter in FIG. 3 and the output of the ROM. Explanation of codes, CN... Up/down counter,
ROM・・・Read-on memory, INI, IN
2. IN3...Inverter, pcl, pc2
.. pc3...Photocoupler, E, VCI, VC2
...Power supply voltage, R1゜R2, R3...
Resistor, opl... operational amplifier, Ql, Q2.
Q3. Q4. Q5...Transistor, PM...
...Pulse motor, A, B, C, D...
・Each phase of a 4-phase pulse motor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 4相パルスモータをダブルト2相励磁方式で電流制御す
るパルスモータ駆動回路において、4相のうち同時には
励磁されない2つの相2組のためのそれぞれの制御回路
を設け、この2組の制御回路のおのおのが、その組に属
する前記同時には励磁されない2つの相の励磁指令の論
理和出力信号を発生する手段と、その論理和出力信号に
基づいて電流設定値を作る手段と、その電流設定値に基
づいて前記2つの相のうちのいずれかに流れる励磁電流
を検知するための単一の抵抗器と、該抵抗器からの信号
に基ついて前記励磁電流が一定値になるように制御する
演算増幅器と、前記2つの相のいずれを励磁するかを決
定する信号を発生する手段とを含み該励磁相決定信号に
基づいて決定される相を前記演算増幅器の出力により励
磁するようにしたことを特徴とするパルスモータ駆動回
路。
In a pulse motor drive circuit that controls the current of a four-phase pulse motor using a double two-phase excitation method, control circuits are provided for two sets of two phases that are not simultaneously excited among the four phases, and the control circuits of these two sets are provided. means for generating a logical sum output signal of the excitation commands of the two phases that are not simultaneously excited, each of which belongs to the group; means for generating a current set value based on the logical sum output signal; a single resistor for detecting the excitation current flowing in either of the two phases based on the signal; and an operational amplifier for controlling the excitation current to a constant value based on the signal from the resistor. and means for generating a signal for determining which of the two phases to be excited, the phase determined based on the excitation phase determination signal being excited by the output of the operational amplifier. Pulse motor drive circuit.
JP6631083U 1983-05-04 1983-05-04 Pulse motor drive circuit Pending JPS59173498U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6631083U JPS59173498U (en) 1983-05-04 1983-05-04 Pulse motor drive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6631083U JPS59173498U (en) 1983-05-04 1983-05-04 Pulse motor drive circuit

Publications (1)

Publication Number Publication Date
JPS59173498U true JPS59173498U (en) 1984-11-20

Family

ID=30196519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6631083U Pending JPS59173498U (en) 1983-05-04 1983-05-04 Pulse motor drive circuit

Country Status (1)

Country Link
JP (1) JPS59173498U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55109197A (en) * 1978-11-02 1980-08-22 Gilson Med Electr Step motor controller

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55109197A (en) * 1978-11-02 1980-08-22 Gilson Med Electr Step motor controller

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