JPS5917207A - Voltage nonlinear resistor and method of producing same - Google Patents

Voltage nonlinear resistor and method of producing same

Info

Publication number
JPS5917207A
JPS5917207A JP57126960A JP12696082A JPS5917207A JP S5917207 A JPS5917207 A JP S5917207A JP 57126960 A JP57126960 A JP 57126960A JP 12696082 A JP12696082 A JP 12696082A JP S5917207 A JPS5917207 A JP S5917207A
Authority
JP
Japan
Prior art keywords
oxide
nonlinear resistor
voltage nonlinear
pressure
laminate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57126960A
Other languages
Japanese (ja)
Other versions
JPS6410084B2 (en
Inventor
江田 和生
陽之 江口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57126960A priority Critical patent/JPS5917207A/en
Publication of JPS5917207A publication Critical patent/JPS5917207A/en
Publication of JPS6410084B2 publication Critical patent/JPS6410084B2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は\γ−1こり電圧のきわめて低い電圧非直線抵
抗器と、その製造方法に関するものである。  −近年
、各種電気機器や電子機器に半導体素子が広く用いられ
るようになった。しかし、これら半導体素子は一般にサ
ージ(異常過電圧)に弱いものである。そこで、半導体
素子をサージの発生する回路に使用する場合には耐圧の
高いものを選んで使用する′か、あるいはサージから保
護するためのサージ吸収器を用いるか、いずれかの方法
がとられている。通常、前者のナージ対策では十分でな
く、また1曲格も高くなるため、後者の方法がとられて
いる。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a voltage nonlinear resistor with an extremely low \γ-1 voltage and a method for manufacturing the same. - In recent years, semiconductor elements have come to be widely used in various electrical and electronic devices. However, these semiconductor devices are generally susceptible to surges (abnormal overvoltage). Therefore, when semiconductor devices are used in circuits where surges occur, one of two methods is used: select one with a high withstand voltage, or use a surge absorber to protect against surges. There is. Usually, the latter method is used because the former method is not sufficient to counter nage, and also because it increases the height of one song.

従来、これらのサージ保護素子として、ZnOにBi2
O3,C020C02O32など微量の添加物を加えて
焼結して得られるZnO電圧非直線抵抗器(以下バリス
タと言う)が知られている0ZnQバリスタはサージに
対して安定であり、優れたサージ保獲能力を示す。しか
し、ZnOバリスタは焼結体の粒界の非オーム性を利用
しており、そのため低圧用のものを得ることが困難であ
る。すなわち、立上り電圧は電極間に直列に挿入された
粒界の数に比例するため、貫上り電圧の低いものを得よ
うさすると、素子の厚みを薄くしなければならない。
Conventionally, as these surge protection elements, Bi2 was added to ZnO.
The 0ZnQ varistor, which is known as a ZnO voltage nonlinear resistor (hereinafter referred to as a varistor) obtained by adding and sintering a small amount of additives such as O3, C020C02O32, is stable against surges and has excellent surge protection. Demonstrate ability. However, the ZnO varistor utilizes the non-ohmic nature of the grain boundaries of the sintered body, and therefore it is difficult to obtain one for low pressure. That is, since the rise voltage is proportional to the number of grain boundaries inserted in series between the electrodes, the thickness of the element must be reduced in order to obtain a low break-through voltage.

しかし、ZnO粒子の粒径は数11mから10数ft 
mのため、低圧用のものを得ようとすると、厚みを数1
001tm以下にする必要があるが、機械的強度の関係
で、そのような薄いものを得ることはきわめて困難であ
る。したがって、集積回路などの半導体素子を保護する
だめの適当なバリスタが得られていない。
However, the particle size of ZnO particles ranges from several 11 meters to several tens of feet.
m, so if you want to obtain one for low pressure, the thickness should be reduced to several 1
001 tm or less, but it is extremely difficult to obtain such a thin material due to mechanical strength. Therefore, suitable varistors for protecting semiconductor devices such as integrated circuits have not been available.

これらの焼結形バリスタの欠点をなくすものと゛して、
ZnOを主成分とする基板に、酸化ビスマス。
In order to eliminate the drawbacks of these sintered varistors,
Bismuth oxide on a substrate mainly composed of ZnO.

酸化コバルト、希土類酸化物、アルカリ上類酸化物など
から成る膜をスパッタリングによ−・て形成し、さらに
ZnO膜を同じくスパッタリングによってその上に重ね
たバリスタが報告さtlている。これらのバリスタは、
立上り電圧が低く、低圧半導体のサージ保護に適してい
る。しかし、これらの素子のバリスタとしての性能を現
わす定数、電圧非直線指数、α(aはl−(、v、、’
c )aで定着される。  但し、■=電流、■:電圧
I C+1定数〕は、それほど大きくない。
A varistor has been reported in which a film made of cobalt oxide, rare earth oxide, alkaline oxide, etc. is formed by sputtering, and a ZnO film is further superimposed thereon by sputtering. These baristas
The rise voltage is low, making it suitable for surge protection of low-voltage semiconductors. However, the constant that expresses the performance of these elements as a varistor, the voltage nonlinearity index, α (a is l−(, v, , '
c) Fixed in a. However, ■=current, ■: voltage I C+1 constant] is not so large.

本発明はこれらの欠点を改善するもので、立上り電圧が
低く、aの大きな電圧非直線抵抗器を実現したものであ
る0以下、その実施例について詳細に説明する。
The present invention aims to improve these drawbacks, and embodiments thereof will be described in detail below, in which a voltage nonlinear resistor with a low rise voltage and a large a is realized.

図面は本発明による素子の基本的な構造を示したもので
、1はZnOを主成分とする層、2は酸化コバルトを含
む層、3は電極である。このような構成とすることによ
り、Z、nO主成分層と酸化コバルトを含む層の界面に
エネルギー障壁が形成され、このエネルギー障壁が非オ
ーム性を示し、バリスタとしての効果が得られる。エネ
ルギー障壁は2つの界面にそれぞれ形成されるので、正
負いずれの電圧に対しても同じように動作することから
、本構造の素子は正負対称型の電圧非直線性を示す。
The drawing shows the basic structure of the element according to the present invention, in which 1 is a layer containing ZnO as a main component, 2 is a layer containing cobalt oxide, and 3 is an electrode. With such a configuration, an energy barrier is formed at the interface between the Z and nO main component layer and the layer containing cobalt oxide, and this energy barrier exhibits non-ohmic properties, resulting in an effect as a varistor. Since the energy barrier is formed at each of the two interfaces, it operates in the same way for both positive and negative voltages, so the element with this structure exhibits positive-negative symmetrical voltage nonlinearity.

(実施例1) ZnO粉体を、通常の成型方法によって直径40胴、厚
き20咽に成型し、SiCの型に入れて1200℃で圧
力200 Kg / caを加えながら、空気中で10
時間加圧焼成した。得られた焼結体を厚み0.5喘の円
板に切断加工し、アルミナ微粉を用いて鏡面研磨を施し
た後、有機溶剤で十分に洗浄した。次に、第1表に示す
酸化物組成粉体を有機バインダーおよび有機溶剤に分散
してペースト状とし、前記Znoi面基板上に塗布した
。このようにして得た2組の塗布膜付基板を、塗布膜同
志が接し合うように重ねた。この積層基板を750℃の
温度で400 Kg / c肩の圧力を加えながら空気
中において1時間加圧焼成し、その後素子両面のZnO
基板上にAt蒸着電極を設け、1mm角のチップに切り
出して電気特性を測定した。第1表に、それぞれの素子
について0.1〜1 mA/ cnfの領域における電
圧非直線指数αおよび立上り′電圧(1m A/mm2
の電流を流した時の端子電圧)を示す。
(Example 1) ZnO powder was molded into a diameter of 40 mm and a thickness of 20 mm using a normal molding method, and placed in a SiC mold at 1200° C. while applying a pressure of 200 Kg/ca in air.
Pressure fired for hours. The obtained sintered body was cut into a disk having a thickness of 0.5 mm, mirror-polished using fine alumina powder, and thoroughly washed with an organic solvent. Next, the oxide composition powder shown in Table 1 was dispersed in an organic binder and an organic solvent to form a paste, and the paste was applied onto the Znoi surface substrate. Two sets of substrates with coated films thus obtained were stacked so that the coated films were in contact with each other. This laminated substrate was pressure-fired in air for 1 hour at a temperature of 750°C while applying a pressure of 400 kg/c, and then ZnO on both sides of the element was fired.
An At vapor-deposited electrode was provided on the substrate, and the chip was cut into a 1 mm square chip and its electrical characteristics were measured. Table 1 shows the voltage non-linearity index α and rise' voltage (1 mA/mm2
(terminal voltage when current flows through).

第1表の組成形1〜62は本発明の範囲内の例であシ、
*印を付した扁63〜66は比較例として示したもので
ある。第1表より、酸化コバルトをCO2O3の形に換
算して99.98〜46モル★こ、酸化ビスマス(、B
 1203 ) 、希土類酸化物(A203: 但1.
Ai希土類)、金属酸化物(BO:但しBはBa、Sr
iたはpb )の3つの群の中から、少なくとも2つの
群にまたがって2種以上の添加物を、そわぞれBi2O
3,A203.BOO形に換智して0.01〜54.9
9モル係加えた材料組成を用いることにより、aが15
以上、立上り電圧が8■以「の良好な低圧バリスタの得
られることがわかる。
Compositional forms 1 to 62 in Table 1 are examples within the scope of the present invention,
Flats 63 to 66 marked with * are shown as comparative examples. From Table 1, cobalt oxide is converted to 99.98 to 46 moles in the form of CO2O3, and bismuth oxide (, B
1203), rare earth oxide (A203: However, 1.
Ai rare earths), metal oxides (BO: where B is Ba, Sr
Bi2O
3, A203. 0.01 to 54.9 when converting to BOO type
By using a material composition with 9 molar addition, a becomes 15
From the above, it can be seen that a good low-voltage varistor with a rising voltage of 8.5 cm or higher can be obtained.

なお、本実施例では希土類酸化物として、酸化プラセオ
ジウム、酸化ネオジウム、酸化ザマリウl−を用いブζ
例を示したが、希土類元素の化学的性質の共jT+性か
ら他の希土類酸化物を用いても同様の効果の得られるこ
とは明らかである。
In this example, praseodymium oxide, neodymium oxide, and zamariulium oxide were used as rare earth oxides.
Although an example has been shown, it is clear that similar effects can be obtained by using other rare earth oxides due to the co-jT+ chemical properties of rare earth elements.

(以 下金 白) (実施例2) 実施例1で用いた組成のうち、第1表のA2に示す組成
を用いて、製造条件の効果を調−た。第2表は積層して
加圧焼成する時の焼成温度と電気特性の関係を示したも
のであり、600℃から950’Cの焼成温度で良好な
特性が得られている。
(Hereinafter referred to as Kinshiro) (Example 2) Among the compositions used in Example 1, the composition shown in A2 of Table 1 was used to examine the effects of manufacturing conditions. Table 2 shows the relationship between firing temperature and electrical properties when laminated and pressure fired, and good properties are obtained at firing temperatures of 600°C to 950'C.

なお600℃未満で焼成した場合、積層部の接着強度が
弱く、実用的なものが得られなか−、た。
In addition, when firing at a temperature lower than 600°C, the adhesive strength of the laminated portion was weak, making it impossible to obtain a practical product.

第2表 本実施例では400 Kg / cnjの圧力で積層加
圧焼成しているが、その時の圧力の効果について更に検
問してみた。その結果、50 K7 / cnj未満の
圧力では、焼成後取り出した時、ZnO基板と酸化コ・
くルトを含む層の接着強度の十分なものが得られなかっ
た。−力、1000 Kg / ctrtより大きい圧
力で焼成すると、ZnO基板にひび割れの生ずるものが
多く、適当でなか−〕だ。これに対して50 Kg /
 crl〜1000 Kg / olの圧力で焼成され
たものは、はぼ同じ電気特性を示し、接着強度、ひび割
nの点でも問題がなかった。以上の結果から、積層加圧
圧力として60〜1000 Kg / cnfが適当で
あることがわかった。
Table 2 In this example, lamination and pressure firing was carried out at a pressure of 400 Kg/cnj, but we further examined the effect of the pressure at that time. As a result, at pressures below 50 K7/cnj, the ZnO substrate and oxide co-contaminated when taken out after firing.
It was not possible to obtain sufficient adhesive strength for the layer containing the core. - Firing at a pressure greater than 1000 Kg/ctrt often causes cracks in the ZnO substrate, which is not appropriate. For this, 50 Kg/
Those fired at a pressure of crl~1000 Kg/ol showed almost the same electrical properties and had no problems in terms of adhesive strength and cracking. From the above results, it was found that 60 to 1000 Kg/cnf is appropriate as the lamination pressure.

次に、積層加圧焼成の焼成時間の効果について検問した
。その結果、焼成温度で10分以」−保てば、とくに電
気特性に大きな変化の現われないことがわかった。
Next, we investigated the effect of firing time in laminated pressure firing. As a result, it was found that if the sintering temperature was maintained for 10 minutes or more, no significant change appeared in the electrical properties.

次に、基板として用いるZnO基板の焼成条件について
検討した。焼成圧力を○〜1500 Kg / cnf
 。
Next, the firing conditions for the ZnO substrate used as the substrate were studied. Firing pressure: ○~1500 Kg/cnf
.

焼成温度を700℃〜1500’Cの間で変化させ、そ
の効果を調べた0その結果、焼成時の圧力が50に9 
/ cJ未満であると研磨後のZnO基板表向に気孔が
多く、そのため特性のきわめて不安定なものしか得られ
なかった。50 Kg / crl以−J−の圧力をか
けて焼成した場合には、いずれの圧力においても良好な
ZnO基板が得られた。圧力はあ寸り高くすると装置が
高価になるなと他の問題も生ずるので、特に著しい効果
がない場合にばあ−まり圧力を」二げても意味がない。
The firing temperature was varied between 700°C and 1500'C, and the effect was investigated. As a result, the pressure during firing was 50°C to 90°C.
If it was less than /cJ, there would be many pores on the surface of the ZnO substrate after polishing, and therefore only those with extremely unstable characteristics could be obtained. When firing under a pressure of 50 Kg/crl or more -J-, a good ZnO substrate was obtained at any pressure. If the pressure is increased too much, the equipment becomes expensive and other problems arise, so there is no point in increasing the pressure too much if there is no particularly significant effect.

ZnO基板の焼成圧力としては60〜1500にり/c
〃;が適当であった。
The firing pressure for ZnO substrate is 60 to 1500 N/c.
〃; was appropriate.

焼成温度は800℃未満の場合、焼結が不十分であり、
1400℃より高温にするとZnOの粒成長が進みすぎ
て、機械的強度が弱くなるなどの問題を生じた。したが
って8oo℃〜14oO℃が適当な焼成温度である。寸
だ、焼成時間は1時間以上あれば十分緻密なZnO基板
の得られることがわかった0 本実施例では、酸化コバルトを含む1つの層を2つのZ
nO基板でサンドイッチ状に積層しているが、さらにこ
の上にもう1つの酸化コバルトを含む層を設け、きらに
ZnO基板を積層してやれば、実施例の初めに述べた如
く、本発明のバリスタ作用が酸化コバルトを含む層とZ
nO基板の界面で生しることから考えて、実施例1のバ
リスタを直列Vこ2ケ接続し/このと同様の効果が得ら
れることは明らかであり、このように積層数を増すこと
によ−1て、さらに高電圧のバリスタを得ることができ
る。
If the firing temperature is less than 800°C, sintering is insufficient,
When the temperature was higher than 1400°C, ZnO grain growth progressed too much, resulting in problems such as a decrease in mechanical strength. Therefore, a suitable firing temperature is 80°C to 140°C. It was found that a sufficiently dense ZnO substrate could be obtained with a firing time of one hour or more. In this example, one layer containing cobalt oxide was formed by two ZnO substrates.
Although nO substrates are laminated in a sandwich-like manner, if another layer containing cobalt oxide is further provided on top of this and a ZnO substrate is laminated on the other side, the varistor effect of the present invention can be obtained as described at the beginning of the embodiment. is a layer containing cobalt oxide and Z
Considering that this occurs at the interface of the nO substrate, it is clear that the same effect can be obtained by connecting two varistors in series with each other in Example 1, and by increasing the number of laminated layers in this way. Therefore, a higher voltage varistor can be obtained.

なお、本実施例ではZnO基板を用いたが、ZnO基板
の比抵抗を制御−4−る各種の添加物、たとえば3価元
素であるアルミニウムやガリウム、また1価ノr素であ
るリチウムなどを加えて、特性を種々に変化させること
も可能であり、(7たがって本発明は純粋なZnO基板
に限定されるものではない。
Although a ZnO substrate was used in this example, various additives that control the resistivity of the ZnO substrate, such as trivalent elements such as aluminum and gallium, and monovalent norium, such as lithium, may be added. In addition, it is also possible to vary the properties (7) Therefore, the present invention is not limited to pure ZnO substrates.

寸だ、酸化コバルトを含む層を形成する場合、本実施例
ではそれぞれCO2O3,Pr2O3などを用い/ζが
、CaO,(−o s○4.Pr601□などを用いて
も同様の結果が得られた。したがって本発明は本実施例
に示した表現の酸化物にのみ限定されるものではない。
Indeed, when forming a layer containing cobalt oxide, in this example, CO2O3, Pr2O3, etc. were used, and /ζ was used, but CaO, (-o s○4.Pr601□, etc.) were used to obtain similar results. Therefore, the present invention is not limited only to the oxides expressed in this example.

以上述べた如く、本発明は、拐料組成および製法の巧み
な組み合せにより初めて得られたものであり、本発明に
より得られる素子は、半導体素子を用いた電子機器の信
頼性を向」ニさせるのに有用なものである。
As described above, the present invention was obtained for the first time through a skillful combination of nanomaterial composition and manufacturing method, and the device obtained by the present invention improves the reliability of electronic devices using semiconductor devices. It is useful for.

【図面の簡単な説明】[Brief explanation of drawings]

図面は本発明の一実施例の構造を示」−断面図である。 1・・・・・・Zno主成分層、2・・・・・酸化コバ
ルトを含む層、3・・・・・・電極。
The drawings are sectional views showing the structure of one embodiment of the present invention. 1... Zno main component layer, 2... Layer containing cobalt oxide, 3... Electrode.

Claims (1)

【特許請求の範囲】 (1)  コバルトを酸化コバルト(C02o3)の形
に換算して45〜99.98モル係と、酸化ビスマス(
B1203)、赤土類酸化物(A203−但しAは希土
類)、金属酸化物(BO:但しBはBa、SrまたはP
b)の3つの群のうち2つ以上の群にまたがって2押収
」二をそれぞれ0.01〜54.99モル係含有する領
域を、酸化亜鉛を主成分とする2つの領域によってサン
ドイッチ状にはさみ、これを−組以上積み重ねて積層体
を構成し、この積層体の表裏両生簡に電極を形成したこ
とを特徴とする電圧非直線抵抗器。 (2)希土類酸化物として酸化プラセオジウム、酸化ネ
オジウムおよび酸化サマリウムから選ばれた少なくとも
1種の酸化物を用いたことを特徴とする特許請求の範囲
第(1)項記載の電圧非直線抵抗器0(3)酸化lIF
鉛を主成分とする領域が多結晶焼結体であることを特徴
とする特許請求の範1ガ]第(1)項記載の電圧非直線
抵抗器。 (4)少なくとも2枚の酸化亜鉛を主成分とする基板の
主面上に、それぞれ酸化コバルトと、酸化ビスマス、希
土類酸化物および金属酸化物()<リウム、ストロンチ
ウムまたは鉛の酸化物)のうち2種以上の成分を含む膜
を形成し、前記基板と前記膜が交互に配置され、かつ最
外層が前記酸化亜鉛を主成分とする基板となるように積
層した後、圧力を加えなから熱処理を行って接着[7、
得られた積層体の表裏両主面に電極を設けることを特徴
とする電圧非直線抵抗器の製造方法。 (5)基板として、酸化亜鉛を主成分とする粉末を成型
して、800〜14oO℃の空気中で50〜1500 
Kg / cniの圧力を加えながら焼成して得られた
焼結体を用いることを特徴とする特8′「請求の範囲第
(4)項記載の電圧非直線抵抗器の製造方法。 、(6)  50〜1000 Kg / errブの圧
力を加えながら、500〜950℃で熱処理を行・ンて
積層体を接着することを特徴とする特許請求の範囲第(
4)項記載の電圧非直線抵抗器の製造方法。
[Claims] (1) Cobalt has a mole ratio of 45 to 99.98 in terms of cobalt oxide (C02o3), and bismuth oxide (C02o3).
B1203), red earth oxide (A203-where A is rare earth), metal oxide (BO: where B is Ba, Sr or P
b) Regions each containing 0.01 to 54.99 mol of ``2'' in two or more of the three groups are sandwiched by two regions containing zinc oxide as the main component. 1. A voltage nonlinear resistor characterized in that a laminate is formed by stacking at least one set of scissors, and electrodes are formed on both the front and back sides of the laminate. (2) Voltage nonlinear resistor 0 according to claim (1), characterized in that at least one oxide selected from praseodymium oxide, neodymium oxide, and samarium oxide is used as the rare earth oxide. (3) Oxidized lIF
1. The voltage nonlinear resistor according to claim 1, wherein the region containing lead as a main component is a polycrystalline sintered body. (4) Cobalt oxide, bismuth oxide, rare earth oxide, and metal oxide () < oxide of lithium, strontium, or lead) on the main surfaces of at least two substrates mainly composed of zinc oxide. After forming a film containing two or more types of components and stacking the substrates and the films alternately so that the outermost layer is the substrate containing zinc oxide as the main component, heat treatment is performed without applying pressure. and glue [7,
A method for manufacturing a voltage nonlinear resistor, comprising providing electrodes on both the front and back principal surfaces of the obtained laminate. (5) As a substrate, mold powder mainly composed of zinc oxide and heat it in air at 800 to 14 oO
(6) A method for manufacturing a voltage nonlinear resistor according to claim (4), characterized in that a sintered body obtained by firing while applying a pressure of Kg/cni is used. ) The laminate is bonded by heat treatment at 500 to 950°C while applying a pressure of 50 to 1000 kg/err.
4) A method for manufacturing a voltage nonlinear resistor as described in item 4).
JP57126960A 1982-07-20 1982-07-20 Voltage nonlinear resistor and method of producing same Granted JPS5917207A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57126960A JPS5917207A (en) 1982-07-20 1982-07-20 Voltage nonlinear resistor and method of producing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57126960A JPS5917207A (en) 1982-07-20 1982-07-20 Voltage nonlinear resistor and method of producing same

Publications (2)

Publication Number Publication Date
JPS5917207A true JPS5917207A (en) 1984-01-28
JPS6410084B2 JPS6410084B2 (en) 1989-02-21

Family

ID=14948152

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57126960A Granted JPS5917207A (en) 1982-07-20 1982-07-20 Voltage nonlinear resistor and method of producing same

Country Status (1)

Country Link
JP (1) JPS5917207A (en)

Also Published As

Publication number Publication date
JPS6410084B2 (en) 1989-02-21

Similar Documents

Publication Publication Date Title
JPH01283915A (en) Multilayer device and its manufacture
JPS63136603A (en) Manufacture of voltage nonlinear resistor
JPS5918602A (en) Low voltage ceramic varistor
JPH11265807A (en) Ceramics composite laminated component
JPS5917207A (en) Voltage nonlinear resistor and method of producing same
JPS5914602A (en) Voltage nonlinear resistor and method of producing same
JP2705221B2 (en) Ceramic capacitor and method of manufacturing the same
JPS6253923B2 (en)
JPS5918601A (en) Voltage nonlinear resistor and method of producing same
JPS5914604A (en) Voltage nonlinear resistor and method of producing same
JPS5914603A (en) Voltage nonlinear resistor and method of producing same
JPS62282411A (en) Voltage-dependent nonlinear resistor
JP2697095B2 (en) Ceramic capacitor and method of manufacturing the same
JP2707706B2 (en) Grain boundary insulating semiconductor ceramic capacitor and method of manufacturing the same
JP2725357B2 (en) Ceramic capacitor and method of manufacturing the same
JP2737280B2 (en) Ceramic capacitor and method of manufacturing the same
JP2715529B2 (en) Ceramic capacitor and method of manufacturing the same
JPS6348802A (en) Porcelain compound for voltage dependent nonlinear resistor
JP2773309B2 (en) Ceramic capacitor and method of manufacturing the same
JP2743448B2 (en) Ceramic capacitor and method of manufacturing the same
JP2548299B2 (en) Manufacturing method of voltage-dependent nonlinear resistor element
JP2661246B2 (en) Ceramic capacitor and method of manufacturing the same
JPS63114104A (en) Manufacture of nonlinear resistor
JP2697123B2 (en) Ceramic capacitor and method of manufacturing the same
JP2646734B2 (en) Ceramic capacitor and method of manufacturing the same