JPS59168637A - Forming method of minute pattern - Google Patents
Forming method of minute patternInfo
- Publication number
- JPS59168637A JPS59168637A JP58042544A JP4254483A JPS59168637A JP S59168637 A JPS59168637 A JP S59168637A JP 58042544 A JP58042544 A JP 58042544A JP 4254483 A JP4254483 A JP 4254483A JP S59168637 A JPS59168637 A JP S59168637A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- pattern
- photo
- semiconductor substrate
- light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
- G03F7/091—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers characterised by antireflection means or light filtering or absorbing means, e.g. anti-halation, contrast enhancement
Landscapes
- Engineering & Computer Science (AREA)
- Architecture (AREA)
- Structural Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、光を用いた微細パターンの形相方法に関する
。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming fine patterns using light.
最近の半導体−集槓回路装珈では、高密度化のために多
層配線構造が用いられるのが常であり、その結果、必然
的に半導体基板上には凹凸が生じ、中には2μn]にも
及ぶ大きな段差となるものも少なくない。このような大
きな段差を有する半導体基板上に微細パターンを形成す
る場合、段差部でのステップ・カバーレージの悪さ、段
差の下部と上部との間に生ずるパターン寸法の変動等の
多くの問題がある。In recent semiconductor-integrated circuit devices, multilayer wiring structures are commonly used to increase density, and as a result, unevenness inevitably occurs on the semiconductor substrate, and some of them are as small as 2 μm. There are many cases where there is a large step that extends even further. When forming a fine pattern on a semiconductor substrate with such a large step difference, there are many problems such as poor step coverage at the step part and variation in pattern dimensions between the bottom and top of the step. .
このような問題を解決する1つの方法として最近注目さ
れているのが多層レジスト技術である。Multilayer resist technology has recently attracted attention as a method for solving such problems.
第1図ないし第3図は従来の多層レジスト技術の主要工
程図である。この従来技術については。1 to 3 are main process diagrams of conventional multilayer resist technology. Regarding this prior art.
例えば、Journal of Vacuum 5ci
ence and’1”echnology誌1981
年19巻第4号1313ベージに記述されている。この
方法は、初めに表面に段差を有する半導体基板101上
に2〜3μm程度の膜厚の厚いフォトレジスト層102
を塗布して半導体基板101上の段差を平坦化する(第
1図)。For example, Journal of Vacuum 5ci
ence and'1”technology magazine 1981
It is described in Volume 19, Issue 4, Page 1313. In this method, first, a thick photoresist layer 101 with a thickness of about 2 to 3 μm is placed on a semiconductor substrate 101 having a step on its surface.
The steps on the semiconductor substrate 101 are flattened by coating the semiconductor substrate 101 (FIG. 1).
このフォトレジスト層102としては主にPMMA(ポ
リ・メチル・メタクリレート)が用いられる。As this photoresist layer 102, PMMA (poly methyl methacrylate) is mainly used.
次に、フォトレジスト層102の上面に05μm程度の
膜厚の薄いフォトレジスト層103 を塗布して開光・
現像し、パターンを形成する(第2図)。Next, a thin photoresist layer 103 with a thickness of about 0.5 μm is coated on the upper surface of the photoresist layer 102 to open the light.
Develop and form a pattern (Figure 2).
フォトレジスト層103 としては光露光の場合、主に
AZi370 、AZ1350Jが用いられる。次に7
オトレジスト% 103をマスクとしてDe e p
UV光(波長200〜250nm)を全面に服射後、現
像し、フォトレジスト#102のパターンを形成して工
程を終了する(第3図)。For the photoresist layer 103, AZi370 and AZ1350J are mainly used in the case of light exposure. Next 7
De e p using Otoresist% 103 as a mask
After irradiating the entire surface with UV light (wavelength: 200-250 nm), it is developed to form a pattern of photoresist #102, and the process is completed (FIG. 3).
この方法によれば、半導体基板101表面の段差が膜厚
の厚いフォトレジス)ffl 102によって平坦化さ
れるので、段差の上部及び下部においてフォトレジスト
層103の膜厚の変化が全くない。According to this method, the step on the surface of the semiconductor substrate 101 is flattened by the thick photoresist (ffl 102), so there is no change in the thickness of the photoresist layer 103 above and below the step.
その結果、両者の間に最適露光量の差が生じないために
パターン寸法の変化が非常に小さい。更に、ステップ・
カバレージが良いために7オトレジスト層103の膜厚
を薄くすることが可能となシ。As a result, since there is no difference in the optimum exposure amount between the two, the change in pattern dimensions is very small. Furthermore, step
Since the coverage is good, it is possible to reduce the thickness of the photoresist layer 103.
高解像度が期待できる。You can expect high resolution.
しかしながら、上層の膜厚の薄いフォトレジスト層10
3 tl−に光し、パターンを形成する工程において5
通常用いられる波長s 436nmに対して、第4図
の分光特性に示すように、上層のフォトレジストである
AZ1370は60〜70%の透堝率があシ、一方、下
層の7オトレジストであるPMMhはほぼ100%の透
過率であるため、上層の7オトレジスト層103の露光
の際に用いた光のおよそ60〜70%が下層の7オトレ
ジスト層102を透過し、半導体基板lo1に到達する
。特に半導体基板101が反射率の大きいアルミニウム
等で覆われている場合には、この到達した光の大部分が
反射光となる。この反射光は入射光と干渉して−F層の
フォトレジスト層103内に定在波が発生する。その結
果、解像度が低下し、パターン寸法の制御が難しくなる
。従って、この方法によれば微細パターンの加工は困難
である。よって、半導体基板からの反射光をいかにして
低減し、定在波の発生を防止するかが微細パターンを形
成するだめの重装な課題である。However, the thin upper photoresist layer 10
5 in the process of emitting light to 3 tl- and forming a pattern.
As shown in the spectral characteristics in Figure 4, for the commonly used wavelength s 436 nm, the upper layer photoresist AZ1370 has a transmittance of 60 to 70%, while the lower layer 7 photoresist PMMh has a transmittance of approximately 100%, so approximately 60 to 70% of the light used to expose the upper 7-photoresist layer 103 passes through the lower 7-photoresist layer 102 and reaches the semiconductor substrate lo1. Particularly when the semiconductor substrate 101 is covered with aluminum or the like having a high reflectance, most of the light that reaches the semiconductor substrate 101 becomes reflected light. This reflected light interferes with the incident light to generate a standing wave within the photoresist layer 103 of the -F layer. As a result, resolution is reduced and pattern dimensions become difficult to control. Therefore, according to this method, it is difficult to process fine patterns. Therefore, how to reduce the reflected light from the semiconductor substrate and prevent the generation of standing waves is a serious problem in forming fine patterns.
本発明の目的は、上記した反射光を低減することによっ
て、定在波の発生を防止し、高層1#度のパターン形成
方法を提供することにある。An object of the present invention is to provide a method for forming a 1# high-rise pattern by reducing the above-mentioned reflected light to prevent the generation of standing waves.
本発明の特徴は、表面に段差を有する半導体基板上に光
露光法によりフォトレジストパターンを形成する方法に
おいて、該段差を平坦化する第1の塗膜を該半導体基板
上に形成する工程と、眩光に対して吸収性を有する第2
の塗膜を該第1の塗膜上に形成する工程と、所望のパタ
ーンを光露光法によ多形成するだめの第3の塗膜を該第
2の塗膜上に形成する工程とを含むパターンの形成方法
にある。The present invention is characterized in that a method for forming a photoresist pattern by a light exposure method on a semiconductor substrate having a step on its surface includes a step of forming a first coating film on the semiconductor substrate to flatten the step; A second layer that absorbs glare
a step of forming a coating film on the first coating film, and a step of forming a third coating film on the second coating film in which a desired pattern is formed by a light exposure method. The pattern formation method includes
本発明によれば、上層の7オトレジストの露光に用いら
れる光を完全に吸収する層を設けることによって、反射
光を防止するために、高解像変のパターン形成が実現で
きる。According to the present invention, by providing a layer that completely absorbs the light used for exposing the upper layer 7 photoresist, pattern formation with high resolution can be realized in order to prevent reflected light.
以下図面を用いて本発明の詳細な説明
第5図ないし第7図は本発明の一実施例における主吸工
程図であシ、第8図は本発明に用いられた光吸収層の分
光特性である。The following is a detailed explanation of the present invention with reference to the drawings. Figures 5 to 7 are diagrams of the main absorption process in one embodiment of the present invention, and Figure 8 is the spectral characteristics of the light absorption layer used in the present invention. It is.
初めに、第5図に示すように,反射率の大きいアルミニ
ウム201で全面を被核された、段差を有する半導体基
板202上に.膜厚約2μfl’lの厚いフォトレジス
ト層203を形成して、この段差を平坦化する。フォト
レジスト層2 0 3 としてはP M AI Aを用
いる。First, as shown in FIG. 5, a semiconductor substrate 202 with steps is coated on the entire surface with aluminum 201 having a high reflectance. A thick photoresist layer 203 having a film thickness of about 2 μfl'l is formed to flatten this step. PMAIA is used as the photoresist layer 2 0 3 .
次に,フォトレジスト層203の上面妬膜厚約470O
Aの光吸収層204を形成する。この光吸収層204と
しては例えば、 Brewer Science社の.
IIC−L5を用い、これを400Orpmで回転塗布
後、148℃30分の熱処理を行なうことによって上記
膜厚が得られる。との膜厚の時の光吸収層204の分光
特性は第8図に示すように、波長が436nmの光を完
全に吸収するので,この波長の光はアルミニウム201
0表面には全く到達せず、その結果、この表面からの反
射光は皆無である。次に光吸収層204の上面に、所望
のパターンを形成するための7オトレジスト層205を
形成する。フォトレジスト層205としては、例えば、
シラプレー社のAZ 13 7 0 を用い、その膜#
li:.0.5μm程度とする。フォトレジスト層20
5は平坦化された表面上に形成されるので,半導体基板
202の段差部におけるステップカバレージは全く問題
がなく、段差の上部と下部との間で膜厚の変動がない。Next, the thickness of the upper surface of the photoresist layer 203 is approximately 470 Ω.
A light absorption layer 204 is formed. This light absorption layer 204 is, for example, manufactured by Brewer Science.
The above film thickness can be obtained by spin-coating IIC-L5 at 400 rpm and heat-treating at 148° C. for 30 minutes. As shown in FIG. 8, the spectral characteristics of the light absorption layer 204 when the film thickness is
0 surface, and as a result there is no reflected light from this surface. Next, a photoresist layer 205 is formed on the upper surface of the light absorption layer 204 to form a desired pattern. As the photoresist layer 205, for example,
Using AZ 13 70 manufactured by Silapray, its film #
li:. The thickness is approximately 0.5 μm. Photoresist layer 20
5 is formed on a flattened surface, there is no problem with step coverage at the step portion of the semiconductor substrate 202, and there is no variation in film thickness between the top and bottom of the step.
従って、パターン寸法の制御性が良く、更に、薄膜化に
よる高解像度化が可能となる。Therefore, the controllability of pattern dimensions is good, and further, high resolution can be achieved by making the film thinner.
その後、第6図に示すように、波長が436nmの光で
露光後、例えば、シラプレー社のAZ1370用の現像
液であるMF312で現像し、所望のフォトレジストパ
ターン206を形成する。光吸収層204はこの現像液
に溶解する性質があるので、光吸収層パターン207も
同時に形成される。Thereafter, as shown in FIG. 6, after exposure to light having a wavelength of 436 nm, development is performed using, for example, MF312, a developer for AZ1370 manufactured by Silaplay, to form a desired photoresist pattern 206. Since the light absorption layer 204 has a property of being dissolved in this developer, the light absorption layer pattern 207 is also formed at the same time.
ここで上記したように、露光に使用した、波長が436
nmの光に対するフォトレジスト層205の透過率は6
0〜70%であるため、この割合の光が光吸収層204
へ入射する。しかしながら、この光吸収層204は、上
記したようにこの波長を完全に吸収するので、アルミニ
ウム201の表面へは全く光が到達せず、そのため、こ
の表面からの反射光が7オトレジスト1@204へ入射
することはない。従って定在波の発生はなくなり、微細
なフォトレジストパターン206の形成が実現できる。As mentioned above, the wavelength used for exposure is 436
The transmittance of the photoresist layer 205 to nm light is 6
Since the ratio is 0 to 70%, this proportion of light is absorbed by the light absorption layer 204.
incident on the However, as described above, this light absorption layer 204 completely absorbs this wavelength, so no light reaches the surface of the aluminum 201, and therefore, the reflected light from this surface is transmitted to the 7Otoresist 1@204. There is no incident. Therefore, standing waves are no longer generated, and a fine photoresist pattern 206 can be formed.
次に、通常の方法に従って、フォトレジストパターン2
06をマスクとして全面をディープtJV光(波長20
0〜250nm)で露光後、フォトレジスト層203を
現像し、第7図に示すように、フォトレジストパターン
208を形成して工穆を終了する。Next, according to the usual method, the photoresist pattern 2
Using 06 as a mask, the entire surface was exposed to deep tJV light (wavelength 20
After exposure (0 to 250 nm), the photoresist layer 203 is developed to form a photoresist pattern 208, as shown in FIG. 7, to complete the process.
上述したように、この発明によれば、露光に使用される
光を完全に吸収する層を設けて、半導体基板表面からの
反射光を防止することによって、従来の多層レジスト技
術で問題となっていた反射光による定在波の発生、それ
に伴なう解像度の低下とパターン寸法制御性の悪化を防
止することができ、微細パターンの形成が実現できる。As described above, according to the present invention, a layer that completely absorbs the light used for exposure is provided to prevent light reflected from the surface of the semiconductor substrate, thereby solving the problem of conventional multilayer resist technology. It is possible to prevent the generation of standing waves due to the reflected light and the accompanying deterioration in resolution and pattern dimension controllability, thereby realizing the formation of fine patterns.
第1図ないし第3図は従来技術の主要工程図であり、第
4図はPMMA及びAZ1470の分光特性を示す図で
ある。第5図ないし第7図は本発明の一笑施例における
主要工程図であシ、第8図は本発明に用いられた光吸収
層の分光特性を示す図である。
尚1図において、101・・・・・・半導体基&、10
2・・・・・・フォトレジスト層、103・・・・・・
フォトレジストIn、201・・・・・・アルミニウム
、202・°パ・・半導体基板、203・・・°・・フ
第1・レジスH!j、204・・・・・・光吸収層、2
05・・・・・・フォトレジスト層、206・・・・・
・フォトレジストパターン、207・・・・・・光吸収
層ノくターン120B・・・・・・フォトレジスしくタ
ーン である0
乙π24ρ乙’t9 J2’i9 Jlρ4〃4ψ乾彼
6勿6必S皮 長 (η772)
物4図1 to 3 are main process diagrams of the prior art, and FIG. 4 is a diagram showing the spectral characteristics of PMMA and AZ1470. 5 to 7 are main process diagrams in one embodiment of the present invention, and FIG. 8 is a diagram showing the spectral characteristics of the light absorption layer used in the present invention. In addition, in Figure 1, 101... semiconductor base &, 10
2...Photoresist layer, 103...
Photoresist In, 201... Aluminum, 202...° Pa... Semiconductor substrate, 203...°... First resist H! j, 204... Light absorption layer, 2
05...Photoresist layer, 206...
・Photoresist pattern, 207...Light absorption layer nok turn 120B...Photoresist turn Skin length (η772) Figure 4
Claims (1)
ドレジストパターンを形成する方法において、該段差を
平坦化する第1の塗膜を該半導体基板上に形成する工程
と、眩光に対して吸収性を有する第2の塗膜を該第1の
塗膜上に形成する工程と、所望のパターンを光鮪光法に
よシ形成するための第3の塗膜を該第2の塗膜上に形成
する工程とを含むことを特徴とするパターンの形成方法
。A method for forming a shifted resist pattern by a light exposure method on a semiconductor substrate having a step on its surface, which includes a step of forming a first coating film on the semiconductor substrate to flatten the step, and a method for preventing glare. a step of forming a second coating film having absorbency on the first coating film; and a step of forming a third coating film on the second coating film for forming a desired pattern by a light beam method. A method for forming a pattern, the method comprising the step of forming a pattern on the top.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58042544A JPS59168637A (en) | 1983-03-15 | 1983-03-15 | Forming method of minute pattern |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58042544A JPS59168637A (en) | 1983-03-15 | 1983-03-15 | Forming method of minute pattern |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59168637A true JPS59168637A (en) | 1984-09-22 |
Family
ID=12638999
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58042544A Pending JPS59168637A (en) | 1983-03-15 | 1983-03-15 | Forming method of minute pattern |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59168637A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60223121A (en) * | 1984-04-19 | 1985-11-07 | Matsushita Electric Ind Co Ltd | Pattern forming method |
JPS61179440A (en) * | 1986-02-26 | 1986-08-12 | Matsushita Electric Ind Co Ltd | Pattern forming organic film and formation of pattern |
KR100332184B1 (en) * | 1997-06-04 | 2002-08-21 | 인터내셔널 비지네스 머신즈 코포레이션 | Tunable and removable plasma deposited antireflective coatings |
-
1983
- 1983-03-15 JP JP58042544A patent/JPS59168637A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60223121A (en) * | 1984-04-19 | 1985-11-07 | Matsushita Electric Ind Co Ltd | Pattern forming method |
JPH0244139B2 (en) * | 1984-04-19 | 1990-10-02 | Matsushita Electric Ind Co Ltd | |
JPS61179440A (en) * | 1986-02-26 | 1986-08-12 | Matsushita Electric Ind Co Ltd | Pattern forming organic film and formation of pattern |
JPH0245325B2 (en) * | 1986-02-26 | 1990-10-09 | Matsushita Electric Ind Co Ltd | |
KR100332184B1 (en) * | 1997-06-04 | 2002-08-21 | 인터내셔널 비지네스 머신즈 코포레이션 | Tunable and removable plasma deposited antireflective coatings |
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