JPS59165030U - Multiplexed computer equipment - Google Patents
Multiplexed computer equipmentInfo
- Publication number
- JPS59165030U JPS59165030U JP1984024806U JP2480684U JPS59165030U JP S59165030 U JPS59165030 U JP S59165030U JP 1984024806 U JP1984024806 U JP 1984024806U JP 2480684 U JP2480684 U JP 2480684U JP S59165030 U JPS59165030 U JP S59165030U
- Authority
- JP
- Japan
- Prior art keywords
- output signal
- process output
- computers
- computer
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Hardware Redundancy (AREA)
- Safety Devices In Control Systems (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例を示すブロック図、゛第２図
は同実施例におけるプロセス出力信号切替“ 装置の回
路図、第３図は本考案の他の実施例を示−すブロック図
、第４図は同実施例におけるプロセス出力信号切替装置
の回路図である。・１．２１・・・電子計算機システム
、２． ４． ２２゜２４．２６・・・中央処理装置、
３． ５． ２３． ２５゜２７・・・プロセス出力装
置、６．２８・・・プロセス出力信号切替装置、８．
９． ３０〜３１・・・プロセス出力信号母線、２ａ、
２ｂ、 ４ａ、 ４ｂ、 ２２ａ。
２２ｂ、 ２４ａ、 ２４ｂ、 ２６ａ、 ２６ｂ−・
・接点、１１．３４−・・逆流防止回路、ａ□〜ａ、、
ｂ、〜ｂ、、 Ｃ。
〜Ｃ７・・・プロセス出力信号接点。Fig. 1 is a block diagram showing one embodiment of the present invention, Fig. 2 is a circuit diagram of a process output signal switching device in the same embodiment, and Fig. 3 is a block diagram showing another embodiment of the present invention. Figure 4 is a circuit diagram of the process output signal switching device in the same embodiment.・1.21...Electronic computer system, 2.4.22゜24.26...Central processing unit,
3. 5. 23. 25°27... Process output device, 6.28... Process output signal switching device, 8.
9. 30-31... Process output signal bus, 2a,
2b, 4a, 4b, 22a. 22b, 24a, 24b, 26a, 26b-・
・Contact, 11.34-・Backflow prevention circuit, a□~a,,
b,~b,,C. ~C7...Process output signal contact.
Claims (1)
機を複数置設けその何れかの電子計算機から出力される
プロセス出力信号を適宜切替えてプロセスに与えるよう
にした多重化電子計算機装置において、前記各電子計算
機のプロセス出力信号に対応させてプロセス出力信号母
線を設けるとともにこれら各母線を切替信号により活線
状態となる如く切替え可能とし、且つ前記各母線にそれ
ぞれの電子計算機からのプロセス出力信号接点の一端を
それぞれ接続するとともにその他端を共通に接続して前
記プロセスに導びき、さらに各母線と前記各プロセス出
力接点どの間にまわり込み防止用ダイオードを接続して
各母線相互間のまわり込みを防止する逆流防止回路を設
けてなるプロセス出力信号切替装置を備え、この切替装
置により前記プロセス出力信号母線を適宜切替えること
により前記例れか１台の電子計算機のプロセス出力信号
あるいは複数台の電子計算機のプロセス出力信号の論理
和を前記プロセスに対して与えられるようにしたことを
特徴とする多重化電子計算機装置。 −In a multiplexed computer device in which a plurality of computers each having a central processing unit and a process output signal are installed, and the process output signal outputted from one of the computers is appropriately switched and applied to the process, each computer A process output signal bus line is provided corresponding to the process output signal of the computer, each of these bus lines can be switched to a live line state by a switching signal, and one end of the process output signal contact from each computer is connected to each bus line. Reverse current is connected to each bus bar and the other end is connected in common to lead to the process, and further, a bypass prevention diode is connected between each bus bar and each of the process output contacts to prevent wraparound between each bus bar. A process output signal switching device provided with a prevention circuit is provided, and by appropriately switching the process output signal bus line by this switching device, the process output signal of one of the computers or the process outputs of a plurality of computers is provided. A multiplexed electronic computer device characterized in that a logical sum of signals can be given to the process. −
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984024806U JPS59165030U (en) | 1984-02-23 | 1984-02-23 | Multiplexed computer equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984024806U JPS59165030U (en) | 1984-02-23 | 1984-02-23 | Multiplexed computer equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59165030U true JPS59165030U (en) | 1984-11-06 |
Family
ID=30155824
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1984024806U Pending JPS59165030U (en) | 1984-02-23 | 1984-02-23 | Multiplexed computer equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59165030U (en) |
-
1984
- 1984-02-23 JP JP1984024806U patent/JPS59165030U/en active Pending
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