JPS5916433B2 - Method for forming patterns on insulating substrates - Google Patents
Method for forming patterns on insulating substratesInfo
- Publication number
- JPS5916433B2 JPS5916433B2 JP18053581A JP18053581A JPS5916433B2 JP S5916433 B2 JPS5916433 B2 JP S5916433B2 JP 18053581 A JP18053581 A JP 18053581A JP 18053581 A JP18053581 A JP 18053581A JP S5916433 B2 JPS5916433 B2 JP S5916433B2
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- resist
- photosensitive dry
- film
- dry film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
Landscapes
- ing And Chemical Polishing (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Description
【発明の詳細な説明】
(1)発明の技術分野
本発明は絶縁基板上へのパターン形成方法に関し、特に
プリント回路パターンの形成において、感光性ドライフ
ィルムレジストを用いてなす絶縁基板上へのパターン形
成方法に関す■)。DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a method for forming a pattern on an insulating substrate, and in particular, in the formation of a printed circuit pattern, a pattern is formed on an insulating substrate using a photosensitive dry film resist. ■) regarding the formation method.
f2、)従来技術と問題点感光性ドライフィルムレジス
トは、レジストを保護する目的でサンドイッチ状はり合
せのマイラ−フィルム等樹脂体が被着されたもので市5
販化もされている。f2,) Prior art and problems Photosensitive dry film resists are made of a resin material such as a Mylar film sandwiched together to protect the resist.
It is also on sale.
かかる感光性ドライフィルムレジストは使用にさいし一
方のマイラ−フィルムをはがして回路形成基板に貼着ラ
ミネートして以後のパターン形成が行なわれる。しかし
ながら、前記パターン形成に当り、前j0記感光性ドラ
イフィルムレジストには回路パターンの露光焼付け時該
レジストの微細粒子や他のゴミが付着しやすい欠点があ
る。When such a photosensitive dry film resist is used, one of the Mylar films is peeled off and the resist is laminated and adhered to a circuit forming board for subsequent pattern formation. However, when forming the pattern, the photosensitive dry film resist described above has the drawback that fine particles and other dust from the resist tend to adhere during exposure and printing of the circuit pattern.
しかも貼着のプリント基板側に前記異物があると感光性
ドライフィルムレジストの密着不良が発生す■)。j5
これは、前記マイラ−フィルム剥離のさい生ずる静電気
電荷による収塵作用によるものと思われる。第1図は前
記露光焼付前状態におけろ感光性ドライフィルムレジス
トをラミネートしたブリ■0 ント基板の状態を示す断
面図である。Furthermore, if the foreign matter is present on the printed circuit board side, poor adhesion of the photosensitive dry film resist will occur. j5
This is believed to be due to the dust-collecting effect due to the electrostatic charge generated during the peeling of the Mylar film. FIG. 1 is a sectional view showing the state of a bright substrate laminated with a photosensitive dry film resist before exposure and printing.
図中、1はプリント基板、2は回路パターン形成用導体
膜、3はレジスト層、及び4は保護のマイラ−フィルム
であり、かかるレジスト層3及びマイラ−フィルム4が
前記感光性ドライ25フィルムレジストを構成する。又
5はフィルム表裏に収積したゴミである。前記不都合を
解消するため、図示状態においてレジスト溶剤組成の洗
浄液で洗浄することも考えられるが、この方法によつて
も例えば、3o(I)回路パターンが基板端まで形成さ
れたパターン化率が大きいプリント基板では、基板端の
前記ラミネートレジスト層が損傷又は溶出する。In the figure, 1 is a printed circuit board, 2 is a conductive film for circuit pattern formation, 3 is a resist layer, and 4 is a protective Mylar film, and the resist layer 3 and Mylar film 4 are the photosensitive dry 25 film resist. Configure. Further, numeral 5 indicates dust accumulated on the front and back sides of the film. In order to eliminate the above-mentioned inconvenience, cleaning with a cleaning solution having a resist solvent composition in the illustrated state may be considered, but even with this method, for example, the patterning rate is high, with the 3o (I) circuit pattern being formed up to the edge of the substrate. In printed circuit boards, the laminated resist layer at the edge of the board is damaged or eluted.
(10レジストラミネート基板は焼付処理時、前35記
静電現象でゴミが再付着しやすい。(10) During the baking process, dust tends to re-adhere to resist laminate substrates due to the electrostatic phenomenon described in 35 above.
という問題がある。(3)発明の目的
本発明はプリント基板に形成する回路パターンの品質向
上と高信頼化を意図し、パターン欠陥が生じにくくパタ
ーン化率の高い感光性ドライフイルムレジストによるパ
ターン形成方法を提案するものである。There is a problem. (3) Purpose of the invention The present invention aims to improve the quality and reliability of circuit patterns formed on printed circuit boards, and proposes a pattern forming method using a photosensitive dry film resist that is less likely to cause pattern defects and has a high patterning rate. It is.
(4)発明の構成並びに実施例
前記目的達成のため、本発明によれば、回路パターン焼
付前の感光性ドライフイルムレジストに対しあるいは前
記第1図に示される状態のレジスト層ラミネートプリン
ト基板のマイラフイルム表面に対し表面絶縁抵抗を減じ
静電気蓄積を防止する薬剤としての帯電防止基材を塗布
、スプレ吹付け等手段により表面処理する。(4) Structure and Embodiments of the Invention In order to achieve the above-mentioned object, according to the present invention, the photosensitive dry film resist before circuit pattern printing or the mylar of the resist layer laminate printed circuit board in the state shown in FIG. The surface of the film is treated with an antistatic base material, which is a chemical that reduces surface insulation resistance and prevents static electricity accumulation, by coating, spraying, or other means.
表面の帯電防止作用は何も恒久的でなくてよく、このた
め回路パターン写真焼付前以下の如き水溶性界面活性剤
を用い表面処理する。The antistatic effect on the surface need not be permanent; therefore, the surface is treated with a water-soluble surfactant as described below before printing the circuit pattern photograph.
前記水溶性界面活性剤としてはNaラウリラミノプロピ
オネート(1aUryLaminOprOplOnat
e)、DEAステアリイリミノデプロピオネート(St
earyLiminOdiprOpiOnate)等を
適用することが出来る。As the water-soluble surfactant, Na laurylaminopropionate (1aUryLaminOprOplOnat
e), DEA steaririminodepropionate (St
earlyLiminOdiprOpiOnate) etc. can be applied.
しかし、前記界面活性剤以外にもクロロシラン、四塩化
ケイ素の加水分解生成物などもプラスチツクフイルム表
面の電荷蓄積効果を顕著に低減させるに有効である。そ
して、前記処理の終つたフイルムレジストラミネート回
路基板に対して図示しない回路パターンマスクを用い露
光焼付けする。However, in addition to the above-mentioned surfactants, chlorosilane, hydrolysis products of silicon tetrachloride, etc. are also effective in significantly reducing the charge accumulation effect on the surface of plastic film. Then, the film resist laminate circuit board that has undergone the above-mentioned processing is exposed and printed using a circuit pattern mask (not shown).
かかる露光焼付後、表面のマイラーフイルム4を剥除し
、続いて現像処理し不要のレジスト層3′ を選択的に
除去した回路パターン形成状態を第2図に示す。After such exposure and baking, the Mylar film 4 on the surface was removed, and then development was performed to selectively remove the unnecessary resist layer 3', and the state in which the circuit pattern was formed is shown in FIG.
しかる後、前記プリント基板1上の回路導体膜2に対し
前記レジスト層3をマスクとして化学的エツチング処理
が施され、更に前記レジスト層3を溶出させて回路パタ
ーン27が形成される。Thereafter, a chemical etching process is performed on the circuit conductor film 2 on the printed circuit board 1 using the resist layer 3 as a mask, and the resist layer 3 is further eluted to form a circuit pattern 27.
かかる状態を第3図に示す。(5)発明の効果
前記本発明の感光性ドライフイルムレジストに対する帯
電防止処理法によれば、極めて簡易な手段で欠陥の少い
高信頼化回路パターンが形成されかつパターン化率のよ
いプリント基板の製造に有効である。Such a state is shown in FIG. (5) Effects of the Invention According to the antistatic treatment method for a photosensitive dry film resist of the present invention, a highly reliable circuit pattern with few defects can be formed by an extremely simple means, and a printed circuit board with a high patterning rate can be formed. Effective for manufacturing.
第1図は感光性ドライフイルムレジストによるプリント
基板形成手段を説明する断面図、第2図及び第3図は回
路パターン形成工程を説明する断面図である。
図中、1はプリント基板、2は回路パターン形成用導体
膜、3はレジスト層、4は樹脂フイルム及び5はゴミ等
の異物である。FIG. 1 is a sectional view illustrating printed circuit board forming means using a photosensitive dry film resist, and FIGS. 2 and 3 are sectional views illustrating a circuit pattern forming process. In the figure, 1 is a printed circuit board, 2 is a conductor film for forming a circuit pattern, 3 is a resist layer, 4 is a resin film, and 5 is foreign matter such as dust.
Claims (1)
ルムレジストをマスクとして選択エッチングし前記絶縁
基板上に導体パターンを形成する絶縁基板上へのパター
ン形成方法において、前記感光性ドライフイルムレジス
トへのパターン焼付前に前記感光性ドライフィルムレジ
ストに対し帯電防止処理がされてなることを特徴とする
絶縁基板上へのパターン形成方法。1. A method for forming a pattern on an insulating substrate, in which a conductive layer formed on the insulating substrate is selectively etched using a photosensitive dry film resist as a mask to form a conductive pattern on the insulating substrate. A method for forming a pattern on an insulating substrate, characterized in that the photosensitive dry film resist is subjected to antistatic treatment before pattern baking.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18053581A JPS5916433B2 (en) | 1981-11-11 | 1981-11-11 | Method for forming patterns on insulating substrates |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18053581A JPS5916433B2 (en) | 1981-11-11 | 1981-11-11 | Method for forming patterns on insulating substrates |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5882594A JPS5882594A (en) | 1983-05-18 |
JPS5916433B2 true JPS5916433B2 (en) | 1984-04-16 |
Family
ID=16084959
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18053581A Expired JPS5916433B2 (en) | 1981-11-11 | 1981-11-11 | Method for forming patterns on insulating substrates |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5916433B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2721297B2 (en) * | 1993-09-14 | 1998-03-04 | ティーディーケイ株式会社 | Manufacturing method of magnetic head |
-
1981
- 1981-11-11 JP JP18053581A patent/JPS5916433B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5882594A (en) | 1983-05-18 |
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