JPS59161813A - Manufacture of impurity doped semiconductor thin film - Google Patents
Manufacture of impurity doped semiconductor thin filmInfo
- Publication number
- JPS59161813A JPS59161813A JP3717183A JP3717183A JPS59161813A JP S59161813 A JPS59161813 A JP S59161813A JP 3717183 A JP3717183 A JP 3717183A JP 3717183 A JP3717183 A JP 3717183A JP S59161813 A JPS59161813 A JP S59161813A
- Authority
- JP
- Japan
- Prior art keywords
- gas
- thin film
- electrode
- electrodes
- semiconductor thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
Abstract
Description
【発明の詳細な説明】
本発明は、不純物をドープした半導体に膜の製造方法の
新規な改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to novel and improved methods of manufacturing films in semiconductors doped with impurities.
従来の不純物をドープした半導体薄膜の製造方法は、必
要な不純物を有する水素化合物気体とシラン、水素等の
ガスとを混合し、この混合ガスのグロー放電分解を行な
うことにより、不純吻をドープした半導体薄膜?形成す
る方法が知られている。The conventional method for manufacturing a semiconductor thin film doped with impurities is to mix a hydrogen compound gas containing the necessary impurities with a gas such as silane or hydrogen, and perform glow discharge decomposition of this mixed gas to dope the impurity. Semiconductor thin film? Methods of forming are known.
しかしながら、上記従来の不純物全ドープした半導体薄
膜の製造方法には、以下のような種々の欠点が存在する
。However, the above-mentioned conventional method for manufacturing a semiconductor thin film fully doped with impurities has various drawbacks as described below.
(1)不純物用のガスとして最も汎用されているものに
、ホスフィン、ジボラン等があるが、これらはいずれも
きわめて毒性が高い。(1) The most widely used gases for impurities include phosphine and diborane, which are all extremely toxic.
(2)ガリウム、アンチモン、アルミニウム、インジウ
ム等の水素化合物気体金持たない原子は、不純′吻のド
ープがなさfLない、本発明は、これらの欠点を除去す
るためになさ′i″したものであって、不純物を固体の
ま捷としておいて、半導体薄膜を形成する時に安全に不
純物のドープを可能とすることを目的とする、以下、図
面にもとづいて、本発明の不純物音ドープした半導体薄
膜の製造方法を詳細に説明する。(2) Hydrogen compound gases such as gallium, antimony, aluminum, and indium have no gold-bearing atoms, and are not doped with impurities.The present invention was made to eliminate these drawbacks. Hereinafter, based on the drawings, the semiconductor thin film doped with impurities of the present invention is intended to enable safe doping of impurities when forming a semiconductor thin film by keeping the impurities in a solid state. The manufacturing method will be explained in detail.
第1図において、電極1aと1b!′i平行平fIi電
極を形成する。2はインジウム、3は不純物をドープし
た半導体薄膜形成用のガラス基板、4はガスタの導入孔
、5はガスタの排気、孔である。な°お6ば、カラス基
板ろをあたためるヒータである。In FIG. 1, electrodes 1a and 1b! 'i parallel plane fIi electrodes are formed. 2 is indium, 3 is a glass substrate doped with impurities for forming a semiconductor thin film, 4 is a gas star introduction hole, and 5 is a gas star exhaust hole. Additionally, there is a heater that warms the glass substrate filter.
このように、インジウム2とガラス基鈑4を設置した状
態で、ガス7の導入孔4から反応室内にガフ 7 k
a fcす。ガス7としては、7ランとアルゴンとを混
合しにガスを用いる。次に、前記電極1aと1bの間に
高周波′電圧又は直流電圧を高層e電源8によりかける
と、グロー放電、アーク放電及び面流放′区等により、
ブランが分解して、カラス基板4の士にンリコン薄膜が
堆積する。同時に、つ′ルゴンによりインジウム2がス
パッタリングされて、シリコン薄膜中にインジウム2が
ドープされる。In this way, with the indium 2 and glass substrate 4 installed, a gaff 7k is introduced into the reaction chamber from the gas 7 introduction hole 4.
a fc. As the gas 7, a mixture of 7 run and argon is used. Next, when a high frequency voltage or a DC voltage is applied between the electrodes 1a and 1b by the high-rise e-power source 8, glow discharge, arc discharge, surface discharge, etc.
The blank decomposes and a thin film of silicone is deposited between the glass substrates 4. At the same time, indium 2 is sputtered by a nitrogen gas to dope the silicon thin film with indium 2.
このようにして製作したシリコン膜の導電率とアルゴン
ガス流部の関係を、第2図に示す。第2図より、アルゴ
ンカス流−喰を増ずとインジウムのドーピングが起こり
、導電率が増加していることがわかる。The relationship between the electrical conductivity of the silicon film manufactured in this way and the argon gas flow area is shown in FIG. From FIG. 2, it can be seen that indium doping occurs without increasing the argon gas flow and the conductivity increases.
′また、熱電能測定により、P型の伝導を示すことも確
認されている。'It has also been confirmed by thermoelectric power measurements that it exhibits P-type conduction.
以上の説明(1、インジウム:と不純物とした場合の、
不純物をドープした/ジョン薄膜の製造方法についてな
さhfcが、この他に、ガリウム、アルミニウム、アン
チモン等ヲ不純物として使用したシリコン、炭化ケイ素
、チツ化り一イ素などの他の半導体薄膜の場合にも、同
様に不純物をドープした半導体薄膜の製造が可能である
。また基板としてはガラスの他、/リコン単結晶2石英
、ステンレス等を用いても良い。更に、半導体薄膜形成
用のガスとして鉱、シラン(SiH4,>の他、四フッ
化ケイ素(81F4)、ジンラン(S:12H6)等を
用いることもてきる。The above explanation (1. Indium: When used as an impurity,
Regarding the manufacturing method of thin films doped with impurities, in addition to this, gallium, aluminum, antimony, etc. are used as impurities for other semiconductor thin films such as silicon, silicon carbide, and nitride. Similarly, semiconductor thin films doped with impurities can also be produced. In addition to glass, the substrate may also be made of /recon single crystal diquartz, stainless steel, or the like. Furthermore, as a gas for forming a semiconductor thin film, silicon tetrafluoride (81F4), silane (S:12H6), etc. can also be used in addition to silane (SiH4).
本発明は、上述したように不純物を固体の丑ま用いるこ
とができるので、
(υ ガスの取扱いに関する危に住か減少する。In the present invention, as mentioned above, since the impurities can be used in the form of solid particles, the dangers associated with handling the gas are reduced.
(2′、水素化合物気体を持たない原子もドープするこ
とができる。(2', atoms without hydrogen compound gas can also be doped.
とめう効果′5r:肩するばかシでなく、イオン注入装
置4のように大がかりな装置が不要で、がっ、イオンイ
ンブランティジョンとは異な9、薄膜形成とドーピング
が同時にできるという効果全も有する。Stopping effect '5r: It is not a burden to shoulder, does not require large-scale equipment like ion implantation equipment 4, and has the full effect that thin film formation and doping can be performed at the same time, which is different from ion implantation. It also has
第1図は、基板と不純物を電極に取り付けた本発明で使
用するプラズマOVD装置内の反応室の断面図、第2図
は、本発明の製造方法によりガラス基権上に形成したP
型不純物半導体薄膜の電気的特性図である。
1a、 ib・・・・・・電極
2・・・・・・インジウム
6・・・・・・カラス基板
4・・・・・・ガスの導入孔
5・・・・・・ガスの排気孔
6・・・・・・ヒータ
7・・・・・・ガ ス
8・・・・・・高周波電源
以 上
出願人 工業技術院長 白坂誠−
出願人 株式会社 第二精工舎
代理人 弁理士 最上 務FIG. 1 is a cross-sectional view of a reaction chamber in a plasma OVD apparatus used in the present invention in which a substrate and impurities are attached to electrodes, and FIG.
FIG. 3 is an electrical characteristic diagram of a type impurity semiconductor thin film. 1a, ib... Electrode 2... Indium 6... Glass substrate 4... Gas inlet hole 5... Gas exhaust hole 6 ... Heater 7 ... Gas 8 ... High frequency power supply and above Applicant Makoto Shirasaka, Director General of the Agency of Industrial Science and Technology - Applicant Daini Seikosha Co., Ltd. Agent Patent Attorney Tsutomu Mogami
Claims (1)
に、他方の電極に基板を設置して、ガスの放電6分解と
スパッタリングとを行なうことを特徴とする不純物をド
ープした半導体薄膜の製造方法。A method for manufacturing a semiconductor thin film doped with impurities, characterized in that all impurities are placed on one of two opposing electrodes, a substrate is placed on the other electrode, and gas discharge decomposition and sputtering are performed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3717183A JPS59161813A (en) | 1983-03-07 | 1983-03-07 | Manufacture of impurity doped semiconductor thin film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3717183A JPS59161813A (en) | 1983-03-07 | 1983-03-07 | Manufacture of impurity doped semiconductor thin film |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59161813A true JPS59161813A (en) | 1984-09-12 |
Family
ID=12490145
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3717183A Pending JPS59161813A (en) | 1983-03-07 | 1983-03-07 | Manufacture of impurity doped semiconductor thin film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59161813A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63162875A (en) * | 1986-12-25 | 1988-07-06 | Tdk Corp | Thin film and production thereof |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5916326A (en) * | 1982-07-19 | 1984-01-27 | Agency Of Ind Science & Technol | Manufacture of thin film |
-
1983
- 1983-03-07 JP JP3717183A patent/JPS59161813A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5916326A (en) * | 1982-07-19 | 1984-01-27 | Agency Of Ind Science & Technol | Manufacture of thin film |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63162875A (en) * | 1986-12-25 | 1988-07-06 | Tdk Corp | Thin film and production thereof |
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