JPS59161132A - Variable equalizer - Google Patents

Abstract

PURPOSE:To set optionally a variable width of impedance so that no variation is generated, by dividing a value of an impedance element into plural pieces, and executing the switcing control of a switch so that an output of a variable gain controlling circuit is subjected to prescribed equalizing control. CONSTITUTION:In order to control the gain of equalizing circuits FEG, SEQ, reference voltage V and an equalizing output OUT are compared by a peak value detecting circuit PD, its magnitude is decided, and the continuity of its result is detected by a pulse controlling circuit PC. Subsequently, a pulse from the circuit PC is counted by a counting circuit CNT, and a counting value corresponding to the gain required for the circuit FEQ, SEQ is obtained. An output of this circuit CNT is converted to a logic for switching switches SW11-SW1n and SW21-SW2n provided on the circuits FEQ, SEQ, by a gain controlling circuit LG, and setting of the gain corresponding to the output of the circuit CNT is executed.

Description

Detailed Description of the Invention (1) Technical field of the invention When equalizing the frequency and loss characteristics of a signal transmission line, the present invention includes a plurality of combinations of passive elements and switches to achieve high-speed and stable equalization. This invention relates to a variable equalizer that controls its operation.

(2) Prior Art and Problems Communication lines for data transmission have frequency vs. loss characteristics as shown in FIG. In Figure 1, the horizontal axis shows the frequency, the vertical axis shows the amount of loss, and the line length (Xl<X2<X3) is shown as a parameter. That is, the longer the line length, the greater the loss at the same frequency, and if the line length is the same, the line has a characteristic called the H characteristic in which the loss increases in proportion to the square root of the frequency at a predetermined frequency or higher. When transmitting data over long distances using a line with such characteristics, a type of variable equalizer called an I-specializer is installed at the end or in the middle of the line. As a variable equalizer, a circuit for equalizing the flat part characteristic that equalizes the flat part characteristic of the characteristic shown in FIG. 1 and a circuit for equalizing the slope part characteristic that equalizes the characteristic of the slope part are usually used. That is, as shown in Fig. 2, a signal subjected to transmission distortion is input from the terminal IN,
A flat section characteristic equalization circuit FEQ and a slope section characteristic equalization circuit SEQ are connected in cascade, and an equalized output signal is obtained from a terminal OUT via a filter FL. And each equalization circuit F
In order to control EQ and SEQ, a variable gain control voltage is taken out from the terminal OUT through the double-wave rectifier circuit FWR and the peak detection circuit PDT, and applied to the variable impedance circuits VIPI and VIP2 for controlling each equalization circuit. Variable impedance circuits VIPI and VIP2 are provided to vary the equalization gain of each equalization circuit. FIGS. 3A and 3B are diagrams showing examples of conventional combinations of other circuits and variable impedances. The output of the peak detection circuit PDT is applied as an analog signal gain control voltage to the variable impedance element for control. The variable impedance elements VZI and VZ2 use inductance elements or resistance elements, and the fixed impedance element Zl.

22 etc. is controlled and the gain of the amplifier is varied to obtain predetermined amplification characteristics. In other words, the flat section characteristic equalization circuit FEQ
Now, assuming that the loss has no frequency characteristic as shown in FIG. 3A, only the amplification gain is equalized. Furthermore, as shown in FIG. 3B, the slope characteristic equalization circuit SEQ performs gain equalization using a configuration in which a capacitor is used as one of the fixed impedance elements, assuming that the loss has a frequency characteristic starting from a low frequency range.

A predetermined equalization can be obtained by the comprehensive characteristics of both. This circuit configuration generally has the following drawbacks. That is, there is a limit to the impedance variable width depending on the element used, there is no degree of freedom in the variable width, there are many variations in the characteristics of the elements, and there is no stability in the equalization characteristic.

Since the impedance characteristics with respect to voltage are determined by the element, there is no degree of freedom in determining the characteristics. Furthermore, since the impedance is variable, the circuit configuration tends to become complicated.

(4) Purpose of the Invention The purpose of the present invention is to improve the above-mentioned drawbacks, and to provide a variable equalizer that is equipped with a plurality of combinations of passive elements and switches and that controls equalization operation at high speed and stably. .

(5) Configuration of the Invention The configuration of the present invention to achieve the above-mentioned object is to provide a variable equalizer that equalizes the frequency and loss characteristics exhibited by a signal transmission line, which corresponds to a predetermined line length and transmission speed. A first method that divides the gain range necessary for equalization into a plurality of parts, has a plurality of combinations of passive elements and switches corresponding to each of the divided gain ranges, and equalizes the flat part of the above characteristics. equalizing means, and second equalizing means for equalizing the slope portion of the characteristic, and depending on the level of the equalization output, the first equalizing means equalizes the slope portion of the characteristic. The variable equalizer is characterized by comprising a control means for controlling a switch of the second equalization means.

(5) Examples of the invention FIG. 4 is a configuration diagram showing an embodiment of the present invention.

In FIG. 4, FF, Q and SEQ are circuits for equalizing the characteristics of the flat portion and the sloped portion, respectively. The characteristic equalization circuit includes a plurality of elements Zll, 212.212, in which impedance values necessary for equalizing predetermined equalization ranges for line lengths are determined in advance, assuming that the data transmission speed is constant, for example. -Zln
SZ21. Z22. Switches Sll, S12, -3in, and S are divided into -Z2n and connected in series, respectively.
2L S22. ---Equipped with 32n.

C and R indicate a capacitor and a resistor as impedance elements of the slope characteristic equalization circuit. Each equalization circuit FEQ, SEQ
In order to control the gain, first, the peak value detection circuit PD compares the predetermined reference voltage ■ and the equalized output OUT, determines the magnitude, and the continuity of the determination result is detected by the pulse control circuit PC. . That is, if the equalized output OUT is large with respect to the reference voltage V, a pulse is sent out from the peak value detection circuit PD, and when this state continues a plurality of times, a pulse is sent out from the pulse control circuit PC. Conversely, if the equalized output OUT is small, the pulse from the peak value detection circuit PD is stopped, and when this state continues multiple times, the pulse from the pulse control circuit PC is stopped.

The counting circuit CNT counts the pulses from the pulse control circuit PC, and the count value corresponds to the gain required for each equalization circuit FEQ, SEQ.

Furthermore, in the gain control circuit LG, the output of the counting circuit CNT is connected to the switch S provided in each equalization circuit FEQ, SEQ.
Wll to S Win, S W21 to 5W2n
is converted into logic for opening and closing, and the gain is set according to the output of the stitch count circuit CNT. For example, each equalization circuit FEQ
, SEQ is large and the output of the pulse control circuit PC is generated, the counting circuit CNT counts down, and the gain control circuit LG of each equalization circuit controls the opening and closing of the switch.

The switches may be closed one at a time, or multiple switches may be closed at the same time.

(6) Effects of the Invention In this way, according to the present invention, the value of the impedance element required in the characteristic equalization circuit is divided into a plurality of parts, the fixed value element is prepared, and the variable gain control circuit outputs Since the opening/closing of the switch is controlled so that the impedance is equalized to a predetermined value, the impedance variable width can be arbitrarily set, and adjustment can be made so as not to cause variations in the operating characteristics of the circuit. Since the equalization control operation is performed using digital signals, the operation speed is increased, and even if there are many insertions and withdrawals of impedance elements, it can be easily stabilized by selecting a small change step of the element constant.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the frequency vs. loss characteristics of a transmission line, Fig. 2 is a block diagram of a conventional variable equalization layer, Fig. 3 is a diagram showing the configuration of a conventional characteristic equalization circuit, and Fig. 4 FIG. 1 is a configuration diagram showing an embodiment of the present invention. F E Q - flat part characteristic equalization circuit SEQ - slope part characteristic equalization circuit FL - filter PDT - peak detection circuit VIPI, VIP2 - variable impedance circuit VZI,
VZ2--Variable impedance element PD...-Beak value determination circuit pc-Pulse control circuit CN T-Pulse counting circuit LG-Gain control circuit Zll~Z2rr-Impedance element Sll~S2n
...-Switch patent applicant Fujitsu Limited (and 4 others) Agent Patent attorney Eisuke Suzuki Continued from page 1 0 Inventor Yoshiaki Kuraishi NEC Corporation, 5-33-1 Shiba, Minato-ku, Tokyo 0 Name: Katsuhiko Gunji, Oki Electric Industry Co., Ltd., 1-7-12, Toranomon, Minato-ku, Tokyo 0 Applicant: Nippon Telegraph and Telephone Public Corporation ■ Applicant: NEC Co., Ltd., 5-33-1 Shiba, Minato-ku, Tokyo Applicant Hitachi Ltd. 5-1 Marunouchi-chome, Chiyoda-ku, Tokyo Applicant Oki Electric Industry Co., Ltd. 201-12 Toranomon 1-7, Minato-ku, Tokyo

Claims (1)

[Claims] In a variable equalizer that equalizes the frequency and loss characteristics exhibited by a signal transmission line, the gain range necessary for equalization is divided into multiple parts corresponding to a predetermined line length and transmission speed, and each divided gain is It has a plurality of combinations of passive elements and switches corresponding to the range, and includes a first equalizing means for equalizing the flat part of the characteristic, and a second equalizing means for equalizing the slope part of the characteristic. 1. A variable equalizer comprising: a control means for controlling switches of the first and second equalization means according to the level of the equalized output.