JPS59158420A - Reset circuit of microcomputer - Google Patents

Abstract

PURPOSE:To obtain a reset system having stable operation by transmitting a signal to a reset terminal after a prescribed time with a timer circuit started by a power failure detecting circuit after power failure. CONSTITUTION:The power failure detecting circuit 7 brings a signal line A to ''L'' when a power failure is detected. Then, an input terminal I of a timer circuit 29' included in a power failure processing routine in the inside of a microcomputer 3 goes to ''L'' and the circuit 29' starts the operation. When a time T set within a time Tmax when a voltage applied to the computer 3 reaches an operating guarantee voltage or below is elapsed after the power failure, an ''L'' signal is outputted from an output terminal O of the circuit 29'. This output is connected to a signal line C of a circuit block 36, an output line B goes to ''L'' since the signal line A is already at ''L'' level and the computer 3 is reset. The output line B is kept to ''L'' so long as the signal line A is at ''L'' even if the state of the terminal O is changed because of the resetting.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a reset circuit for a microcomputer, and particularly when the power supply is backed up or operated at a low voltage, the power supply voltage is lower than the voltage guaranteed for overnight operation of the microcomputer. The following provides a glue circuit to prevent the program from running out of control.

Conventional configurations and their problems In general, microcomputers require a memory circuit that records a group of instructions for executing predetermined tasks according to a certain procedure, and are used in home appliances, toys, watches, etc. In this case, most of the memory circuits mentioned above are non-volatile memory circuits in which the contents recorded in the memory circuits do not disappear regardless of whether power is supplied.

On the other hand, the microconbeater is equipped with an oscillation circuit called a "clock", and this oscillation signal or frequency divided by 2 and 4
It is composed of a kind of sequential circuit that sequentially extracts individual commands from the nonvolatile memory circuit one by one using a frequency-divided oscillation signal to perform a certain task. The data generated during the execution of a series of tasks is recorded in volatile memory circuits that can be read and written freely, but the contents disappear when power is removed.

As mentioned above, when a microcomputer sequentially executes a predetermined series of tasks, it is completely unknown which part of the series of tasks it will start from when the power is turned on. It is dangerous because it may operate completely differently from the content or cause an accident depending on the product to which it is applied.

Therefore, microcomputers are equipped with an interrupt input terminal called a reset terminal, and when the reset terminal is set to 11L II (which may be set to "H" depending on the manufacturer), one of the commands of the nonvolatile memory circuit is , φ'' is forcibly set in a counter (referred to as a "program counter") that determines which instruction to select. (referred to as "7" when "reset" is activated). Thereafter, when the reset terminal becomes l Hl'' again, execution of a series of tasks is started. In other words, the reset terminal becomes L''→
By changing to II HII, it becomes possible to start a series of tasks from the beginning.

Conventionally, it was called the OR reset method, and
- By inserting a Tikora and a capacitor in series between the power supply line and the ground line, and connecting the connection point of the Tikora and the capacitor to the reset terminal, only the time constant determined by the Tikora and the capacitor can be set after the power is turned on. A method in which 11 HII is input to the reset terminal after a delay has been widely adopted.

However, in the above ORIJ upper set type, the power type □
It is effective when the voltage rises from oy to 2V, but for example, in the case of a microconbeater that operates with a power supply voltage of DCsV to 6V, if the power supply voltage drops to DC3V or less, the operation of the microconbeater is not guaranteed. Moreover, there was a problem that the reset did not work. Recently, with the shift to C-MOS and lower power consumption of microcomputers, it has become possible to use large capacity capacitors, dry batteries, etc. as backup in the event of a power outage. When the voltage drops below that, it becomes necessary to stop the operation. FIG. 1 shows a conventional reset circuit with a power failure detection and backup circuit. Reference numeral 1 denotes a DC power supply whose supply is cut off during a power outage, and 2 a stabilized power supply which supplies a power supply voltage vc to the microcomputer 3 via a diode 9. 4 is a relay, display device,
A load circuit includes a switch circuit, etc., and 6 is a group of signal lines connecting the microcomputer 3 and the load circuit 4.

6 is an oscillator, 7 is a power failure detection circuit, and voltage v of DC power supply 1 is
8 is divided by the Tikola 8.10 and connected to the input side of the operational amplifier 13, and the multi-connected voltage Va of the microcomputer 3 is connected to the e input side by the Zener diode 12 to VZt.
A clamped voltage is applied to the voltage 61 and the voltage is distorted. Tycora 11 is for current limiting of Zener diode 12. 14 is a reset circuit, the voltage VC is clamped to vz2 by the Zener diode 16, and the voltage VC is connected to the e input side of the operational amplifier 16.
The voltage divided by Tikola 18 is applied to the input side. Tycora 19 is for current limiting of Zener diode 15. 20 is a Tikora, 21 is a capacitor, and the charging voltage of the capacitor 21 is the microcomputer 3.
is applied to the reset terminal of 23 is a large capacity capacitor, which is used to supply the power supply voltage VC with the charge charged in the capacitor 23 when the supply from the DC power supply 1 is cut off. 24 is Tikora.

FIG. 2 is a graph showing changes in the voltage vo and the state of the output of the operational amplifier 16. If a power outage occurs now at time tφ, the voltage Va is only supplied from the capacitor 23, so it gradually decreases. I'll come.

Voltage across the Zener diode 15 Vz2 Ire:,
Although it does not change, the voltage VC is set to Tikora 17 and Tikora 18.
The potential at point a divided by , decreases in the same way as voltage vc decreases. Then, at time tl, the potential at point a is vz2
When it matches, the output of the operational amplifier 16 changes from "II H" to "L P," so that the microcomputer 3 is reset and stops operating.

If the voltage VC at time t1 is equal to or higher than the minimum guaranteed operation voltage Vc1 of the microcomputer 3, it is possible to stop the microcomputer 3 before it malfunctions.
If the power is restored before time tl, the microcombinator 3 can continue its work.

The output signal line C11-1 from the power failure detection circuit 7 becomes L'' on the time ring, and the microconbeater 3 outputs the signal line C:
Detects "L" and executes the power outage processing routine. The contents of the work performed in the power outage processing routine vary depending on the application equipment, but include cutting off all load circuits 4 and setting start conditions for recovery from power outage. However, the above conventional example has the following various problems.

(1) Since the power for the operational amplifiers 13 and 16 is supplied from the voltage VC, the total current consumption during a power outage is large, and the time t1-! period becomes shorter.

(2) Since a drop in the power supply voltage vc supplied to the power supply terminal Vcc of the microcomputer 3 is detected and execution of the microcomputer 3 is forcibly stopped when the voltage falls below a certain value, there are variations in the guaranteed power outage period.

(3) The lower the operating power supply voltage Vc of the microcon beater 3, the more complex the circuit configuration for detecting low voltage and resetting it becomes, requiring adjustment, making it unsuitable for mass-produced products. It is.

Purpose of the Invention The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to define a reset operation based on time, whereas the conventional reset operation was performed according to the power supply voltage vcO value supplied to the power supply terminal Woo of the microcomputer 3. The purpose of this is to reset the microcomputer 3, which is operating with power supplied from the backup power supply, in the event of a power outage.

Structure of the Invention In order to achieve the above object, the present invention includes at least the above-mentioned power failure detection circuit and a bank amplifier power supply that operates during a power outage, and also includes a timer circuit that starts counting after the above-mentioned power failure detection circuit is activated. The output of the timer circuit is connected to the reset terminal of the microcomputer 3, so that the microcomputer 3 is forcibly reset after a certain period of time.

DESCRIPTION OF THE EMBODIMENTS The embodiments will be described below with reference to the drawings. In each figure, the same number indicates the same thing, and the explanation in each figure will be omitted. In FIG. 3, reference numeral 1 shows another embodiment of the power failure detection circuit in FIG. 1, in which the voltage V of the DC power supply 1 is stabilized by the voltage VOK via the stabilizing power supply 2. In FIG. One end of the Tikora 26 is connected to the voltage vG', and the other end is connected to the ground via the Tikora 26, and further connected to the base of the transistor 27. transistor 2
The emitter of 7 is connected to the ground, and the collector is further connected to the voltage VC via the Tikola 28, and to the timer 10, the -Z circuit 29, and the input terminal of the microcomputer 3. In the timer circuit 29, the potential across the capacitor 30 rises due to the charge flowing through the Tikola 34,
The operational amplifier 33, which is the output of the timer circuit 29, has a potential higher than the potential obtained by dividing the voltage Va by the Tikora 31 and 32.
The diode 36 is a diode that prevents electric charge from flowing into the capacitor 30 via the Tikola 26.

In the above configuration, normally, from DC power supply 1 to stabilized power supply 2.
Diode9. The capacitor 23 is charged with electric charge through the Tikora 24, but in the event of a power outage, the power supply from the DC power supply 1 is stopped, so the capacitor 23 becomes a backup power supply, and the timer circuit 29 and the microcomputer 3 are activated by the discharge from the capacitor 23. Continue the action.

So, if there is a power outage now, the voltage of DC power supply 1 is V
, becomes Ov, and the output voltage vG' of the stabilized power supply also decreases to Ov because the discharge from the capacitor 23 is blocked by the diode 9. Then, when the voltage VC' is applied 11, the l transistor 2 is
Since current flows into the base of transistor 7, the transistor 27 is turned on and the potential across the capacitor 3o is maintained at about 0.2■, but when the voltage VC becomes Ov, the transistor 27 is turned off. The collector of the transistor 27 is also connected to the input terminal check of the microcomputer 3, and normally "1" and "II" are input, but when a power failure occurs, the transistor 27 is turned off and "Hu" is input. The microcomputer 3 can detect the occurrence of a power outage by checking the signal input to the input terminal I, and when the "H'" signal is input to the input terminal check, the preset power outage processing is performed. Jump to the routine and signal line group 6f! :Operate the load circuit 4 through. Since the present invention does not relate to the above-mentioned power outage processing routine, a detailed description thereof will be avoided, but as a minimum processing content, the microcontroller 3
A check routine is necessary to detect if the input of the input terminal check is 'L', that is, the power is restored before the reset is applied.

On the other hand, when the transistor 27 is turned off, the timer circuit 2
Since charges flow into the capacitor 3o provided in the capacitor 9 via the Tikola 34, the potential across the capacitor 30 increases. When the potential at both ends becomes equal to or higher than the potential determined by the Tikora 31 and 32, the output of the operational amplifier 33, that is, the output of the timer circuit 29 becomes "'L°'", and the microcomputer 3 is reset. On the other hand, the timer circuit 2
Since the power consumed by the microcomputer 9 and the microcomputer 23 can be measured in advance through experiments, the voltage Vc supplied to the microcomputer 3 is determined to be the operating guaranteed voltage of the microcomputer 3, taking into account variations etc. The time Tmax until the temperature decreases to below is easily determined. Therefore, after detecting a power outage, the output of the timer circuit 29 is
By setting the time T until it becomes L''' to be less than 'I'max, the microconbeater 3 can be stopped before it malfunctions due to a drop in the power supply voltage vo.

Therefore, it is possible to keep the operating time of the microcomputer 3 constant during a power outage, and there is no need for a reset circuit to detect the low voltage 13. however"
The second invention has the problem that the operating time T of the timer circuit must be delicately adjusted, and the power consumed by the timer circuit itself is wasted.

FIG. 4 is a circuit diagram which has been developed in view of the above-mentioned problem, in which the microcomputer 3 itself performs the function of the timer circuit. In Figure 4, 29'(
A timer circuit is a timer circuit in which a routine for counting time included in the above-mentioned power failure processing routine inside the microcomputer 3 is shown as a block, and normally outputs ll L 11. 7 is the power failure detection circuit explained in FIG. 1, and the output of this circuit is connected to the logic block 36 and the input end check of the microcomputer 3, and the input end check is connected to the timer circuit 29'. . logic block 36
is a type of self-holding circuit composed of an OR circuit 37 and an AND circuit 38, and both signal line input and signal line C are 11 L.
”, the output line B of the logic block 36 becomes 11 L.
11, - output line B becomes II L lT14I, -
2, the output line B is held at L II regardless of the state of the signal line C until the signal line A becomes 'H'.

Normally, the output of the power failure detection circuit 7 connected to the signal line input is If HII, so the output line B is also H'', but when a power failure is detected, the signal line A becomes 1LLL and at the same time the timer The operation of the circuit 29' is started.The count of the timer circuit 29' is a soft count of the microcon beater 3 based on the frequency of the oscillator 6, so that no adjustment is required and the count is highly accurate.

When the preset time T has elapsed, the output of the timer circuit 39' is "l, 11" from the output terminal 0 of the microconbeater 3 connected to the signal line C. Here, 39 is the output terminal. The logic block's signal line input is already "L", and when the signal line C becomes "L II", the output line B
becomes "L II", and the microcomputer 3 is reset. Even if the state of the output terminal O changes due to the reset of the microcomputer 3, as long as the signal line input is "II L", the output 15 line B remains 'L'. Since the logic block can be composed of only an OR circuit and an AND circuit, C-MOS can be used, and the power consumption can be ignored compared to the power consumption of the microconbeater 3.

Therefore, it is possible to eliminate the problems of adjusting the timer circuit 29' and power consumption that remained in FIG.
We can guarantee the operation of 3 times overnight.

Effects of the Invention According to the present invention, since the microconbeater is forcibly reset after a certain period of time, stable operation is achieved.

[Brief explanation of drawings]

Figure 1 is a conventional circuit diagram that detects a drop in voltage VC and resets the microcon beater 3, Figure 2 is a diagram showing the output of an operational amplifier, and Figure 3 is a circuit diagram showing an embodiment of the present invention. 4 are circuit diagrams of other embodiments. 1...DC power supply whose supply is cut off during a power outage,
3... Microcomputer, 6... Microcomputer oscillator, 7,7'... Power failure detection circuit, 13.16.33... Operational amplifier, 14...Low voltage detection circuit, 23...Capacitor that serves as a backup power supply in the event of a power outage, 29.2
9'... Timer circuit that determines the operating time of the microcomputer 3 during power outage, 36... Logic block, vs... Voltage of the DC power supply 1, vc...
... Voltage applied to the microconbeater, VC
C... Microcomputer power supply terminal, R.
...Same as reset terminal, G...Same as input terminal, O...Same as output terminal. Name of agent: Patent attorney Toshio Nakao and one other person 1ゐ 1j

Claims (2)

[Claims] (1) When the input signal is 11L I+, the program is O
An interrupt input terminal (hereinafter referred to as the "reset terminal") that is set to forcibly start from the address, and a non-volatile first terminal that stores a pre-installed program.
A microcombee equipped with a memory circuit, a volatile second memory circuit that allows data to be rewritten at any time, and an oscillation circuit that generates a reference clock when the programs in F are sequentially executed. A power outage detection circuit that generates a signal of 11 HI+ or 11 L I+ during a power outage;
It consists of a bank-up circuit that supplies power to the microcomputer in the event of a power outage, and a timer circuit that generates a signal that sets the reset terminal to "'L" after a certain period of time after a signal is generated from the power outage detection circuit. Microcomputer reset circuit. 2/ ゛ (2) A microcomputer circuit according to claim 1, wherein the timer circuit is operated by a program incorporated in the first memory circuit of the microcomputer.