JPS59157729A - Constant current circuit - Google Patents

Constant current circuit

Info

Publication number
JPS59157729A
JPS59157729A JP3167083A JP3167083A JPS59157729A JP S59157729 A JPS59157729 A JP S59157729A JP 3167083 A JP3167083 A JP 3167083A JP 3167083 A JP3167083 A JP 3167083A JP S59157729 A JPS59157729 A JP S59157729A
Authority
JP
Japan
Prior art keywords
constant current
transistor
output terminal
taken out
control terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3167083A
Other languages
Japanese (ja)
Other versions
JPH0531765B2 (en
Inventor
Junichi Hikita
純一 疋田
Kenzou Tsun
鍾　健三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP3167083A priority Critical patent/JPS59157729A/en
Publication of JPS59157729A publication Critical patent/JPS59157729A/en
Publication of JPH0531765B2 publication Critical patent/JPH0531765B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

PURPOSE:To attain a band gap type constant current circuit capable of switching a current value by connecting plural band gap type constant current circuits in parallel and controlling turning-on/off of current inverting circuits included in these constant current circuits. CONSTITUTION:Blocks A, B, and C connected in parallel constitute band gap type constant current circuits together with transistors TRs T4 and T5. When a control terminal C1 of the block B is at the high level, a TRT6b is turned off, and equal currents are flowed to TRs T1b and T2b, and the constant current circuit including the block B is operated. The same operation is performed with respect to the block C. As the result, a constant current Ia is taken out from an output terminal T0 when control terminals C1 and C2 are at the low level together, and a constant current Ia+Ib is taken out from the output terminal T0 when the control terminal C1 is at the high level and the control terminal C2 is at the low level, and a constant current Ia+Ic is taken out from the output terminal T0 when the control terminal C1 is at the low level and the control terminal C2 is at the high level, and a constant current Ia+Ib+Ic is taken out from the output terminal T0 when control terminals C1 and C2 are at the high level together.

Description

【発明の詳細な説明】 （イ）産業上の利用分野 この発明は定電流回路に係り、特にバンドギャップ型定
電流回路に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to constant current circuits, and particularly to band gap type constant current circuits.

（０１従来技術 第１図は従来のバンドギャップ型定電流回路の概略図で
ある。図において、１及びＴ２はＰＮＰ　トランジスタ
、Ｔ３はマルチエミッタ型のＮＰＮ　ｌ−ランジスタ、
Ｔ４及びＴ５はＮＰＮ）ランジスタである。(01 Prior Art Figure 1 is a schematic diagram of a conventional band gap type constant current circuit. In the figure, 1 and T2 are PNP transistors, T3 is a multi-emitter type NPN l-transistor,
T4 and T5 are NPN) transistors.

しかして、トランジスタＴ１及びＴ２のエミッタは電源
ライン■ｃｃに接続され、一方トランジスタＴ３のエミ
ッタは抵抗Ｒを介して、またトランジスタＴ４トＴ５の
エミッタは直接接地されている。Thus, the emitters of the transistors T1 and T2 are connected to the power supply line cc, while the emitter of the transistor T3 is directly grounded via the resistor R, and the emitters of the transistors T4 and T5 are directly grounded.

そして、トランジスタＴ１のベース及びコレク久トラン
ジスタＴ２のベース、トランジスタＴ３のコレクタは相
互に接続されている。またトランジスタＴ２のコレクタ
、トランジスタＴ３．Ｔ５のベース、トランジスタ上の
ベース及びコレクタも相互に接続されている。The base of the transistor T1, the base of the transistor T2, and the collector of the transistor T3 are connected to each other. Also, the collector of the transistor T2, the transistor T3. The base of T5, the base and collector on the transistor are also interconnected.

そして、トランジスタＴ５のコレクタは出力端子’ｒｏ
に接続されている。And the collector of transistor T5 is the output terminal 'ro
It is connected to the.

ここで、トランジスタＴ１とＴ２のベース・エミッタ電
圧は等しいから、両トランジスタのエミッタ面積を同一
とすれば、各エミッタ電流は等しくなり、これらはトラ
ンジスタＴ３及びＴ４のコレクタに流れ込む。Here, since the base-emitter voltages of the transistors T1 and T2 are equal, if the emitter areas of both transistors are made the same, each emitter current becomes equal, and these flow into the collectors of the transistors T3 and T4.

一方、トランジスタＴ３のエミッタ面積をトランジスタ
Ｔ４のそれのＮ倍にすると、トランジスタＴ３の逆方向
飽和電流はトランジスタＴ４の飽和電流のＮ倍である。On the other hand, if the emitter area of the transistor T3 is made N times that of the transistor T4, the reverse saturation current of the transistor T3 is N times the saturation current of the transistor T4.

したがって、このときのトランジスタＴ３のベース・エ
ミッタ電圧ＶＢＥ’３は次式であられされる。Therefore, the base-emitter voltage VBE'3 of the transistor T3 at this time is given by the following equation.

ＶＢＥ３＝ＶＢＢ４−（ＫＴ／’Ｉ）ＸＪＩ！ｔｔＮ　
　（１）こ＼で、ＶＢＥ４はトランジスタＴ４のベース
・エミタ電圧ＫＴ／ｑはいわゆる熱電圧である。VBE3=VBB4-(KT/'I)XJI! ttN
(1) Here, VBE4 is the base-emitter voltage KT/q of the transistor T4, which is a so-called thermal voltage.

したがって、抵抗Ｒの電圧降下はＲＩ　＝　（ＫＴ／（
１）ＸｌｎＮとなり、電流■は抵抗Ｒで定まることが判
る。それ故、トランジスタＴ４とＴ５のエミッタの面積
を等しくとれば、出力端子ＴＯの吸込み電流は、電源電
圧に依存せず、抵抗Ｒで決まる定電流Ｉとなる。Therefore, the voltage drop across resistor R is RI = (KT/(
1) It can be seen that XlnN, and the current ■ is determined by the resistance R. Therefore, if the areas of the emitters of the transistors T4 and T5 are made equal, the sink current of the output terminal TO becomes a constant current I determined by the resistor R, independent of the power supply voltage.

しかしながら、このような従来の定電流回路（よごれを
集積回路で実現すると、抵抗Ｒの取りかえが事実上、不
可能であるため、例えばＬＥＤの光度や増幅器のゲイン
等の変更に必要な電流値の切換えができないという欠点
がある。However, if such a conventional constant current circuit (contamination) is implemented using an integrated circuit, it is virtually impossible to replace the resistor R. The disadvantage is that it cannot be switched.

（ハ）目的 この発明は電流値の切換えが可能なバンドギャップ型の
定電流回路を提供することを目的としている。(c) Purpose This invention aims to provide a bandgap type constant current circuit capable of switching the current value.

に）構成 この発明に係る定電流回路は、複数個のバンドギャップ
型定電流回路を並列接続し、前記定電流回路に含まれる
電流反転回路をスイッチング・トランジスタによって、
オン・オフ制御することにより、出力端子から任意の定
電流を取り出すように構成しである。B) Structure A constant current circuit according to the present invention has a plurality of bandgap type constant current circuits connected in parallel, and a current inverting circuit included in the constant current circuit by a switching transistor.
It is configured so that an arbitrary constant current can be taken out from the output terminal by controlling on/off.

（ホ）実施例 第２図は、この発明の一実施例の概略図であム同図にお
いて、第１図と同一部分は同一符号で示しである。並列
接続されたブロックＡ、Ｂ、ＣはトランジスタＴ４及び
Ｔ５とともに、それぞれバンドギャップ型定電流回路を
構成している。各ブロックの構成部分であるトランジス
タＴｘａ、Ｔ１ｂ、Ｔｌｃは第１図のトランジスタＴ１
に、トランジスタＴ２　ａ　。(e) Embodiment FIG. 2 is a schematic diagram of an embodiment of the present invention. In this figure, the same parts as in FIG. 1 are designated by the same reference numerals. Blocks A, B, and C connected in parallel, together with transistors T4 and T5, each constitute a bandgap type constant current circuit. The transistors Txa, T1b, and Tlc, which are the constituent parts of each block, are the transistor T1 in FIG.
, transistor T2 a .

Ｔ２ｂｓＴ２ｃは同じくトランジスタＴ２に、そして、
トランジスタＴ３ａ、Ｔ３ｂ　、　Ｔ３Ｃはトランジス
タＴ３に抵抗Ｒａ％Ｒｂ、Ｒｃは抵抗Ｒにそれぞれ対応
している。T2bsT2c is also connected to transistor T2, and
Transistors T3a, T3b, and T3C correspond to transistor T3, resistor Ra%Rb, and Rc to resistor R, respectively.

そのため、ブロックＡを含む定電流回路は、定電流１ａ
を、ブロックＢは定電流すを、ブロックＣは定電流Ｉｃ
をそれぞれ出力端子Ｔｏより吸い込むことになる。Therefore, the constant current circuit including block A has a constant current of 1a
, block B has constant current Ic, and block C has constant current Ic.
are respectively sucked in from the output terminal To.

一方、ブロックＢ及びＣにおいて、Ｔ６ｂＳＴ６ｃはス
イッチングトランジスタであって、Ｔ６ｂはトランジス
タＴｌｂに、Ｔ２ＣはトランジスタＴｉｃにそれぞれ並
列接続されている。On the other hand, in blocks B and C, T6bST6c are switching transistors, T6b is connected in parallel to transistor Tlb, and T2C is connected in parallel to transistor Tic.

したがって、ブロックＢのトランジスタＴ１ｂ１Ｔ２ｂ
、Ｔａｂ及びブロックＣのトランジスタＴ１ｃ、Ｔ２ｃ
。Therefore, transistors T1b1T2b of block B
, Tab and transistors T1c, T2c of block C
.

Ｔ２Ｃはそれぞれ電流反転回路を形成している。Each T2C forms a current inversion circuit.

すなわち、トランジスタＴ６ｂのベースである制御端子
ＣＩがｒＨＪのときＴ６ｂはオフとなり、トランジスタ
Ｔｌｂ及びＴ２ｂに等しい電流が流れる結果、ブロック
Ｂを含む定電流回路が働くこととなる。That is, when control terminal CI, which is the base of transistor T6b, is rHJ, T6b is turned off, and as a result, equal current flows through transistors Tlb and T2b, and as a result, a constant current circuit including block B operates.

一方、制御端子Ｃ１がｒＬＪのとき、トランジスタＴ６
ｂはオンとなり、トランジスタＴｌｂ及びＴ２ｂがオフ
になるので、この定電流回路は動作しない。On the other hand, when the control terminal C1 is rLJ, the transistor T6
b is turned on and transistors Tlb and T2b are turned off, so this constant current circuit does not operate.

またブロックＣを含む定電流回路についても同様に制御
される。Further, the constant current circuit including block C is similarly controlled.

その結果、制御端子Ｃ１、Ｃ２がともにｒＬＪのとき、
定電流Ｉａ、　ＣＩがｒＨＪで、Ｃ２がｒＬＪのとき、
定電流１ａ＋Ｉｂ、　ＣＩがｒＬＪで、Ｃ２がｒＨＪの
とき、定電流Ｉａ＋　Ｉｂ、　ＣＩ、Ｃ２がともにｒＨ
Ｊのとき、定電流Ｉａ＋　Ｉｂ＋Ｉｃがそれぞれ出力端
子Ｔｏより取り出される。As a result, when both control terminals C1 and C2 are rLJ,
Constant current Ia, when CI is rHJ and C2 is rLJ,
Constant current 1a+Ib, when CI is rLJ and C2 is rHJ, constant current Ia+Ib, CI and C2 are both rH
When J, constant currents Ia+Ib+Ic are respectively taken out from the output terminals To.

なお、実施例では３個の定電流回路を並列接続したもの
について説明したが、接続個数は任意に設定しうろこと
はもちろんである。In the embodiment, three constant current circuits are connected in parallel, but the number of connected circuits can of course be set arbitrarily.

（へ）効果 この発明は電流反転回路を制御することによって、並列
接続された各バンドギャップ定電流回路を制御するもの
であるから、同一の出力端子から任意の２種類以上の定
電流を取り出すことができる。(F) Effect Since this invention controls each bandgap constant current circuit connected in parallel by controlling a current inverting circuit, any two or more types of constant current can be taken out from the same output terminal. I can do it.

また、この発明は、制御端子に関連して、付加回路を設
けることにより、定電流値を電子的に選択することがで
きるので、集積回路に使用するのに大変に都合のよいも
のである。Further, the present invention is very convenient for use in integrated circuits because the constant current value can be electronically selected by providing an additional circuit in connection with the control terminal.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来のバンドギャップ型定電流回路の概略図、
第２図はこの発明の一実施例の概略図である。 Ｔｌａ”Ｔ１ｃＳＴ２ａ　〜Ｔ２Ｃ−Ｐ　Ｎ　Ｐ　）ラ
ンジス久Ｔ３　ａ　＝　Ｔ３ｃ・・・マルチエミッタ・
トランジスタ、Ｔ４　、Ｔ５・・・ＮＰＮ）ランジスタ
、Ｒａ〜ＲＣ・・・抵抗、Ｃ１、Ｃ２・・・制御端子、
’ｒｏ　　・・・出力端子。 特許出願人　ローム株式会社 代理人弁理士大西孝治Figure 1 is a schematic diagram of a conventional bandgap constant current circuit.
FIG. 2 is a schematic diagram of an embodiment of the present invention. Tla"T1cST2a ~ T2C-PNP) Rungis Ku T3 a = T3c...Multi-emitter
Transistor, T4, T5...NPN) transistor, Ra~RC...resistance, C1, C2...control terminal,
'ro...Output terminal. Patent applicant Koji Onishi, patent attorney representing ROHM Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] （１）複数個のバンドギャップ型定電流回路を並も 列に接続し、前記定電流回路に含まれる電流反転回路を
スイッチング・トランジスタにより、オン・オフ制御す
ることにより、出力端子から任意の定電流を取り出すよ
うに構成したことを特徴とする定電流回路。(1) By connecting a plurality of bandgap type constant current circuits in parallel and controlling the current inverting circuit included in the constant current circuits on and off using a switching transistor, an arbitrary constant value can be set from the output terminal. A constant current circuit characterized by being configured to extract current.
JP3167083A 1983-02-26 1983-02-26 Constant current circuit Granted JPS59157729A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3167083A JPS59157729A (en) 1983-02-26 1983-02-26 Constant current circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3167083A JPS59157729A (en) 1983-02-26 1983-02-26 Constant current circuit

Publications (2)

Publication Number Publication Date
JPS59157729A true JPS59157729A (en) 1984-09-07
JPH0531765B2 JPH0531765B2 (en) 1993-05-13

Family

ID=12337558

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3167083A Granted JPS59157729A (en) 1983-02-26 1983-02-26 Constant current circuit

Country Status (1)

Country Link
JP (1) JPS59157729A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0396996A2 (en) * 1989-05-08 1990-11-14 National Semiconductor Corporation Bandgap threshold circuit with hysteresis
JP2009157702A (en) * 2007-12-27 2009-07-16 Mitsubishi Electric Corp Reference power supply device and control device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS561769A (en) * 1979-06-19 1981-01-09 Nec Corp Constant current circuit
JPS57106915A (en) * 1980-12-24 1982-07-03 Fujitsu Ltd Constant current circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS561769A (en) * 1979-06-19 1981-01-09 Nec Corp Constant current circuit
JPS57106915A (en) * 1980-12-24 1982-07-03 Fujitsu Ltd Constant current circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0396996A2 (en) * 1989-05-08 1990-11-14 National Semiconductor Corporation Bandgap threshold circuit with hysteresis
JP2009157702A (en) * 2007-12-27 2009-07-16 Mitsubishi Electric Corp Reference power supply device and control device

Also Published As

Publication number Publication date
JPH0531765B2 (en) 1993-05-13

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