JPS59155926A - Forming method of pattern - Google Patents

Forming method of pattern

Info

Publication number
JPS59155926A
JPS59155926A JP3111783A JP3111783A JPS59155926A JP S59155926 A JPS59155926 A JP S59155926A JP 3111783 A JP3111783 A JP 3111783A JP 3111783 A JP3111783 A JP 3111783A JP S59155926 A JPS59155926 A JP S59155926A
Authority
JP
Japan
Prior art keywords
film
resist
developer
pattern
developing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3111783A
Other languages
Japanese (ja)
Inventor
Masaru Sasago
勝 笹子
Kazuhiko Tsuji
和彦 辻
Koichi Kugimiya
公一 釘宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3111783A priority Critical patent/JPS59155926A/en
Publication of JPS59155926A publication Critical patent/JPS59155926A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/09Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/094Multilayer resist systems, e.g. planarising layers

Abstract

PURPOSE:To thicken the film thickness of a resist film applied, and to reduce the irregularities of a stepped difference section on a substrate by selectively photosensitizing a radiation sensitive resin film in multilayer structure having different developing rates, developing the resin film first by using a developer of high concentration and developing it by a developer of low concentration. CONSTITUTION:A thick positive type ultraviolet resist film 7 is applied onto a semiconductor substrate 1 on which an insulating film 2, the surface thereof has stepped difference section patterns 2a, is formed while burying patterns 2a. Ultraviolet beams 10 are irradiated to the whole surface to change the film 7 into a photosensitized film 7a, the film 7a is turned into a film 7b through heat treatment, a second resist film 8 of the same type as the film 7 is applied onto the film 7b, and the whole surface is exposed and thermally treated. A mask 9 with light shielding sections 9a consisting of Cr is superposed on films in isolated multilayer applying structure difficult to be mutually dissolved as mentioned above, ultraviolet rays are irradiated, one parts of the film 8a of an irradiating section and the film 7b under the film 8a are removed by using a developer in high concentration, and patterns consisting of the films 8 and 7b are left by employing a developer in low concentration.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はパターン形成方法とくに放射線感応性樹脂を用
いたパターン形成方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a pattern forming method, particularly to a pattern forming method using a radiation-sensitive resin.

従来例の構成とその問題点 集積回路の高集積化、高密度化は従来のリングラフィ技
術の進歩により増大してきた。その最小線幅も1μm前
後となってきており、この加工線幅を達成するには、高
開口レンズを有゛した縮小投影法により紫外線露光する
方法、基板上に直接描画する電子ビーム露光法、X線を
用いたグロキシミティ露光法があげられる。しかし、い
ずれの方法もスループットすなわち量産性を慢性に、す
ることなく良好な線幅制御と高解像度及び良好な段差部
のカバレジを同時に得ることは困難である。特に実際の
集積回路上においては必然的に凹凸が発生し、放射i感
尼性樹脂(以後、レジストと略)を塗布した後では、凹
凸部におけるレジストの膜厚差が発生し、良好な線幅制
御が不可能となる。
Conventional configurations and their problems High integration and high density of integrated circuits have increased due to advances in conventional phosphorography technology. The minimum line width has become around 1 μm, and in order to achieve this processed line width, there are three methods: ultraviolet exposure using a reduction projection method with a high aperture lens, electron beam exposure that draws directly on the substrate, One example is the gloximity exposure method using X-rays. However, with either method, it is difficult to simultaneously obtain good line width control, high resolution, and good coverage of stepped portions without chronically reducing throughput, that is, mass production. In particular, unevenness inevitably occurs on actual integrated circuits, and after applying radiation-sensitive resin (hereinafter referred to as resist), differences in the resist film thickness occur at the uneven parts, resulting in good lines. Width control becomes impossible.

このことを第1図を用いて説明する。第1図は従来法に
より単層レジスト膜を段差部へ塗布し、その段差部に対
して交叉してパターニングを行なった状態を示したもの
である。第1図Aは半導体基板等の基板1上に配線等の
段差物2aを有する配線q S 102等の膜2が形成
されておりその上にレジスト3が塗布された状態の断面
図である。この場合、段差物2がない平担な基板1上の
レジスト3の膜厚をtR2の厚、さに塗布した時、段差
物2上のレジスト3の膜厚ば、レジスト自身の粘性と塗
布時の回転数により膜厚tR2に決定される。
This will be explained using FIG. FIG. 1 shows a state in which a single-layer resist film is applied to a stepped portion by a conventional method and patterned across the stepped portion. FIG. 1A is a sectional view of a state in which a film 2 such as a wiring q S 102 having a step 2a such as a wiring is formed on a substrate 1 such as a semiconductor substrate, and a resist 3 is applied thereon. In this case, when the film thickness of the resist 3 on the flat substrate 1 without the step 2 is applied to the thickness tR2, the thickness of the resist 3 on the step 2 is determined by the viscosity of the resist itself and the time of coating. The film thickness tR2 is determined by the number of rotations.

この時tR1= tR2にすること、つまり凹凸部での
レジスト膜の膜厚差を皆無にすることは物理的に不可能
である。このようにtR1〜”R2の膜厚においてレジ
ストパターンを形成した場合の平面図を第1図Bに示す
At this time, it is physically impossible to set tR1=tR2, that is, to eliminate the difference in the thickness of the resist film at the uneven portions. FIG. 1B shows a plan view of a resist pattern formed with a film thickness of tR1 to "R2" in this manner.

これは、段差物パターン2aに対して直角に交叉してレ
ジストパターン3の膜厚tR1の位置でパターン幅が氾
、と決定されると、膜厚tR2の位置ではtR□〉tR
2という関係があるため、パターン幅はQ とでかつa
l〉a2となり段差部におけへ寸法変換差が発生してし
捷う。つ捷シ、非常に微細パターンになると良好な線幅
制御が得られず、更に段差物2aのエツジ部2bで実質
上、平担部の膜厚tR1より厚くなるため解像度が低下
する。一般に解像度はレジストの膜厚が薄くなればなる
ほど向上する。これは放射線自身の波長によって微細間
隙になると干渉9回折現像のため入射するエネルギーが
減衰してしまうためである。
This means that if it is determined that the pattern width is increased at a position where the resist pattern 3 has a film thickness tR1 by intersecting the step pattern 2a at a right angle, then at a position where the film thickness tR2 is tR□>tR.
2, the pattern width is Q and a
l>a2, and a dimensional conversion difference occurs at the stepped portion, resulting in warpage. In the case of a very fine pattern, good line width control cannot be obtained, and furthermore, the edge portion 2b of the stepped material 2a is substantially thicker than the film thickness tR1 of the flat portion, resulting in a decrease in resolution. Generally, the resolution improves as the resist film thickness becomes thinner. This is because the incident energy is attenuated due to interference 9-diffraction development when fine gaps are created due to the wavelength of the radiation itself.

つまり段着物上のレジスト膜厚差を少なくするために、
ただ単にレジストを厚ぐ塗布し見掛は上のレジスト膜厚
差を軽減しようとしても解像度が低下するためにパター
ン形成上好ましくない。
In other words, in order to reduce the difference in resist film thickness on the layered kimono,
Even if an attempt is made to reduce the apparent difference in resist film thickness by simply coating the resist thickly, the resolution deteriorates, which is not preferable in terms of pattern formation.

このような従来の単層レジストによる段差上での解像度
、寸法変換差の値を向上するために三層構造レジスト法
なとが提案されている。この方法を第2図を用いて説明
する。基板1上に段差部2が形成され有機膜例えばフォ
トレジスト4が厚く塗布され(第2図A)、、更に有機
膜4上に無機膜層5例えばプラズマ酸化硅素膜などを形
成後、最上層にレジスト6を薄く塗布する(第2図B)
A three-layer structure resist method has been proposed in order to improve the resolution and dimensional conversion difference value on a step using such a conventional single-layer resist. This method will be explained using FIG. 2. A stepped portion 2 is formed on the substrate 1, an organic film such as a photoresist 4 is thickly coated (FIG. 2A), and an inorganic film layer 5 such as a plasma silicon oxide film is further formed on the organic film 4, and then the uppermost layer is formed. Apply a thin layer of resist 6 to (Figure 2B)
.

次にレジスト層6をバターニングレジストパターン6a
を得る(第2図C)。レジストパターン6aを介してド
ライエツチング技術を用いて無機膜層パターン5aを得
る(第2図D)。
Next, the resist layer 6 is patterned with a resist pattern 6a.
(Figure 2C). An inorganic film layer pattern 5a is obtained using the dry etching technique through the resist pattern 6a (FIG. 2D).

最後にレジストパターン6a、無機膜層5aを介して酸
素系ガスプラズマにて有機膜パターン4aを形成する方
法である(第2図E)。
Finally, an organic film pattern 4a is formed using oxygen-based gas plasma via the resist pattern 6a and the inorganic film layer 5a (FIG. 2E).

この三層構造レジストによるパターン形成では最上層の
レジスト6を薄く出来るため解像度が良く、シかも最下
層の有機膜層4を厚く塗布しているため基板1上の段差
2の影響なくレジスト層<ターノロaが得られるため寸
法変換差が少ない。し7かしドライエツチング技術上の
終点検出や、エツチング条件が多層にわたるために難し
く、シかも工程時間が長くかかり量産上、経済上好まし
くない。捷た、パターン4a形成時にレジストパターン
6aが除去される不都合がある。
In pattern formation using this three-layer structure resist, the top layer resist 6 can be thinned, resulting in good resolution, and the bottom layer organic film layer 4 is coated thickly, so there is no effect of the step 2 on the substrate 1, and the resist layer < Since the turn-rotation a can be obtained, there is little difference in dimensional conversion. However, it is difficult to detect the end point of the dry etching technique and the etching conditions cover multiple layers, and the process time may be long, which is unfavorable in terms of mass production and economy. There is an inconvenience that the resist pattern 6a is removed when the pattern 4a is formed.

発明の目的 そこで、本発明は、従来のように単層レジストを、凹凸
を有する実際の集積回路上にパターン形成する際に障害
となる。パターン寸法変換差とそれに伴なう解@度の低
下を防ぎ、又、ドライエッチなどで膜減りしても十分の
厚さを有しており、且つ三層構造レジストによるパター
ン形成方法の経済性、量産性上の欠点を克服するパター
ン形成方法を提供することを目的とする。
OBJECTS OF THE INVENTION Therefore, the present invention presents an obstacle to patterning a conventional single-layer resist on an actual integrated circuit having irregularities. It prevents the difference in pattern size conversion and the accompanying decrease in resolution, has sufficient thickness even if the film is reduced by dry etching, etc., and is economical as a pattern forming method using a three-layer resist. The object of the present invention is to provide a pattern forming method that overcomes drawbacks in mass production.

発明の構成 本発明は、レジストの膜厚を厚く塗布しながらも、段差
部におけるノくターン寸法変換差を少なくし、かつ解像
度の低下を防ぐために、選択的に露光した単層レジスト
膜の場合と、異なる現像速度を有する多層構造のレジス
ト膜の場合に対して濃度の異なる2種類以上の現像液を
用いて、たとえば最初に濃度の高い傍、保液で現像処理
を施こし、第2段階は第1段階より濃度の低い現像液で
現像処理するパターン形成方法を提供しようとするもの
である。
Structure of the Invention The present invention provides a single-layer resist film that is selectively exposed to light in order to reduce the difference in notch dimension conversion at step portions and to prevent a decrease in resolution while applying a thick resist film. In the case of a resist film with a multilayer structure having different development speeds, two or more types of developers with different concentrations are used, for example, first the development process is performed with a high concentration solution and a retaining solution, and then the second step is performed. attempts to provide a pattern forming method in which development is performed using a developer having a lower concentration than that in the first stage.

本発明者らは、数々なる実験から単層レジスト膜又は感
光した第1のレジスト上に第2のレジストを積層した2
層膜に対して、第1段階として濃度の高い現像液で現像
した後、第2段階目として濃度の低い現像液で現像処理
することにより安定かつ高Pス姑りト比のレジスト層(
ターンを得られることを見い出した。
Through numerous experiments, the present inventors discovered that a single layer resist film or a second resist film laminated on a photosensitive first resist film was used.
The layer film is developed with a high-concentration developer in the first step, and then developed with a low-concentration developer in the second step to create a stable resist layer with a high P-to-total ratio (
I found that I could get a turn.

本発明において、高Pスペクト比パターンを得る安定な
現像方法として、第1段階は第1のレジスト上の第2の
レジストの感光反応した部分を速く現僕除去するため濃
度の高い現像液で処理し、次に、第2のレジストの感光
領域の下方の第1のレジストを現像除去するためにa度
の低い現像液で現像除去するのが望ましい。こうした2
段階の現像処理により第1のレジスト現像時に第2のレ
ジストの未感光の部分の現像速度が抑えられるため高P
スペクト比のパターンが得られる。一般に本発明の方法
はあらゆる放射線レジストの分解形均、像反応を有する
ものに適用できるものである。
In the present invention, as a stable development method for obtaining a high P spectral ratio pattern, the first step is treatment with a high-concentration developer in order to quickly remove the photoreacted portion of the second resist on the first resist. Next, in order to develop and remove the first resist below the photosensitive area of the second resist, it is desirable to use a developer with a low degree of a. These 2
Due to the stepwise development process, the development speed of the unexposed part of the second resist is suppressed during the development of the first resist, resulting in a high P value.
A spectrum ratio pattern is obtained. In general, the method of the present invention can be applied to any radiation resist having a decomposition type and image response.

実砲例の説明 本発明を単層レジストに対して適用した第1の実砲例を
説明する。実砲例としてポジ形レジストを例にとって説
明する。半導体基板上にポジ形レジスト例えばAZ14
70  (シソプレイ社製)を2μm厚に塗布し、この
レジストに対して選択露光を100 m I / aj
のエネルギにて施こす。次に第1の現像液として、MF
312(シソプレイ社製)と水との1:1希釈液にて1
0秒間現像処理を施こし、連続的にMF312と水との
1:2希料液によって50秒間現像後、リンス処理を施
こし、露光部分を現像除去した。以上のように2種類の
濃度の違う現像液すなわち濃度の濃い現像液で表面の感
光層゛を速く現像した後、未感光部の膜べりを防止する
ため低い濃度の伝い現像液で現像することによって、1
μmのラインアンドスペースの高Pスペクト比のパター
ン形成が可能であった。
Description of Actual Gun Example A first actual gun example in which the present invention is applied to a single layer resist will be described. An explanation will be given using a positive resist as an example of an actual gun. Apply a positive resist such as AZ14 on a semiconductor substrate.
70 (manufactured by Shisoplay Co., Ltd.) to a thickness of 2 μm, and this resist was selectively exposed at 100 m I/aj.
It is applied with the energy of Next, as the first developer, MF
1 with a 1:1 dilution of 312 (manufactured by Shisopray) and water.
A development process was performed for 0 seconds, and after continuous development for 50 seconds with a 1:2 dilute solution of MF312 and water, a rinsing process was performed to remove the exposed areas by development. As mentioned above, after rapidly developing the photosensitive layer on the surface with two types of developers with different concentrations, that is, a developer with a higher concentration, it is developed with a developer with a lower concentration in order to prevent film deterioration in the unexposed areas. By 1
It was possible to form a line-and-space pattern with a high P spectral ratio of μm.

本発明の第2の実砲例として異なる現像速度を有する多
層構造のレジストに用いた場合を第3図を用いて詳細に
説明する。実施例としてポジ形レジストの特にポジ形紫
外線レジスト(以後、ポジUVレジスト)を例にとって
説明する。半導体基板等あるいは半導体基板上に絶縁膜
の形成された基板1上にポジUVレジストアを配線等の
段差物パターン2aの膜厚より厚く塗布し表面を平担に
し、ソフトベーキングを施こす−(第3図A−)。次に
ポジUVレタス)7にUV光10を全面照射することに
よってレジストア全面を感光したポジUVレジ’、< 
) 7 aにする(第3図B)。感光したポジレジス)
7aに熱処理を箔こしてレジスト7bとする(第3図C
)゛。この熱処理は望ましいが必ずしも必要でない。
As a second practical example of the present invention, a case where the resist is used in a multilayer structure having different development speeds will be described in detail with reference to FIG. As an example, a positive type resist, particularly a positive type ultraviolet resist (hereinafter referred to as positive UV resist) will be explained as an example. A positive UV resist is applied to a semiconductor substrate or the like or a substrate 1 on which an insulating film is formed on the semiconductor substrate to a thickness greater than that of the step pattern 2a such as wiring, the surface is made flat, and soft baking is performed. Figure 3A-). Next, by irradiating the entire surface of the positive UV lettuce) 7 with UV light 10, the entire surface of the resist was exposed to the positive UV register', <
) 7a (Figure 3B). photosensitive positive register)
7a is heat treated with foil to form resist 7b (Fig. 3C)
)゛. This heat treatment is desirable but not necessary.

次に第1層目のポジUVレジストアと同タイプの第2の
ポジUVレジスト8を、全面露光、熱処理を施こした第
1のポジUVレジスト7b上に塗布しソフトベーキング
を施こす。この際1、熱処理ktfifxこして膜質の
変化したレジスト7bとしておくとポジUVレタス)7
bと第2のポジUVレジスト8は互いに溶解が生じにく
く分離した多層塗布構造とすスこ′とができる(菓3図
D)。
Next, a second positive UV resist 8 of the same type as the first layer of positive UV resist is applied onto the first positive UV resist 7b which has been exposed to light over the entire surface and subjected to heat treatment, and soft baking is performed. At this time, 1. If the resist 7b whose film quality has changed after heat treatment ktfifx is used, it will be a positive UV lettuce) 7
b and the second positive UV resist 8 are unlikely to dissolve each other and can form a separate multilayer coating structure (Fig. 3D).

次にパターンを有したマスク9により光じゃへい部であ
るクロム都9a以外に紫外線を用いて選択的に第1.第
2のポジUVレジスト8,7bを照射する(第3図E)
。そして紫外線照射部の第2のポジUVレジスト8aと
その下の第1のポジUVレジストアbの一部を濃度の高
い現像液にて現像し、最後に濃度の低い現像液にて第1
のポジUVレタス)7b’i現像除去してレジスト8,
7bよりなるパターンを形成する(第3図F)。
Next, using a mask 9 having a pattern, ultraviolet light is selectively applied to areas other than the chrome cap 9a which is a light shielding part. Irradiate the second positive UV resist 8, 7b (Fig. 3 E)
. Then, the second positive UV resist 8a in the ultraviolet irradiation area and a part of the first positive UV resist b below it are developed with a high concentration developer, and finally the first positive UV resist 8a is developed with a developer with a low concentration.
(Positive UV lettuce) 7b'i developed and removed resist 8,
7b is formed (FIG. 3F).

上記実施例において濃度の高い現像液での現像は第2の
ポジUVレジスト8aのみでもよいことはいう丑でもな
い。
Needless to say, in the above embodiment, only the second positive UV resist 8a may be developed with a high-concentration developer.

これら一連の工程を得て、レジスト厚を厚く塗布しなが
らも微細パターンを形成でき、かつ段差部における寸法
変換差を少なくすることができる。
By obtaining a series of these steps, it is possible to form a fine pattern while applying a thick resist, and it is possible to reduce the difference in dimension conversion at the stepped portion.

そこで、更に具体的な例を第3図を用いて説明する。基
板1上に段差パターン2aが1μm形成されている上に
第1のレジスト7例えばAZ1470 (/ッグレイ社
製)を2.4μm厚の膜厚に塗布する(第3図A)。次
に紫外線領域の全波長を有するUV光10を150m 
J / crriの露光エネルギーで照射し、第1のレ
ジスト7aを充分に感光反応を引き起こす(第3図B)
。そこで、90C30分間の熱処理11を施こす(C1
,この時の第1のレジスト7bの感光反応は熱処理11
によシ劣化することはない。次に第2のレジスト8、例
えば第1のレジスト7と同様なAZ1470(シックレ
イ社製)を1.0μm厚の膜厚を塗布し、ソフトベーク
をg、 OCt S分間節こす。この時の膜厚は3.4
μmとなり、第1のレジストアと第2のレジスト8の膜
厚の和となる(第3図D)。
Therefore, a more specific example will be explained using FIG. 3. A first resist 7 such as AZ1470 (manufactured by GGREY Co., Ltd.) is applied to a thickness of 2.4 μm on the step pattern 2a having a thickness of 1 μm formed on the substrate 1 (FIG. 3A). Next, UV light with all wavelengths in the ultraviolet region is applied to 150 m
The first resist 7a is irradiated with an exposure energy of J/crri to sufficiently cause a photosensitive reaction (FIG. 3B).
. Therefore, heat treatment 11 for 30 minutes at 90C is performed (C1
, the photosensitive reaction of the first resist 7b at this time is the heat treatment 11.
It will not deteriorate over time. Next, a second resist 8, for example AZ1470 (manufactured by Sickray Co., Ltd.) similar to the first resist 7, is applied to a thickness of 1.0 .mu.m, and soft baking is performed for 30 minutes. The film thickness at this time is 3.4
.mu.m, which is the sum of the film thicknesses of the first resist 8 and the second resist 8 (FIG. 3D).

次に縮小投影露光法を用いて、レチクル(マスク)9を
介して第1.第2のレジスト7b、8に選択的に露光し
露光部8aを形成する(第3図E尤そして、第1段階の
現像処理として、アルカリ現像液(テトう・メチル・ハ
イドロオキサイドアンモニラ系)であるMF312 (
シップレイ社製)と水との1:1希釈液にて20秒間現
像処理を施こし、連続的に第2段階として、MF312
と水との1:2希釈液によって50秒間現像後、リンス
処理を施こし、第1.第2のレジン)7b、、8bを同
時に現像除去する(第3図F)。以上のように一連の工
程を得て、3.4μm厚で1μmのラーrンアンドスペ
ースの高Pスペクト比のパターン形成が可能であった。
Next, using the reduction projection exposure method, the first . The second resists 7b and 8 are selectively exposed to light to form an exposed area 8a (see FIG. 3E).Then, as a first stage development process, an alkaline developer (tetromethyl hydroxide ammonia type) is used. MF312 (
MF312 was developed in a 1:1 diluted solution (manufactured by Shipley) and water for 20 seconds, followed by continuous development as a second step.
After developing for 50 seconds with a 1:2 dilution of water and water, a rinsing process was performed. 2nd resin) 7b, 8b are simultaneously developed and removed (FIG. 3F). By performing the series of steps as described above, it was possible to form a pattern with a thickness of 3.4 μm and a learn-and-space pattern of 1 μm with a high P spectral ratio.

第4図に本発明であるパターン形成方法のうち現像液濃
度の違いによる感光および未感光レジストに対する現像
レートを示した。これによると、感光レジストでは1:
1液の濃度の高い現像液の現像レートは500八/秒、
1:2液の濃度の低い現像液では125人/秒と約3倍
1べ1液の方が現像レートが犬きく、捷だ、未感光レジ
ストにおいては、1:1液で5へ/秒、1:2液で1・
7A/秒と3倍現像レートが、1:1液の方が大きくな
っている。
FIG. 4 shows the development rate for exposed and unexposed resists depending on the concentration of the developing solution in the pattern forming method of the present invention. According to this, photosensitive resist has 1:
The development rate of one high-concentration developer is 5008/sec,
With the low concentration developer of 1:2 liquid, the development rate is 125 people/second, which is about 3 times higher. , 1:2 liquid for 1.
The 1:1 solution has a higher development rate of 7 A/sec, which is 3 times higher.

このことを更に第5図を用いて、本発明によるパターン
形成方法での現像機構を説明する。第5図は、本発明の
方法による第1.第2のレジストを2層に塗布後、選択
的に露光した時のレジスト仮想断面を示した。第5図a
は全面露光、熱処理を施こした第1のレジスト7b上に
第2のレジスト8を塗布し、選択露光で第2のレジン)
8層部が露光された状態である。前述の1:1液にて2
0秒間施こす。この時、感光部の第2のレジストと直下
の第1のレジストの一部が500人/秒にて垂直方向に
現像される。一方未感光部第2のレジスト8の横方向へ
の現像による入り込みは、現像レートが5人/秒で決定
される(第5図b)。
This will be further explained using FIG. 5 to explain the developing mechanism in the pattern forming method according to the present invention. FIG. 5 shows the first step according to the method of the present invention. A hypothetical cross section of the resist is shown when the second resist is applied in two layers and then selectively exposed. Figure 5a
The second resist 8 is applied on the first resist 7b which has been subjected to full-surface exposure and heat treatment, and the second resist 8 is selectively exposed)
The 8th layer section is in an exposed state. 2 with the above 1:1 solution
Apply for 0 seconds. At this time, the second resist in the photosensitive area and a part of the first resist directly below are developed in the vertical direction at a rate of 500 people/second. On the other hand, the penetration of the unexposed second resist 8 in the lateral direction by development is determined by a development rate of 5 persons/second (FIG. 5b).

この時、例えば第5図Aでのレジストの露光領域部パタ
ーンt1.oμmとした場合、第5図Bにおける第1段
階の1:1液による20秒後の現像後でのパターン幅B
は1.01μmと多少拡がる。ちなみに第1のレジスト
7bまで1:1液にて60秒間最後まで現像すると1.
03μmとなる。しかし実際は、露光領域部のパターン
幅A、Jニジ露光が干渉現像によって入り込むため前述
の現像後のパターン幅は更に助長されて拡がる。次に1
:2液による5層秒間の現像によって第1のレジストア
bを125人/秒の現像レートにて最後まで現像する。
At this time, for example, the exposure area pattern t1 of the resist in FIG. 5A. 0 μm, the pattern width B after 20 seconds of development with the 1:1 solution in the first stage in Figure 5B
is slightly expanded to 1.01 μm. By the way, if you develop the first resist 7b with a 1:1 solution for 60 seconds until the end, 1.
03 μm. However, in reality, since the pattern widths A and J of the exposed area portion are exposed due to interference development, the pattern width after the above-mentioned development is further promoted and expanded. Next 1
: Develop the first resist b to the end at a development rate of 125 people/second by developing 5 layers with two liquids for seconds.

この時、第2の未感光のレジスト部、っまI)N光領域
部のパターン幅Cは1.02μmとなり、初期寸法tか
らの拡がシは、1:1液による1段階の現像よりも狭い
(第5図C)。丑た、第7のレジスト7bへの水平方向
への入り込みも現像レートの違いから1:2液の方が少
なくてすみ、初期寸法aを忠実に再現できるわけである
At this time, the pattern width C of the second unexposed resist area, i) N light area, is 1.02 μm, and the expansion from the initial dimension t is greater than the one-stage development using a 1:1 solution. It is also narrow (Fig. 5C). Furthermore, because of the difference in development rate, the 1:2 liquid requires less intrusion into the seventh resist 7b in the horizontal direction, and the initial dimension a can be faithfully reproduced.

本発明の実砲例(第3図参照)と第4図の結果段差物パ
ターン2上にパターニングしたパターン3(レジン)7
b、8からなる)は、従来法にょると第6図の点線のご
とくなるが、本発明によるパターン形成方法を用いると
第6図の実線のごとく寸法変化が少なくンなった。
Actual gun example of the present invention (see Fig. 3) and the result of Fig. 4 Pattern 3 (resin) 7 patterned on step pattern 2
b, 8) is as shown by the dotted line in FIG. 6 according to the conventional method, but when the pattern forming method according to the present invention is used, the dimensional change is reduced as shown by the solid line in FIG. 6.

実施例において、第1.第2のレジストの膜厚条件は、
下地である基板の凹凸の段差量によって定めるべきであ
る。捷た本発明の性質上、第1゜第2のレジストがあら
かじめ現像速度が違うものを使用してもよい。そしてレ
ジストの種別に関しても、X線、電子ビーム、イオンビ
ーム、紫外線遠紫外線のいずれに関しても本発明を適用
できることは明確である。さらに、第1.第2のレジス
トとして、放射線反応機構は異なるが、同一現像液で現
像可能なものであると好都合である。捷た熱処理温度は
、種々のレジストに対して異なるが現像反応を消失しな
い温度で120C以下が好ましい。
In the example, 1. The film thickness conditions of the second resist are as follows:
It should be determined based on the level difference in the unevenness of the underlying substrate. Due to the nature of the present invention, the first and second resists may have different development speeds. Regarding the type of resist, it is clear that the present invention can be applied to any of X-rays, electron beams, ion beams, and deep ultraviolet rays. Furthermore, the first. It is convenient that the second resist has a different radiation reaction mechanism but can be developed with the same developer. Although the heat treatment temperature for curing differs for various resists, it is preferably 120C or lower at a temperature that does not eliminate the development reaction.

発明の効果 以上のように本発明によるとレジストを厚く塗布するこ
とで、段差部の凹凸を軒滅することができ、かつその上
で段差部におけるパターン幅変動率を減少させ、解像度
、感度の低下がな°い。またレジスト膜厚が厚いため耐
ドライエツチング特性が良好となる。またプラズマ処理
が必要でないためにインラインでパターン形成が可能で
あり、量産性、経済性にも優れた方法である。また寸法
制御性、安定性にも優れ本発明は今後の微細化への半導
体集積回路の製造に重要な価値を発揮するものである。
Effects of the Invention As described above, according to the present invention, by coating the resist thickly, it is possible to eliminate unevenness at the stepped portion, and in addition, it is possible to reduce the pattern width variation rate at the stepped portion, resulting in a decrease in resolution and sensitivity. I don't know. Furthermore, since the resist film is thick, dry etching resistance is improved. In addition, since no plasma treatment is required, pattern formation can be performed in-line, making it an excellent method for mass production and economy. Furthermore, the present invention has excellent dimensional controllability and stability, and will exhibit important value in the production of semiconductor integrated circuits for future miniaturization.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図Aは従来の単層レジスト法による段差物ヘパター
ニングした断面図、同図Bは同Aの平面図、第2図A−
Eは従来の三層構造レジスト法の工程断面図、第3図A
〜Fは本発明の一実施例にかかるパターン形成方法の工
程図1、第4図は各現像液による現像レート図、第6図
A−Cは本発明によるレジスト仮想断面図、第6図は本
発明にて形成したパターン平面図である。 1・・・・・・基板、2・・・・・・段差物、7・・・
・・・ポジレジスト、7a・・・・・・感光したポジレ
ジスト、7b・・・・・・熱処理した感光ポジレジスト
、8・・・・・・ポジレジスト、9・・・・・マスク。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名菓 第1図 2 図 ?ユ 第2図 2α ?ユ ?a 第3図 第3図 第4図 び、傷TI?j間(分)□ 第5図 第6図 ?皮
Fig. 1A is a cross-sectional view of step patterning using the conventional single-layer resist method, Fig. 1B is a plan view of Fig. 2A, and Fig. 2A-
E is a process cross-sectional view of the conventional three-layer resist method, Figure 3 A
1 to F are process diagrams of a pattern forming method according to an embodiment of the present invention, FIG. 4 is a development rate diagram using each developer, FIGS. FIG. 2 is a plan view of a pattern formed according to the present invention. 1...Substrate, 2...Step, 7...
... Positive resist, 7a... Photosensitive positive resist, 7b... Heat-treated photosensitive positive resist, 8... Positive resist, 9... Mask. Name of agent: Patent attorney Toshio Nakao and one other famous confectioner Figure 1 Figure 2? 2nd figure 2α? Yu? a Figure 3, Figure 3, Figure 4, Injury TI? j time (minutes) □ Figure 5 Figure 6? leather

Claims (1)

【特許請求の範囲】 (リ 選択的に感光された感光性樹脂膜をa度の異なる
2種類以上の現像液を用いて連続的に現像する事を特徴
とするパターン形成方法。 (2)異なる現像速度を有する多層構造の放射線感応性
樹脂膜を濃度の異なる2種類以上の現像液を用いて現像
する事を特徴とするパターン形成方法。 (3)濃度の高い現像液で現像した後、より濃度の低い
現像液で歩、像する事を特徴とする特許請求の範囲第2
項に記載のパターン形成方法。
[Claims] (2) A pattern forming method characterized by sequentially developing a selectively exposed photosensitive resin film using two or more types of developing solutions with different degrees of a. A pattern forming method characterized by developing a radiation-sensitive resin film with a multilayer structure with a high development speed using two or more types of developers with different concentrations. (3) After developing with a developer with a high concentration, Claim 2, characterized in that the image is developed using a low-concentration developer.
The pattern forming method described in section.
JP3111783A 1983-02-25 1983-02-25 Forming method of pattern Pending JPS59155926A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3111783A JPS59155926A (en) 1983-02-25 1983-02-25 Forming method of pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3111783A JPS59155926A (en) 1983-02-25 1983-02-25 Forming method of pattern

Publications (1)

Publication Number Publication Date
JPS59155926A true JPS59155926A (en) 1984-09-05

Family

ID=12322457

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3111783A Pending JPS59155926A (en) 1983-02-25 1983-02-25 Forming method of pattern

Country Status (1)

Country Link
JP (1) JPS59155926A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH055914U (en) * 1991-07-08 1993-01-29 利春 高橋 One-touch installation type ventilation port
JP2001249214A (en) * 2000-03-06 2001-09-14 Dainippon Printing Co Ltd Method of manufacturing color filter and developing device used for the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH055914U (en) * 1991-07-08 1993-01-29 利春 高橋 One-touch installation type ventilation port
JP2530132Y2 (en) * 1991-07-08 1997-03-26 利春 高橋 One-touch mounting vent
JP2001249214A (en) * 2000-03-06 2001-09-14 Dainippon Printing Co Ltd Method of manufacturing color filter and developing device used for the same

Similar Documents

Publication Publication Date Title
US5652084A (en) Method for reduced pitch lithography
US5716758A (en) Process for forming fine pattern for semiconductor device utilizing multiple interlaced exposure masks
JPH076058B2 (en) Metal lift-off method
US6218082B1 (en) Method for patterning a photoresist
TW202240282A (en) Patterning process
JPH0210362A (en) Fine pattern forming method
JPS59155926A (en) Forming method of pattern
JPH035653B2 (en)
JP2560773B2 (en) Pattern formation method
JPH02140914A (en) Manufacture of semiconductor device
JPH03765B2 (en)
JPS59155927A (en) Forming method of pattern
JPH02238457A (en) Formation of thick-film resist pattern
JP3421268B2 (en) Pattern formation method
JPH0566568A (en) Manufacture of multiple contrast register pattern and multi-layered resist
JPH035654B2 (en)
JPS59155930A (en) Forming method of minute pattern
JPH05144718A (en) Light shielding resist and multilayer resist for fabricating semiconductor device
JPS5951527A (en) Pattern formation
JPS58132926A (en) Formation of pattern
JPS58153932A (en) Photographic etching method
JP2666420B2 (en) Method for manufacturing semiconductor device
JPH0425695B2 (en)
JPS59152628A (en) Manufacture of semiconductor device
JPH08293454A (en) Formation method for resist pattern