JPS59149747U - wireless telephone equipment - Google Patents
wireless telephone equipmentInfo
- Publication number
- JPS59149747U JPS59149747U JP1983043358U JP4335883U JPS59149747U JP S59149747 U JPS59149747 U JP S59149747U JP 1983043358 U JP1983043358 U JP 1983043358U JP 4335883 U JP4335883 U JP 4335883U JP S59149747 U JPS59149747 U JP S59149747U
- Authority
- JP
- Japan
- Prior art keywords
- wireless telephone
- output
- circuit
- telephone equipment
- reproduced
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Mobile Radio Communication Systems (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Transceivers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の無線電話装置のブロック図、第２図は第
１図の各部における波形を示すタイミングチャート、第
３図は本考案の一実施例のブロック図、第４図は第３図
の各部における波形を示すタイミングチャートである。
１：受信機、２：データ復調回路、３：クロソク再
、主回路、４：ゲート回路。FIG. 1 is a block diagram of a conventional wireless telephone device, FIG. 2 is a timing chart showing waveforms in each part of FIG. 1, FIG. 3 is a block diagram of an embodiment of the present invention, and FIG. FIG. 1: Receiver, 2: Data demodulation circuit, 3: Cloth resonator
, main circuit, 4: gate circuit.
Claims (1)
復調回路と、前記復調回路の出力を送信機のプレス信号
で開閉するゲート回路と、該ゲート回路の出力の変化点
を検出して再生クロックの出力位相を制御する位相同期
ループ回路とからなることを特徴とするデータ通信可能
な無線電話装置。A radio receiver, a demodulation circuit that demodulates a reproduced FSK signal of the radio receiver, a gate circuit that opens and closes the output of the demodulation circuit using a press signal from a transmitter, and a point of change in the output of the gate circuit that is detected and reproduced. 1. A wireless telephone device capable of data communication, comprising a phase-locked loop circuit that controls the output phase of a clock.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983043358U JPS59149747U (en) | 1983-03-28 | 1983-03-28 | wireless telephone equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983043358U JPS59149747U (en) | 1983-03-28 | 1983-03-28 | wireless telephone equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59149747U true JPS59149747U (en) | 1984-10-06 |
| JPH0314854Y2 JPH0314854Y2 (en) | 1991-04-02 |
Family
ID=30173891
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1983043358U Granted JPS59149747U (en) | 1983-03-28 | 1983-03-28 | wireless telephone equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59149747U (en) |
-
1983
- 1983-03-28 JP JP1983043358U patent/JPS59149747U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0314854Y2 (en) | 1991-04-02 |
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