JPS59147246U - small electronic equipment - Google Patents
small electronic equipmentInfo
- Publication number
- JPS59147246U JPS59147246U JP3831183U JP3831183U JPS59147246U JP S59147246 U JPS59147246 U JP S59147246U JP 3831183 U JP3831183 U JP 3831183U JP 3831183 U JP3831183 U JP 3831183U JP S59147246 U JPS59147246 U JP S59147246U
- Authority
- JP
- Japan
- Prior art keywords
- small electronic
- rom
- electronic equipment
- data
- electronic device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Executing Machine-Instructions (AREA)
- Microcomputers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はこの考案の一実施例を示す要部のブロック回路
図、第2図はHALT回路3の詳細回路図、第3図は動
作を説明するフローチャートである。
1・・・・・・ROM、2・・・・・・インストラクシ
ョンデコーダ、3・・・・・・HALT回路、11・・
・・・・ラッチ、121〜12.・・・・・・アンドゲ
ート、13〜16・・・・・・カウンタ、17・・・・
・・オアゲート、18.19・・・・・・ワンショット
回路。FIG. 1 is a block circuit diagram of essential parts showing an embodiment of this invention, FIG. 2 is a detailed circuit diagram of the HALT circuit 3, and FIG. 3 is a flowchart explaining the operation. 1...ROM, 2...Instruction decoder, 3...HALT circuit, 11...
...Latch, 121-12. ...And gate, 13-16...Counter, 17...
...OR gate, 18.19...One-shot circuit.
Claims (1)
小型電子機器において、周期の異なる複数種類の信号を
出力する時間カウンタと、前記ROMから出力されたデ
ータをラッチするラッチ手段と、このラッチ手段にラッ
チされたデータに応じて前記時間カウンタから出力され
る信号を選択して出力する時間選択手段と、この時間選
択手段から出力される前記信号に応じて前記ROMのア
ドレスを更新するROMアドレス手段とを具備してなる
小型電子機器。A small electronic device controlled by an R6M storing a microprogram includes a time counter that outputs a plurality of types of signals with different periods, a latch means that latches data output from the ROM, and a data latched by the latch means. A time selection means for selecting and outputting a signal output from the time counter according to data, and a ROM address means for updating an address of the ROM according to the signal output from the time selection means. A small electronic device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3831183U JPS59147246U (en) | 1983-03-18 | 1983-03-18 | small electronic equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3831183U JPS59147246U (en) | 1983-03-18 | 1983-03-18 | small electronic equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59147246U true JPS59147246U (en) | 1984-10-02 |
Family
ID=30168983
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3831183U Pending JPS59147246U (en) | 1983-03-18 | 1983-03-18 | small electronic equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59147246U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51147142A (en) * | 1975-06-13 | 1976-12-17 | Hitachi Ltd | Control system of machine cycle of micro instruction |
JPS56164422A (en) * | 1980-05-21 | 1981-12-17 | Fujitsu Ten Ltd | Timer controlling system |
-
1983
- 1983-03-18 JP JP3831183U patent/JPS59147246U/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51147142A (en) * | 1975-06-13 | 1976-12-17 | Hitachi Ltd | Control system of machine cycle of micro instruction |
JPS56164422A (en) * | 1980-05-21 | 1981-12-17 | Fujitsu Ten Ltd | Timer controlling system |
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