JPS59143471A - Printer provided with tone wedge printing function - Google Patents

Abstract

PURPOSE:To print out tone wedge without using a tone wedge pattern by selecting output signals of slices of a switching means which are outputted by exciting pulses from a pulse motor and repeating the formation of printing signals for one dot line while sampling the output signals. CONSTITUTION:A video signal Hi is amplified by an amplifier 1 and supplied to slicers 2, 3 to be compared with L and H level voltages set up in variable resistors 2a, 3a respectively. When the amplified voltage is higher than the reference voltage, L level signals HiL, Hih are outputted. The signals HiL, Hih are applied to a multiplexer 4 and successively selected by selecting signals S0, S1 from gates inputting exciting current from the pulse motor PM and said operation is repeated. The output signals of the slicers 2, 3 are sampled and the sampled result is processed by buffers 14, 15, a control part 16 and a multiplexer 17 as a printing signal for one dot line and the processed result is supplied to a shift register 18 to perform tone wedge printing by a head 20.

Description

[Detailed Description of the Invention] This invention has a simple configuration and 1@ style printing? Regarding printers with gradation printing function that can be performed〇Generally, when performing R-tone printing in multi-color printing, the input signal is sliced by a number of slicers and sampled at a fixed period, and the best of the slicers that output The gradation pattern corresponding to the upper level slicer (hereinafter referred to as the top output slicer) is read from the internal storage device, and this gradation pattern? A gray scale signal is formed by sequentially storing the data in a register. And this tone signal? Supplies it to the print head and prints it.

For example, the input signal Vi shown in FIG.
1 to S4 and sampled at regular intervals (at this time, the slice levels of slicers S1 to S4 are LaNLb, LbNLc, Lc to Ld, and Ld to Le, respectively). Then, the gradation pattern P a''P e (FIG. 2) corresponding to the highest output slicer in each sampling is read from the gradation pattern table stored in advance in the internal storage device and sequentially stored in the register. That is, Since there is no slicer with output at time t1 in FIG. 1, the gradation pattern Pa in FIG.
At Vl-, the slicer S is the highest output slicer, so the Pa tone pattern Pb in FIG.
[In case Slicer S2 becomes the highest output slicer, the fa tone pattern PC in Fig. 2 (C) is...
. . , the gradation patterns Pa-Pe are sequentially read out, and these are sequentially stored in the register. In this way, a signal corresponding to the gradation signal shown by the symbol vs in FIG. 1 is formed in the register, which is supplied to the print head via the print head driver and printed by the print head. In the above case, each gradation pattern consists of 2 x 2 q dots, so for 7942 input signals Vi,
A dot line is printed.

By the way, in the conventional gradation printing apparatus mentioned above,
The gradation patterns Pa to Pe must be read out from the VC gradation pattern table for each sampling, which complicates control and increases processing time. 'fr, -5 Is there a gradation pattern table in the internal memory in advance? It had to be filled with roses, which was a tedious process.

In view of the above circumstances, this invention is a gradation pattern table? Since this book provides a printer with a simple gradation printing function that does not require a gradation printing function, the output signal of the slicer is controlled by a switching means (for example, a multiplexer) that is switched based on the excitation pulse of the pulse motor for paper feeding. The operation of sequentially selecting one option, sampling the output signal of this one choice, and forming a print signal for 1 dot line? Repeatedly send a print signal to each slicer one dot line at a time? The method is characterized in that gradation printing is performed by forming a gradation pattern.

Is the drawing below? The present invention will be explained in detail with reference to Fig. 3. 1 is a block diagram showing a video signal H1 (izr, 2...
...Is n the number of the horizontal scanning line? show)? Amplify signal H
This is an amplifier that outputs 3'. 2.3 is a slicer, and as shown in FIG. 4, the slicer 2 outputs a low level signal H1tk which becomes an 11" signal when the signal H1' is at a low level and the pressure Vr is high. 3 is signal H
When 1' is higher than the high level voltage vH, a high level signal Hi&, which is a 1L'' signal, is output.These eg'll voltages Vz, , VH&-1 are each set by the variable resistors 2a and 5aVc. Next, 4 is a multiplexer, each input terminal of the multiplexer is supplied with the output signals Hi/, HiJ of the slicer 2.8, and the first select terminal of the multiplexer t is supplied with an OR gate 5. The select signal S from the OR gate 6 is supplied to the second select terminal.The multiplexer 4 receives the select signal S from the OR gate 6.
. is 1 ■ 'notosa Klrma low level signal) (iz
r, the select signal 81 is output, and the high level signal H1JLk is output to the input terminal of the OR gate 5. The excitation pulse A of the Y-phase excitation type pulse motor PM is input to the input terminal of the NTC and OR gate 5.
, B, and an AND gate 8 which outputs an AND signal A-B2 of the inverted excitation pulses -A and H. - 10,000, OR gate 60 input terminal outputs AND signal A of excitation pulse A and inverted excitation pulse B, Bi output The output signal of the AND gate 10 is supplied.
11 is excitation pulse A, B, and reverse excitation pulse A.

This is a driver that drives the pulse motor PMi based on B. Next, 12.18 is an AND gate, and the AND gate 12 selects when the select signal So is 11'', that is, when the output of the multiplexer Φ is a low level signal H1l, and supplies this to the input terminal of the buffer 14. , anime) 1
8 is a select signal S.

is 1 l", that is, the output of the multiplexer 4 is a high level signal Hi&, which is supplied to the input @Vc of the buffer 15. Next, 16 is a control section,
Clock pulses φ1 and φ2 to buffers 14 and 15? At the same time, the multiplexer (17VC select signal S2 is supplied. Here, the clock pulse φ is a low level signal %Hrtk sampled and taken into the buffer 141, and the clock pulse φ2 is a high level signal HiJ
The data is sampled at t and taken into the buffer 15. 'f multiplexer 17 transfers the signal H1t-HiLt shift register 18 stored in buffer 14.15.
These signals Hi/, H1JLa
) - million clock pulse φ, shift register 1
8Vc is transferred. In this way, the ``low level'' signal HeLr or low level (+H signal HLlq) stored in the shift register 8 is supplied to the head 20 via the driver 19? For the video signal 1 (1<1), a high level signal HiJ is printed on one dot line, and then a low level signal H1l is printed on one dot line, and these dot lines are closely adjacent to each other, resulting in gradation printing. It will be done.

Next, the operation of this embodiment will be explained. Time t in Figure T and Figure A. When a print start button (not shown) is pressed, the input end of the amplifier 1 is supplied with the video signal Hi for each horizontal scanning line twice, starting from the video signal H1 for the @1 horizontal scanning line. That is, H,-+H, →H2→H2-+
-=-・→Hn→H0 and Naichimu R11fl ) + H
i-+Hi++ To'll: o +'ll' H
(TH is the time for one horizontal scanning line). Note that these video signals H1 are video signals to the display device w? This is obtained by stealing the information, and since the technique is well known, the explanation will be omitted. On the other hand, the pulse motor PM has an excitation pulse A with a period <<To and a time T from this pulse A. An excitation pulse B whose phase is delayed by a period of time T is supplied. It is designed to advance by l steps each time.

With these settings, when the print start button is pressed at time to, amplifier 1. The slicer 2 outputs a low level signal H+7, and the slicer 3 outputs high level signals H and J. The excitation pulse A shown in FIG.
4B S1 (select shown in the same figure)
becomes 11#. In response to this, the multiplexer selects the high level signal H1J of the video signal H1,
this? Ant game) 12. 13 is supplied to 0 here Ant game) 13vc is 1 l# Since the flaw signal SI is supplied, the high level signal H1JL is supplied to the buffer 15 [, and sampled by the clock pulse φ2 supplied from the control section 16. (FIG. 1) This capture time is the time TH for one horizontal scanning line.Next, at time t+ (=io +To)VC, the amplifier IVC outputs the second video signal. H1 is supplied, and low level signals Hr! are supplied from the slicers 2 and 8, respectively. , the excitation pulse B rises and becomes the select signal S.

becomes ゝゝ 1''.0 This makes the multiplexer t
is switched, the low level signal H11 is selected as an alternative, and is supplied to the analog game 12.11.

Here, since 8 degrees of the 11" signal is supplied to the AND gate 12, the low level signal H11 is supplied to the buffer 14, sampled by the clock pulse φ1 supplied from the control section 16, and taken into the buffer 14 (
Same figure (su)). Meanwhile, during this time, the control af%i6 controls the multiplexer 17 and connects the output end of the buffer 15 and the input end of the shift register 180. Then, the clock pulse φ3 is supplied to the shift register 18, and the high level signal n, zt which was taken into the banff 715 earlier is transferred to the shift register 18Vc, and after the transfer is completed, the high level signal HrJ is supplied to the head 20Vc via the driver 19. 0, and the head 20 prints this on the L dot line (see Figure 3).

Next, at time '2 (=t O+2'ro), the video signal H2 is supplied to the amplifier II@al, and the low level signal Htt and high level signal) (2J) are output from the slicer 2°3, respectively. Below, inverted excitation pulse
rises, A-B=111 l', and the select signal S
1 becomes 11" 60 This causes the high level signal H2J
L is taken into the buffer 15 in the same manner as described above ((g) in the same figure). Meanwhile, the low level signal H1l, which has been loaded into the buffer 14 during this period, is transferred to the shift register 18 in the same manner as described above, and is supplied to the head 20 via the driver 19, where it is printed on the l dot line (as shown in the figure). )).

In this way, the video signal H8 for -horizontal scanning line is printed as a two-dot line.

Thereafter, the select signal S is generated in the same manner. At the height of the 11'' signal, the low level signal HIt is taken into the buffer 14, and the high level signal Hiz is transferred from the buffer 15 to the shift register 18 via the multiplexer 17. The select signal S is supplied to the head 20 through the 11 signal and is output as a no-i level I; H) i is transferred from the buffer 14+ to the shift register 18 via the multiplexer 19, and output to the head 20Vc via the driver 19. In this case, the select signal S.

two dot lines, i.e., 1 level signal 1-
Dot line and low level signal f-1 corresponding to 1iJ
The dot line corresponding to i is printed, and the gradation printing is blurred.

As explained above, in this invention, the output signal for the slicer is sequentially selected by the switching means which is switched based on the excitation pulse of the paper feed motor/crudleless motor. 11. Return to mJ by sampling and forming a print signal of 1 dot line, and form a print signal of 1 dot line for each slicer, thereby printing 1 dot line. This eliminates the need for a gradation pattern table, and also eliminates the need for subtracting the gradation pattern table. O

[Brief explanation of the drawing]

Fig. 1 is a waveform diagram showing the relationship between the human input signal and the slice level, Fig. 2 is a diagram showing an example of a gradation pattern, Fig. 3 is a block diagram showing the configuration of one embodiment of the present invention Q], and Fig. ψ 1 is a diagram for explaining the high level signal HiJt and low level signal Hil in the same embodiment, and FIG. S is a diagram for explaining the operation of the same embodiment. 02.3... Slicer, hand... Multiplexer (switching means), 14.1
5...Buffer (storage means), 16...
・Control unit, 20-...Head (marker output Jj7),
PM...Pulse motor, A, B...Excitation/Grus. Out II! 11 Shinko 'FM Machine Co., Ltd. Figure 1 Figure 2 Figure 4

Claims (1)

[Claims] Pulse motor for paper feeding! ! Input signal in printer with i-? A plurality of slicers slicing at different levels and the pulsed motor excitation (m2): the output of the slicer is synchronous with the pulse motor excitation (m2). a switching means for sequentially selecting one of the alternatives; a control unit for sampling the selection of the alternative with the output of the slicer and storing the result of the previous sampling in the storage means as a print signal for the dot line; A printer with a gradation printing function, characterized in that it comprises printing means for printing the printing signal.