JPS59139672A - Solid-state image pickup element - Google Patents

Abstract

PURPOSE:To obtain a two-storied image pickup element which can be formed at the minimum processes of manufacture by a method wherein an insulating oxide film is formed on the upper part of a scanning IC substrate, the oxide film on the specific junction region of an MOS transistor is removed, and a two-dimensional electrode pattern to be used for formation of a picture element conductive to the junction part is formed on the upper part of the junction region. CONSTITUTION:After a gate, a source junction and a drain junction have been formed, an oxide film 18 to be used for insulation is formed. Subsequently, the oxide film 18 located on the desired source or drain is removed by performing a photo etching, and a metal film is vapor-deposited. A scanning IC substrate 21, whereon a scanning circuit on a semiconductor substrate and a switch 20 for positional selection are integrated, is formed. An electrode 24 with which the unit measurements of photoelectric conversion, a picture element in other words, will be determined is formed. This electrode is the second layer for the wiring 19, the ohmic contact with the junction of an MOS switch can be maintained through a contact hole 19, and the above is electrically isolated from the first layer wiring 19 by an insulating film 22.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to an integrated image sensor in which a scanning circuit and a photoelectric conversion film are integrated on a semiconductor substrate 1-.

[Background of the invention] One CC (C
Two types have been considered: the MOS type (Harge Coupled Devjces) and the MOS type (an element in which the source junction of a MOS switch is used as a photodiode).

There is. However, since the photosensitive part is located below the electrode (in the case of CCI) or on the same plane as the scanning switch and signal output line (in the case of MOS type), there are areas where the incidence of light is blocked by the electrode and switch part. The disadvantage is that there is a large amount of light loss, that is, there is a large optical loss. Furthermore, as the photosensitive section and the scanning section are on the same plane as mentioned above, the area occupied by the picture elements is large, which means that the density of the picture elements cannot be increased, and the resolution can only be increased. There are problems.

In order to solve these problems (photosensitivity: 9M image resolution), the inventors filed an application for a solid-state image sensor with a two-story structure in which a photoelectric conversion film for exposure is provided above the scanning section (Japanese Patent Application No.
6372. (Patent application filed July 5, 1972). Taking as an example the case where this second-order solid-state image pickup device is constructed of an MO8 type device, the device structure is schematically shown in FIG. 1 is a semiconductor substrate of the first conductivity type; 2 is an MO3 field effect transistor that constitutes a scanning circuit (not shown) or a switch that is opened and closed by the output of the scanning circuit;
It consists of 5 parts. 6 is a photoelectric conversion film serving as a photosensitive material, and 7
is a transparent electrode for applying voltage to drive the photoelectric conversion film.

As can be seen from this figure, the semiconductor substrate 1, the scanning C substrate on which the scanning circuit and the switch 2 are integrated, and the photoelectric conversion section consisting of 6 and 7 have a two-story structure. Therefore, the area utilization rate is high and the dimension 9 per picture element is small.

In other words, the resolution is high. Since the photoelectric conversion part is located at the second part with respect to the incident light IO, there is no light loss and the light sensitivity is high. Furthermore, it is possible to obtain a desired spectral sensitivity by selecting a photoelectric conversion film, and can expect extremely superior performance compared to conventional solid-state imaging devices.

On the other hand, the disadvantage of this second-order device is that compared to conventional solid-state image pickup devices, there are more steps to fabricate the photoelectric conversion film in the scanning region, resulting in a lower production yield. According to the results of device fabrication by the inventors, it has been found that the yield of the present device is reduced to ⅓ or less of that of conventional devices, which may pose a major problem in realizing the present device.

[Object of the Invention] An object of the present invention is to improve the above-mentioned problems, that is, to obtain a second-order imaging device in which the device can be formed with the minimum number of manufacturing steps necessary.

[Summary of the Invention] In order to achieve the above object, the present invention forms an insulating oxide film on the top of a scanning IC substrate manufactured by ordinary RC manufacturing technology, and forms an oxide film in a predetermined junction region-1 of an MO8h transistor]. is removed, and a two-dimensional electrode pattern for forming picture elements, which is electrically connected to the joint portion, is torn into two pieces.

[Examples of the Invention] The present invention will be described in detail below with reference to Examples. Second
The figure shows the production of a second-order image sensor according to the present invention (a) First, silicon oxide IPK (S:r,
02), then a silicon nitride film (S j3N4 ) is formed on the top of the SiO2 film (P-type impurity concentration is, for example, 10/C/). 6 Photoetching is performed to form a silicon nitride film (S j3N4 ) on the top of the SiO2 film in areas corresponding to the source, gate, and drain regions. The nitride film in the region 12 is left, and the nitride film in other regions and the oxide film thereunder are removed. Subsequently, when oxidation is performed, a silicon oxide film J3 (usually about 1 μm thick) grows in the region where the nitride film has been removed.

Thereafter, the remaining nitride film and the oxide film thereunder are removed by etching. This oxide film formation method is r-, o
cos method (Local Oxj, dat, ion
This is a technology well known as 5ilicon).

(b) Next, a silicon oxide film (0.05 to 0.1 μm) to be used as a gate oxide film is formed, and then polycrystalline silicon (0.2 to 0.5 μm) for the gate electrode is formed on it.
) to form. Using a photo-etching technique, the polycrystalline silicon in the other regions and the chemotactic film thereunder are removed, leaving the Goo 1 to electrode regions. In this way, the gate electrode 1
4. A goo 1-oxide film 15 is formed. Furthermore, impurities of the second conductivity type (for example, phosphorus CP atoms, arsenic (ΔS) atoms, etc.) are thermally diffused into the substrate 11 using this goo 1 electrode region as a mask, thereby forming a source 16 and a train 17. do. In this diffusion step, impurities of the second conductivity type are diffused into the goo 1 to the polycrystalline silicon 14 for the electrode, and the conductivity of the polycrystalline silicon is increased to the extent that there is no problem in operation.

(c) After formation of Ga1-, source junction, and drain junction,
The insulating oxide film 18 (generally made by the P atom-containing SjO, film is CV I) method, etc. is 0.3 to 0.6
About μrn is formed. Subsequently, the oxide film 18 on the desired source or train is removed by photoetching to form a so-called contact hole.
A .mu.m metal film (usually A2) is deposited. By photo-etching, unnecessary portions of A[u are removed, leaving the desired A2 pattern 19 (this AC pattern is used as wiring for voltage application for signal extraction). From (a) to (
Through the steps up to C), the second scanning circuit (
A scanning TC board 21 is manufactured in which a scanning TC board 21 (not shown) and a position selection switch 20 are integrated. This production process ((
Steps a) to (C)) are the same as the conventional TC manufacturing method, and the device of the present invention is further manufactured by the following uniculm steps (d) to (g).

(d) Δ2 for scanning TC in the steps up to (c)
After the formation of the wiring (this wiring is the first layer) is completed, the next layer is insulation and insulation, which serves as a protective film to prevent contamination by impurities in the photoelectric conversion film formed in the second part. membrane 2
2 (0.5 to 1.0 μm). This insulating film may be a commonly used S'02 film, or a silicon nitride film (S i3
N4) may be used. Alternatively, S i 02 and S i
A two-layer stacked structure of 3N4 may also be used.

(e) In Figure (c) of the switch 20, contacts 1 and holes 23 are formed on the bonding region where no contacts 1 to holes were provided. This contact 1~hole is made by first removing the insulating film 22 in a desired area by photo-etching, and then removing the remaining insulating film 2.
2 as an etching mask, the insulating film 18 is removed.

(f) Next, apply a second layer of metal film by 0.3 to 1.0 μr.
Deposit about n. This metal film is not only general A but also Cr, M
Any heat-resistant and corrosion-resistant material such as O, W, etc. can be used. By photoetching this metal film to leave only a desired area, an electrode 24 that determines the unit size of photoelectric conversion, that is, a picture element, is formed. This electrode is (c)
This is the 2nd WI for the wiring 19 formed in the figure, and the MOS
Ohmic contact is established through the contact 1 to the hole 23 to connect the switch, and the switch is electrically isolated from the first layer wiring 19 by an insulating film 22. For convenience of explanation, a plan view of the picture element electrode is shown in FIG. Reference numeral 24' denotes an electrode pattern that determines picture elements, and is arranged in a two-dimensional manner. The shape of each electrode pattern may be a rectangle according to the aspect ratio of the television screen, or may be in the normal direction (not shown). Here, the spacing d between each electrode is currently determined by the precision of the etching technology and is 4 to 5 μm. If the precision improves in the future, it will be determined by the minimum dimension to prevent interaction between the detection elements, and the distance d will be determined by the precision of the etching technology. 0.5 to 2.0 depending on the material used as the membrane
It is μm.

(g) After forming the electric contact for the picture element, apply the photoelectric conversion film 25 to 1 to 5 μI.
TI evaporation or sputtering. As photoelectric conversion films, 5e-As-Te and C, which are often used in imaging electron tubes, are used.
There are d-5e, PbO, amorphous Si, etc., and the film thickness mentioned above is determined by these materials and the capacitance required for the picture element.

Here, since the lateral resistance of the photoelectric conversion film is 1 minute larger, there is no need to separate each picture element, and the transparent electrode 26 (for example, Sn○21
TnOz, etc.) is vapor-deposited or sputtered to complete the fabrication of this device.

[Effects of the Invention] As described above in detail using Examples, the second-layer external solid-state image sensor of the present invention is manufactured by forming an insulating film on a scanning IC substrate manufactured by a normal manufacturing process.

Drilling holes in this insulating film and forming pixel electrode patterns.

It is manufactured by forming a photoelectric conversion film and transparent electrode and by minimizing the number of steps. Therefore, the structure and manufacturing method of a second-order solid-state imaging device that can be expected to have high performance is extremely simple, and has a great practical effect of improving yield and reliability.

In the above embodiment, MO8 field effect transistors were used as elements constituting the scanning IC substrate, but C
Cl) (Charge Coupledμevice
) element, the device can be manufactured by the same process steps as in Example 2. ). Furthermore, a junction field effect transistor or a bipolar transistor can be used as the component without departing from the spirit of the invention.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the outline of the structure of the second-order solid-state image sensor, FIG. 2 is a diagram showing the manufacturing process of the second-order solid-state image sensor according to the present invention, and FIG. 3 is a diagram of the second-order solid-state image sensor according to the present invention. FIG. 2 is a diagram illustrating a planar layerer 1 pattern of electrodes constituting an element. 11: Semiconductor substrate 14 Nige-1 ~ Electron (4: 15: Goo 1 ~ Insulating film No. 1 Figure 2 Figure 1? ==)7

Claims (1)

[Claims] 1. In a two-story solid-state imaging device in which a photoelectric conversion film is placed on the top of a scanning integrated circuit board that is equipped with a plurality of scanning circuits and a group of two-dimensionally arranged field effect switches that are opened and closed by the circuits, An electrically insulating oxide film is formed on the scanning integrated circuit board, and the insulating oxide film corresponding to the upper part of the desired portion of the junction diffusion layer region forming the field effect switch is removed by photoetching, and then Then, a metal vapor deposition film pattern for retrieval formation that is in ohmic contact with the junction wave tF1 layer is formed in a two-dimensional shape with the same arrangement spacing as the switch group using photoetching technology, and a photoelectric conversion function is provided on the top of the metal pattern. What is claimed is: 1. A solid-state imaging device comprising a leading conductive thin film and a transparent conductive thin film for applying a voltage to drive the conductive thin film.