JPS59138012U - Audio signal mute circuit - Google Patents

Audio signal mute circuit

Info

Publication number
JPS59138012U
JPS59138012U JP3339383U JP3339383U JPS59138012U JP S59138012 U JPS59138012 U JP S59138012U JP 3339383 U JP3339383 U JP 3339383U JP 3339383 U JP3339383 U JP 3339383U JP S59138012 U JPS59138012 U JP S59138012U
Authority
JP
Japan
Prior art keywords
output
signal
mute
circuit
audio signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3339383U
Other languages
Japanese (ja)
Other versions
JPH0320934Y2 (en
Inventor
豊 越智
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP3339383U priority Critical patent/JPS59138012U/en
Publication of JPS59138012U publication Critical patent/JPS59138012U/en
Application granted granted Critical
Publication of JPH0320934Y2 publication Critical patent/JPH0320934Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の音声信号ミュート回路の構成図、第2図
、第3図は第1図中のa点、b点の直流電位のタイムチ
ャートである。第4図は本考案回路−の1実施例の回路
構成図、第5図、第6図は第4図中のa点及びb点の直
流電位のタイムチャートである。 主な図番の説明、2・・・信号変換手段、3・・・プリ
アンプ、5・・・調整手段、7・・・ラインアンプ、8
・・・ミュート信号発生源、9・・・スイッチング回路
、10・・・再生モード信号発生手段、14・・・付与
回路。
FIG. 1 is a block diagram of a conventional audio signal mute circuit, and FIGS. 2 and 3 are time charts of DC potentials at points a and b in FIG. 1. FIG. 4 is a circuit configuration diagram of one embodiment of the circuit of the present invention, and FIGS. 5 and 6 are time charts of the DC potentials at points a and b in FIG. 4. Explanation of main drawing numbers, 2...Signal conversion means, 3...Preamplifier, 5...Adjustment means, 7...Line amplifier, 8
. . . Mute signal generation source, 9 . . . Switching circuit, 10 . . . Reproduction mode signal generation means, 14 .

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 記録媒体上の音声トラ、ツクより音声信号を抽出する信
号変換手段と、該信号変換手段出力を入力するプリアン
プと、該プリアンプ出力を受は該プリアンプ出力レベル
を調整する手段と、該調整手段出力を受けるラインアン
プと、ミュート信号発生源と、該ミュート信号発生源か
らのミュート信号を受は前記調整手段出力を前記ライン
アンプの前段で交流的に接地するスイッチング回路とを
備えてなる音声信号ミュート回路において、再生モード
時に再生モード信号を発生する手段と、該発生手段出力
を前記調整手段出力の前記スイッチング回路が接続され
る点に付与する回路とを備え、該接続点の直流電位が前
記スイッチング回路の動作モードの転換時に急変しない
ように構成していることを特徴とする音声信号ミュート
回路。“
A signal converting means for extracting an audio signal from an audio track or track on a recording medium, a preamplifier inputting the output of the signal converting means, a means for receiving the preamplifier output and adjusting the preamplifier output level, and an output of the adjusting means. an audio signal mute comprising: a line amplifier that receives a mute signal, a mute signal generation source, and a switching circuit that receives the mute signal from the mute signal generation source and connects the output of the adjustment means to alternating current ground at a stage before the line amplifier. The circuit includes means for generating a reproduction mode signal in a reproduction mode, and a circuit for applying the output of the generating means to a point of the output of the adjusting means to which the switching circuit is connected, and the DC potential of the connection point is set to the switching circuit. An audio signal mute circuit characterized in that it is configured so as not to suddenly change when the operating mode of the circuit changes. “
JP3339383U 1983-03-07 1983-03-07 Audio signal mute circuit Granted JPS59138012U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3339383U JPS59138012U (en) 1983-03-07 1983-03-07 Audio signal mute circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3339383U JPS59138012U (en) 1983-03-07 1983-03-07 Audio signal mute circuit

Publications (2)

Publication Number Publication Date
JPS59138012U true JPS59138012U (en) 1984-09-14
JPH0320934Y2 JPH0320934Y2 (en) 1991-05-07

Family

ID=30164188

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3339383U Granted JPS59138012U (en) 1983-03-07 1983-03-07 Audio signal mute circuit

Country Status (1)

Country Link
JP (1) JPS59138012U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57202237U (en) * 1981-06-18 1982-12-23

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57202237U (en) * 1981-06-18 1982-12-23

Also Published As

Publication number Publication date
JPH0320934Y2 (en) 1991-05-07

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