JPS5913745B2 - Display drive device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display driving device, and more particularly to a display driving device that selects a display digit and displays data based on a display command signal from a central processing unit (hereinafter referred to as CPU). .

Recently, when lighting a multi-digit display with multiple display digits in electronic cash registers, for example, display commands from the CPU are used to drive the display digits and segments without relying on hardware timing. Display driving devices are used that display data based on signals.

In such a display driving device, if the CPU is not interrupted by another device, the CPU only performs display operations.
However, for example, when the printer finishes printing one line of data and a line timing signal is given as an interrupt signal, the CPU temporarily stops the display command signal and starts operating the printer based on the interrupt signal from the printer. Proceed to subroutine. Then, after giving an operation command to the printer, the operation for displaying is started again. By the way, C
The period during which the PU performs one operation is determined by the timing signal, and the period during which each display digit of the display is lit is also determined by this timing signal.

Therefore, if an interrupt signal is given from the printer when a lighting command is given to the display device at a certain timing, the display period of the display digit to be lit at that timing will be shortened. As a result, there is a problem in that the lighting time differs between each display digit, and the brightness differs between each display digit, causing flickering. The above-mentioned interrupts are not limited to interrupts by the printer, but can also occur due to interrupts from other external devices, which further increases flickering. Therefore, this invention makes the display time between each display digit constant,
It is an object of the present invention to provide a display driving device capable of reducing flickering between display digits.

To summarize, this invention generates a pulse signal having a fixed time width based on a display command signal from a control means, supplies this pulse signal to a display digit driving means to display data on each digit of the display means, and , the pulse signal is given to the control means, and when the control means detects an edge of the pulse signal, the next display command signal is derived.

The present invention will be described in more detail below along with embodiments shown in the drawings. FIG. 1 is a schematic block diagram of one embodiment of the present invention.

In the configuration, a keyboard 1 is used to input product registration information, etc., for example, in the case of an ECR, and the key input data input from this keyboard 1 is sent to the CP via a keyboard interface 2 and a data bus DB.
Given to U3. A read-only memory (hereinafter referred to as ROM) 5 that stores programs and a random access memory (hereinafter referred to as RAM) 4 that stores data input from the keyboard 1 are connected to the data bus DB. Further, a display interface 6 and a printer interface 8 are connected to the data bus DB. The display interface 6 includes a latch circuit 62 that temporarily stores digit selection data for selecting each display digit of the display 7;
2, a latch circuit 61 that temporarily stores segment selection data for selecting each display segment of the display 7, a segment driver 63 that drives the output of this latch circuit 61, and a digit driver 64 that drives the output of the CPU 3. Pulse generating means 65 is provided for generating a pulse signal having a constant time width based on the display command signal.

The pulse signal from this pulse generating means 65 is given to the digit driver 64, and is also given to the digit driver 64 as an interrupt signal 1.
Given to U3. The output of the digit driver 64 drives each display digit of the display 7, and the segment driver 63 drives each display segment of the display 7. The printer interface 8 includes a latch circuit 81 that temporarily stores print data, a printer driver 82 that amplifies the output of the latch circuit 81 to drive the printer 9, and a reset signal amplifier 83 that amplifies the reset signal from the printer 9. and a row timing signal amplifier 84 that amplifies the row timing signal from the printer 9.

The output of the reset signal amplifier 83 is applied to the data bus DB, and the output of the row timing signal amplifier 84 is applied to the CPU 3 as an interrupt signal 2. FIG. 2 is a concrete block diagram of the display interface 6 shown in FIG.

2, the display 7 has eight display digits GO to G7, and each display digit has a display segment Sdp, Sa to Sg. Latch circuit 61 stores data DO to D7 from data bus DB by latch signal 1, and each output of latch circuit 61 is applied to the bases of transistors 631 to 638. Each collector of the transistors 631 to 638 is connected to a display segment electrode Sdp, Sa to S.
connected to g. Logic voltage Vcc is commonly applied to the emitters of transistors 631 to 638.
Furthermore, a display tube voltage Vdi is applied to the collectors of the transistors 631 to 638 via resistors Rll to Rl8. The latch circuit 62 receives data DO to D applied from the data bus DB based on the latch signal 2.
7 is stored, and each output of this latch circuit 62 is applied to the bases of transistors 641 to 648.

The collectors of transistors 641 to 648 are connected to display digit electrodes GO to G7, and the emitters of transistors 641 to 648 are connected to the collector of transistor 10. Furthermore, the display tube voltage Vdi is applied to the collectors of the transistors 641 to 648 via resistors R2l to R28. The display command signal is given to a one-shot multi-pipelator 651 as a pulse generating means, and the Q output of this one-shot multi-pipelator 651 is given to the C as an interrupt signal.
It is applied to PU3 as well as to the base of transistor 10. A logic voltage Vcc is applied to the emitter of transistor 10. 3 and 4 are flowcharts for explaining the specific operation of an embodiment of the present invention, and FIG. 5 is a waveform diagram of each part of FIG. 1.

Next, the specific operation of one embodiment of the present invention will be described with reference to FIGS. 1 to 5.

Based on the program stored in the ROM 5, the CPU 3 gives a lighting command signal shown in FIG. The one-shot multipipulator 651 generates a pulse signal (FIG. 5c) having a constant time width TD from its Q output and supplies it to the display digit driver 64 as well as to the CPU 3 as an interrupt signal for display processing. The CPU 3 detects the trailing edge of the pulse signal, that is, the rising portion from a low level (hereinafter referred to as "L") to a high level (hereinafter referred to as "H"), and determines that an interrupt for display has occurred. . C.P.
In response to the interruption, U3 proceeds to a subroutine for display.

Then, the program counts for a predetermined blanking time TBl, and during that period, the latch circuit 61 stores the display segment data via the data bus DB, and the latch circuit 62 stores the display digit data (Fig. 5E, e'). Then, when the blanking time TB1 has elapsed, a lighting command signal (FIG. 5b) is given to the one-shot multi-pipulator 651. One-shot multipipulator 651 generates the pulse signal to cause transistor 10 to conduct. As transistor 10 becomes conductive, logic voltage Vcc increases to transistor 64.
Given to 1 to 648 emitters. For example, when display digit data for lighting display digit GO is stored in the latch circuit 62, the transistor 6
21 becomes conductive, and a logic voltage Cc is applied to the display digit electrode GO. On the other hand, the display segment data stored in the latch circuit 61 is
Display segment electrodes Sdp, Sa to S through 38
g to illuminate the desired segment of the display digit GO. The lighting period of the indicator 7 is determined by the pulse period TD of the pulse signal generated from the one-shot multi-pipulator 651. Display 7
When the printer row timing signal is applied to the CPU 3 as an interrupt signal 2 from the printer 9 via the row timing signal amplifier 84 while the light is on, the CPU 3 proceeds to a subroutine for printer processing.

Then, the CPU 3 stores the print data in the printer latch circuit 81 via the data bus DB (FIG. 5E, EL). This print data is printed by printer driver 8.
2 to the printer 9, and the printer 9 prints the print data. When interrupt signal 2 is given to the CPU 3 from the printer 9 immediately before the pulse signal of the one-shot multipipulator 651 rises, the CPU 3
U3 causes printer latch circuit 81 to store print data without causing latch circuits 61 and 62 to store display segment data and display digit data, thereby giving priority to the operation of printer 9.

After the printer 9 performs a printing operation, display segment data and display digit data are stored in latch circuits 61 and 62. Thereafter, a lighting command signal is given to the one-shot multi-pipulator 651. In this case, the blanking time TB2 is longer than the blanking time TBl because priority is given to the operation by the printer 9 without immediately executing the display operation after the immediately preceding pulse signal rises. Become. After storing the display segment data and display digit data in the latch circuits 61 and 62 during the blanking time, the printer 9
When the CPU 3 receives an interrupt signal from the printer 9 as shown in FIG.
The process proceeds to a subroutine for , and the operation by the printer 9 is given priority.

That is, the print data is stored in the printer latch circuit 81 and a print command signal is given to the printer 9.
After a subroutine for printing by the printer 9 is executed, the process proceeds to a subroutine for display, and a lighting command signal is given to the one-shot multipipulator 651. Therefore, the blanking time TB3 in this case
is also longer than the blanking time TBl. When the lighting command signal is applied to the one-shot multi-pipulator 651, the display interface 6 performs the same operation as described above and causes the display 7 to display predetermined data. In this way, a lighting command signal is given to the one-shot multipipulator 651 to generate a pulse signal having a fixed time width TD, and each display digit is sequentially lit by this pulse signal. Even if an interrupt signal is received from the printer 9 during the period, the display time of each display digit does not become shorter or longer, so the display time between each display digit becomes constant and flickering can be reduced.

FIG. 6 is a concrete block diagram of a display interface according to another embodiment of the present invention.

This FIG. 6 is the same as FIG. 2 except for the following points. That is, in FIG. 2, a one-shot multipipulator 651 is used as the pulse generating means, but in this FIG. 6, a timer circuit 652 and a flip-flop 653 are provided to generate a pulse signal based on the lighting command signal. It is. That is, the timer circuit 652 is given data that determines the pulse period of the pulse signal via the data bus DB. A clock signal is given to this timer circuit 652, and the timer circuit 652 counts this clock signal. When the count value reaches a set time, an "H" signal is derived from the Q output, resets the flip-flop 653, and generates an interrupt. It is given to the CPU 3 as signal 1. A lighting command signal is applied to the set input terminals of the timer circuit 652 and flip-flop 653. The Q output of flip-flop 653 is applied to the base of transistor 10. In operation, when the CPU 3 provides timer setting data to the timer circuit 652 via the data bus DB,
Read the data of the timer circuit 652.

When the lighting command signal is derived from the CPU 3, the flip-flop 653 is set and the timer circuit 652 counts the clock signal. By setting the flip-flop 653, its Q output becomes “L”.
”, making the transistor 10 conductive. After counting the clock signal for a set time, the timer circuit 652 derives an "H" signal from the Q output and outputs the "H" signal to the flip-flop 6.
53 is reset, and an interrupt signal 1 is given to the CPU 3. As described above, according to the present invention, the pulse generating means for generating a pulse signal of a fixed time width based on the lighting command signal is provided, and the display time of each display digit of the display is determined by the pulse signal. Therefore, even if an interrupt signal is given from an external circuit while the display is displaying, the display time of each display digit will not be shortened or lengthened.

Thereby, flickering between each display digit can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram of one embodiment of the present invention. FIG. 2 is a concrete block diagram of the display interface included in FIG. FIGS. 3 and 4 are flowcharts for explaining the specific operation of one embodiment of the present invention. FIG. 5 is a waveform diagram of each part of FIG. 2. FIG. 6 is a concrete block diagram of a display interface according to another embodiment of the present invention. In the figure, 3 is a central processing unit;
4 is a random access memory, 5 is a read-only memory, 6 is a display interface, 61 and 62 are latch circuits, 63 is a segment driver, 64 is a display digit driver, 65 is a pulse generation means, 651 is a one-shot multipipelator, 652 is a timer circuit, 653 is a flip-flop, 7 is a display, 8 is a printer interface, 9 is a printer, and 10, 631 to 638, and 641 to 648 are transistors.

Claims (1)

[Scope of Claims] 1. A display means having a plurality of display digits, a display digit drive means for driving each display digit of the display means, and display digit selection data for sequentially selecting each display digit, A display driving device including a control means for supplying a display command signal for commanding a display by a display means to the display digit driving means, further generating a pulse signal having a fixed time width based on the display command signal, The control means includes a pulse generation means for supplying to the drive means and the control means, and the control means detects an edge of the pulse signal and supplies the next display command signal to the pulse generation means, thereby displaying each display digit. Display drive device that keeps time constant