JPS59136883A - Time counter for vehicle - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a vehicle timing device that measures and displays driving time and parking time of a vehicle.

Conventionally, this type of timing device is reset by pressing a reset switch at the start of driving or parking, and displays the driving time or parking time from the reset point.For example, when taking a break after driving for a long time. Use it to know what you need.

However, the conventional device described above has a problem in that the reset switch is often forgotten to be pressed, making it impossible to accurately measure time. In addition, there is also the problem that the time display is overlooked even if the reset switch is pressed. The present invention attempts to solve the above-mentioned problems of conventional devices. It is an object of the present invention to provide a vehicle timing device that measures and displays driving time or parking time and notifies the passage of a predetermined driving time or parking time.

That is, the vehicle timing device of the present invention includes a detection means for detecting the start of driving and parking of the vehicle, a time measurement means that is reset by an output signal of the detection means at the time of start of driving and start of parking, and a time measurement of the time measurement means. A timing data display means for displaying data, a first notification means for notifying the elapse of a predetermined driving time from the time measurement data, and a second notification means for notifying the elapse of a predetermined driving time from the time measurement data. It is equipped with.

Hereinafter, the present invention will be explained with reference to illustrated embodiments.

1 to 5 show a first embodiment of the present invention, and the structure and operation will be explained below based on each figure.

FIG. 1 shows the overall configuration of the timekeeping device. In the figure, 1 is an ignition switch, 2 is a clock pulse generation circuit, 3 is an operation detection circuit, 4 is a clock circuit, 5 is a display circuit, 6 is a mode display lamp, and 7 is a switch.

The driving detection circuit 3 detects driving and parking of the vehicle from the important signal 1a of the ignition switch.

The clock circuit 4 receives the reset pulse 3 & of the driving detection circuit 3 mentioned above.
It is reset at the start of driving and parking,
The clock pulse 2a output from the clock pulse generation circuit 2 is inputted and the elapsed time is counted.

The display circuit 5 displays the elapsed time and the elapsed predetermined time.

The mode display lamp 6 lights up during driving based on the output of the driving detection circuit 3.

FIG. 2 shows an example of the clock pulse generation circuit 2, in which reference numeral 21 denotes an oscillation circuit (in this example, a Suwa Seiko Metal 8
640B), 22.231.24 are decimal frequency dividing circuits (TO451B manufactured by Toshiba in this embodiment).

The oscillation circuit 21 receives a clock signal 2 of l OOO/3 Hz.
1&, and this clock signal 21& is sent to the frequency divider circuit 22.
The frequency is divided by 23.24, resulting in a 1073 Hz clock pulse 23a and a 1/3 Hz clock pulse 2a.

FIG. 3 shows an example of the driving detection circuit 3. 31 in the figure is a waveform shaping circuit, with resistors 311.312.313.314,
Capacitor 315, diode 316, inverter 31
7.318 and transistor 319.

32 is a trigger pulse generation circuit, which includes resistors 321, 322,
Capacitor 323.324, IJOR game) 325.3
26 and exclusive OR (hereinafter referred to as HXOR)
Consists of 327.

Consists of.

34 is a D-type 7 lip-flop.

Reference numeral 35 denotes a reset signal generation circuit, which is composed of a D-type flip 7u tube 351, 352, an 1XOR gate 353, and an AND gate 354.

Also, 36 is the lamp drive circuit, Nokura Gate 3
61, resistors 362, 363, transistor 364 and Zener diode 365.

The waveform shaping circuit 31 receives input from the ignition switch 1.
Signal 31a becomes "1" level and signal 3 becomes "0" level when the switch is activated.
Emit 1b. The trigger pulse generation circuit 32 inputs the signals 31a and 31b, and emits a trigger pulse 32& which remains at the "1" level for a certain period of time from the time when the levels of the signals 31a and 31b are inverted. The delay circuit 33 counts the clock pulses 2& and outputs "1" after a certain period of time (30 seconds in this embodiment) has passed after the input of the clock pulse 321L.
It emits a signal 33& which becomes the level.

The signal 4j 33a is input to the O terminal of the 7-lip 70 tube 34, and at this timing, the signal 31& input to the D terminal is output from the Q terminal as the operation discrimination signal 34a. At this time, if the driving detection signal 34a is at the "1" level, the mode display lamp 6 is turned on by the lamp drive circuit 36 to notify that the driving state is started and time measurement is to be started. On the other hand, when the detection signal 34 & is at the rOJ level, the mode display lamp 6 turns off, indicating that the vehicle is in the parking state and time counting will start. Here, due to the delay circuit 33, the short-time ignition switch, 1, does not affect the driving detection.

Further, when the level of the detection signal 34a is inverted, the reset pulse 3a is generated from the reset signal generating circuit 35 at the moment of inversion.

FIG. 4 shows an example of 40 clock circuits. In the figure, 41 is a 20-decimal branch circuit, a decimal branch circuit 411, and an inverter 4'J.
-2 and a binary frequency divider circuit 413 using 70 D-type lips.

42 is a hexadecimal counting circuit, BOD counting circuit (Toshiba [T 04518° in this example) 421.422, inN-
Evening 423, OR Gegu and NAND Gate 425.42
Consists of 6.427.

It makes up the whelk.

43 is a decimal counting circuit, BOD counting circuit 431.43
Consists of 2.

45 is a parking time setting circuit, AND gate 451.45
2.453-1454 and an inverter 455.

46 (dlJ set pulse generation circuit, D type flip 7
It consists of an 0 knob 461 and an AND gate 462.

47 is the operation time setting circuit, AND gate 471.47
Consists of 2.473.

48 is a first flashing command circuit which is a second notification means, and is a D type 7
Lip 70 Tube 481. OR gate 482 and AND
It consists of a gate 483.

49 is a second flashing command circuit which is also a second notification means,
Dm-y lip 70 knob 491 and OR gate 492
Consists of.

44 is a parking time excess detection circuit which is the first notification means;
Mold flip 70 knobs 441, 442, AND gate 44
3 and In I Kuito 444.

/f Lus3
2decimal frequency divider circuit 41 and counting circuit 42.43 by &
The o/3 If z clock pulse 2&, which is reset, is inputted to the frequency dividing circuit 41 and becomes a 1-minute pulse signal 41a that goes to the "1" level every minute. The sexagesimal counter circuit 42 counts the 1-minute signal 41a, outputs the minute-by-minute clock data M of 2-digit BOD, and outputs the 1-hour pulse signal 42a that goes to the "1" level every 60 minutes.

The one-hour pulse signal 42 & is counted by a decimal counting circuit 43 and becomes time measurement data H in two-digit BOD time units. The counting circuit 43 also outputs a 100-hour elapsed signal 43a that is at the "1" level from 80 hours after the start of counting to 100 hours after the start of counting.

The parking time setting circuit 45 outputs a 15-minute elapsed signal 45& when the driving detection signal 34a is at the "0" level, that is, when 15 minutes have elapsed in the parked state, and outputs a 30-minute elapsed signal 45b when 30 minutes have elapsed.

The operating time setting circuit 47 outputs a 1-hour elapsed signal 47a when the detection signal 34a is at the "1" level, that is, 1 hour has elapsed in the operating state, and outputs a 2-hour elapsed signal 47b when 2 hours have elapsed. When a minute has elapsed, a 10-minute elapsed signal 47a is output.

The reset pulse generation circuit 46 generates a reset pulse 46 when the detection signal 34a rises, that is, when the operating state is reached.
Output &.

The first blinking command circuit 48 receives the one hour elapsed signal 4'7a.
, the inverted signal of the 15-minute elapsed signal 45a1, the discrimination signal 34a, and the reset pulse signal 46a are manually input, and the first blinking signal 48& is output. This flashing signal 48a becomes level "1" when parking after driving for more than one hour,
It becomes the "0" level after minutes have elapsed or when restarting the operation.

The second blinking command circuit 49 includes the 2-hour elapsed signal 47b,
30 minute elapsed signal 45b and reset pulse signal 46&
is input, and the second blinking signal 49& is output. This blinking signal 49a becomes the rlJ level when the vehicle is operated for two hours or more, and becomes the "0" level after 30 minutes of parking or when the vehicle is restarted.

The first blinking signal 48a and the second blinking signal 49a are O
It is input to the R gate 410 and becomes a blinking signal 4&.

The parking time excess detection circuit 44 receives the inverted signal of the 1oo time elapsed signal 43a1 detection signal 34a and the 10 minute elapsed signal 47c, and outputs the charging signal 4b. Signal 41:I becomes level "1" after 100 hours of parking,
After 10 minutes of operation, the level becomes "0".

FIG. 5 shows a circuit example of the display circuit 5. In the figure, 51.
52, 53, and 54 are liquid crystal decoders (TO4543 made by Toshiba in this embodiment), and 57 are liquid crystal numeric displays (F2049 made by Toshiba in this embodiment).

Each decoder 51, 52, 53, 54 and the liquid crystal display 57 are driven by the clock pulse 21a of 1000/3 HH, and the clock data M in minutes and the clock data H in hours input from the clock circuit 4 are displayed on the display 57. displayed above.

Here, when the blinking signal 4a of "1" level is input, the AN
I) A lo/3Hz clock pulse 23a is applied to the B terminal of each decoder 51 to 54 through the gate 55,
This causes the LCD display to blink.

Further, when the charging signal 4b at the "1" level is input manually, the clock pulse 21a has its level inverted by the KXOR gate 56 and is applied to the M-NUS terminal of the display 57.
As a result, "-" is displayed.

The level of the clock pulse 21a is also inverted by an inverter 58 and inputted to the 00L terminal of the display 57, whereby a colon separating hours and minutes is displayed by lighting.

As described above, the timing device of the present invention uses the ignition switch to detect each state of driving and parking of the vehicle, and automatically displays the elapsed time after the start of driving and the start of parking. Thus, there is no need to press the reset switch when starting timekeeping, which eliminates the need for frequent operations and allows accurate timekeeping at all times.

In addition, if you drive for more than a predetermined time, the timer display will flash while driving to alert you to the need to park or take a break (in this example, if you drive for more than 2 hours), and after parking, you will be required to take a break as well. Call the driver's attention by displaying the elapsed driving time and parking time, such as by flashing the clock display or by displaying the need to charge the battery after long periods of parking. I can do it.

In the above embodiment, the clock display flashes to remind you to take a break, but the words "Break" may also be displayed.Also, although "-" was displayed as a signal to prompt charging, "-"
6 to 10 show a second embodiment of the present invention, in which the operation detection circuit 3 and clock circuit 4 in the first embodiment are connected to a microcomputer. (hereinafter referred to as microcontroller)
It has been replaced with .

FIG. 6 shows the hardware configuration. In the figure, 8 is a microphone including a memory, 9 is a lamp driver with a latch, 10 is a display device with a latch (Dryno, 11 is a 3-state buffer, and the above-mentioned devices are It is connected to the pass line 12. Here, the clock pulse generation circuit 2 generates a reference clock pulse of IHz.

7 to 10 show flowcharts of the processing program of the microcomputer. Various flags in the figure are data areas secured in memory, and the program branches depending on the state of the flag d (rlJ or "0"). Also,
A clock counter and a 30 second counter are data areas that store time measurement data. There are three types of clock counters: seconds, minutes, and hours.

Note that processing is normally performed according to the programs shown in FIGS. 7 to 9, and the program shown in FIG. 10 is interrupted by an interrupt signal from the clock pulse generation circuit 2 every second.

In FIG. 7, various flags, counters, etc. are initialized in step 701. In step 702, the important signal 1a of the ignition switch is sent via the buffer 11.
(see FIG. 6), and if the ignition switch is turned on, steps 703 to 713 are performed. If it is off, steps 714 to 724 are performed.

In steps 703 to 707, the ignition switch is delayed by 30 seconds, and in steps 708 to 712, the clock counter for time measurement is cleared and various flags are set. ) lights up to indicate the start of timing in the operating state.

In steps 714 to 718, a 30 second delay is performed when the ignition switch is turned off, and in step 719
After clearing the clock counter for time measurement and setting various flags in step 723, the mode display lamp 6 (see FIG. 6) is turned off in step 724 to indicate the start of time measurement in the parking state.

In FIG. 8, when the clock counter exceeds 1 hour during operation in step 801, the process advances to step 804, and the DIR
Set 7 lag to "1". Further, when the time exceeds 2 hours, the process proceeds from step 805 to step 806, where the D2H flag is set to "1", and at step 807, a "rest" mark is lit to urge the driver to take a break.

If it is lit, turn it off.

In FIG. 9, when the clock counter exceeds 100 hours while the car is parked in step 901, the process advances to step 911, and
"Charging required" mark lights up.

Further, if the DIR flag is set to "1", the process advances from step 902 to step 904, and if the parking is within 15 minutes, the "rest" mark is lit in step 905, and if the parking is longer than 15 minutes, the "rest" mark is lit. In step 906, the "rest" mark is turned off. In step 907 dDI
Set the H flag to "0".

If the D2H7 lag is also set to "1", the process advances from step 903 to step 908, and if parking is over 30 minutes, the "rest" mark is turned off in steps 909 and 910, and the D'LH flag and D2H7 lag are set. "0
” In Figure 10, step 10 is set to 0.
At step 7, each clock counter is sequentially incremented for each interrupt to measure time, and at step 10B, the time measurement result is displayed on the display circuit 5 (
(see Figure 6). In steps 109 to 113, a 30 second delay counter is incremented.

The above embodiment also has the same effects as the first embodiment.

In each of the embodiments described above, each state of driving or parking is detected by turning on or off the ignition switch, but it may be detected by vehicle speed. Further, each of the above states is displayed by lighting or extinguishing the mode display lamp, but it is of course possible to display the words "driving" or "parking".

As described above, the vehicle timing device of the present invention automatically detects driving and parking of the vehicle, accurately displays the elapsed time in each state, and notifies the elapsed predetermined driving time and parking time. This makes it extremely convenient for drivers.

[Brief explanation of drawings]

1 to 5 show a first embodiment of the present invention, FIG. 1 is a diagram showing the overall configuration, and FIGS. 2 to 5 respectively show a clock pulse generation circuit, an operation detection circuit, a timing circuit,
FIG. 3 is a circuit diagram of a display circuit. 6 to 10 show a second embodiment of the present invention, FIG. 6 shows the overall configuration, and FIGS. 7 to 10 show the second embodiment of the present invention.
The figure is a program 70-chart. 1...Ignition switch 2...Clock pulse generation circuit 3...
Operation detection circuit 4...Clock circuit 5...Display circuit 8...Microcomputer

Claims (3)

[Claims] (1) a detection means for detecting the start of driving and parking of the vehicle, and a timer that is reset by the output signal of the detection means at the time of starting driving and starting parking;
Timing data display means for displaying time measurement data of the time measurement means On the left, a first notification means for notifying the elapse of a predetermined driving time based on the time measurement data, and a second notification means for notifying the elapse of a predetermined parking time based on the time measurement data. A vehicle timekeeping device comprising a notification means. (2) The vehicle timing device according to claim 1, wherein the driving time notified by the first notification means is set in correspondence with the parking time preceding the driving time. (3) The vehicle timing device according to claim 1, wherein the parking time notified by the second notification means is set in correspondence with the driving time preceding the parking time.