JPS5913446A - Distributed processing system - Google Patents

Abstract

PURPOSE:To prevent system-down and to obtain high reliability, by providing a function for diagnosing the failure of other subsystems and executing the protection processing of a self-subsystem on the basis of the diagnosed result of the failure of other subsystems. CONSTITUTION:A failure detecting/diagnosing tester (BIT) 100B receives an address train turned around a transmission line by two cycles and regards the address of the other subsystem as an overlapped address when the address of the 1st cycle is different from that of the 2nd cycle to stop the transmission thereafter. An NCP 100 connected to a failure position detecting tester (EXT) 1010 enters the self-address train and informs the train to the EXT 1010. The EXT 1010 checks a by-pass flag and the address in the address train to determine the system configuration and output the determined result to a display device 1020. The BIT in each processor has a function for switching the transmission direction to a transmission controlling device (NCP) 110 (or 100) when transmission to the twin NCP 100 (or 110) is impossible.

Description

DETAILED DESCRIPTION OF THE INVENTION Object of the Invention The present invention relates to a distributed processing system, and particularly to a system in a distributed processing system in which subsystems are related to each other and a failure of one subsystem may have an adverse effect on other subsystems. This invention relates to a distributed processing system that prevents downtime and achieves high reliability.

Prior Art Figure 1 shows the aspect of failure detection and diagnosis in a conventional distributed processing system and recovery processing based on the results in comparison with aspect (2) of recovery processing in the present invention, which will be detailed later. be. In FIG. 1, the vertical axis indicates the target of failure detection and diagnosis, and the horizontal axis indicates the target of recovery processing performed based on the results of the detection and diagnosis.

Among the embodiments shown in FIG. 1, a device that detects a failure within its own subsystem and performs recovery processing for a failure in its own subsystem or another subsystem based on the result is as follows:
It is called a self-diagnostic tester.

In this self-diagnosis type tester, each subsystem is configured on the premise that "all other subsystems have completely performed failure detection and diagnosis and recovery processing based on the results." Therefore, if each subsystem fails or erroneously performs failure detection or recovery processing, other subsystems will be affected by it and the system will go down. In addition, if a fault is detected/diagnosed in another subsystem and, as a result, the fault detection/diagnosis or recovery process is made to perform recovery processing on the other subsystem, a failure or failure in the recovery process may be directly performed on the other subsystem. There is a problem in that it affects the system and causes the system to go down.

On the other hand, in the present invention, the autonomous This uses a tester. Above 3
Figures 2 and 3 illustrate the functions of the taste tester.

There are two types of self-diagnostic testers, shown in Figure 2 (E)) and (B).The subsystem 1 tester detects failures in its own subsystem based on the results of the 1 diagnostic process (11 or 12). , recovery processing 21 for own system AI or recovery processing for other subsystems 2.3 (22 or 22')
This is to give instructions. If this process is not performed normally (marked with an X in Figure 3 (A)), the Naka subsystem 2,
3 (3, 1, 32 or centralized tester (Fig. 2)
In I)), the tester of subsystem 1 detects and diagnoses failures in other subsystems 2.3 and performs recovery processes 24'' and 24-' based on the results. , 3. Therefore, a failure in subsystem 1 directly propagates (34°34') to other subsystems 2.3.

In contrast, an autonomous tester (see Figure 2C))
), the tester for subsystem 1 can test other subsystems 2 and 3.
A detection 1 diagnosis 13.13' of a failure is performed, and based on the result, the own subsystem performs a recovery process 23 to protect the failure from spreading to other subsystems. Therefore, failure detection of subsystem 1.

Failure or error in diagnosis or recovery processing occurs in other subsystems2.
3 will not be affected.

As stated in the detailed description of the invention, an object of the present invention is to solve the above-mentioned problems in distributed processing systems using conventional self-diagnosis testers or centralized testers, and to prevent system failures. The object of the present invention is to provide a highly reliable distributed processing system.

The above-mentioned object of the present invention is to provide a distributed processing system comprising a plurality of subsystems connected to each other on an equal basis, in which each of the subsystems has a function of diagnosing failures of other subsystems. In addition, the present invention is achieved by a distributed processing system characterized in that it is configured to perform protection processing for its own subsystem based on the diagnosis result of the failure of the other subsystem.

Embodiments of the Invention Hereinafter, embodiments in which the present invention is applied to a loop transmission system will be described in detail based on the drawings.

FIG. 4 is an overall configuration diagram of a distributed processing system showing an embodiment of the present invention. The system consists of a pair of transmission control devices installed on dual (double) Lepe transmission paths with mutually opposite transmission directions.

Paired transmission control devices M, 100 and 110, 200 and 21
0, . . . are mutually detour routes 100A.

110A+200A, 210A; ... are connected. Also, the range of subsystems indicated by broken lines is, for example, subsystem 1, transmission control device N1
oo, the subsystem 2 is connected to the transmission control device 200.oo from the loop transmission path 1200 and the detour path 100A. It is composed of a loop transmission path 2300 and a detour path 200A. Also, subsystem 1 is subsystem 2. It is connected only to the convex part 41.

FIG. 6 shows details of the subsystem 1, in which the paired transmission control device ft1oO, 110 has a host-to-host transmission line 11.
A processing device t (host) 1000 is connected via 1.211. Also, transmission control equipment! 100, 110 Oyohi processing equipment flfl O00 has tester (BI'l") 1
00B, ll0B and 1000B are built-in.

This BIT performs detection, diagnosis, and recovery processing of failures in other subsystems among the functions of the transmission control device. In addition, a tester (E
X'I'') 1010 is installed in the processing device 1000.The EXTIOIO outputs the failure location to the display fW1020 and informs the maintenance personnel of the failure location. Subsystem 2.3...
The subsystem 1 is also configured in exactly the same way as the subsystem 1 described above.

Below, the testers BIT100B and 110B.

1() For OOB and EXTIOIO operations, the 6th
This will be explained in detail using Figures (A) to ◎, Figures 7 and 8). In addition, in the following explanation, (well, transmission control equipment! (hereinafter, [NcPJ and 1/1)] 400° 410
Assume that it is down.

Now, NCP2O0 is the transmission line (also known as ``loop'').
Suppose that message 201 is sent on 2300. Even if the message passes for a certain period of time T0, the sender NCP2
If there is no return to O0, NCP2O0 resends the same message for confirmation. When the number of retransmissions reaches a certain number of times N□ or more, the BIT 200B determines that a failure has occurred on the transmission path (see the sixth upper hole). Soft, BIT20
No. 0B sends a small loop check signal 202 to check whether a message can be transmitted to NCP 3O0 of the adjacent subsystem. BIT3 of NCP3O0
00B indicates that the small loop check signal 202 is transmitted through the transmission line 23.
00, it determines that a failure has occurred somewhere on the transmission path, and at the same time sends the small loop check signal 202 to the NCP 310, it also sends the small loop check signal 302 onto the transmission path 3400. .

Detour m 30 Small loop check signal 20 from OA direction
Ncp 310 that received 2 loops it 3200
Send upward. NCP2O0c7) BIT21 that received the small loop check signal 202 from the loop 3200
0B performs the same processing as (7) BIT and 300B described above. As described above, when the small loop check signal 202 returns to the source NCR 200, the BIT 200B determines that the message can be sent to the adjacent NCP 300, and thereafter sends the message on the loop 2300.

On the other hand, BIT200B informs BIT210 of NCP2O0 that a failure may have occurred on the inner loop.
Notify B. As a result, the BIT210B receives the small loop check signal 2, similar to the above-mentioned BIT2O0B.
12 onto loop 2100. The BIT of each NCP that has received the small loop check signal sequentially performs the small loop check in the same manner as described above. In this example, suppose that NCP4O0,410 is down.
rJ 110 B The small roof check signal will not come back.

As a result, BIT300B uses detour route 30OA to
TIIOB forms a detour 110A, and thereafter sends received messages only to the detours 300A and 110A without sending them to the loops 3400 and 1400 (see FIG. 6 (13)).

The BITs 300B and 110B that have configured the detour transmit detour configuration notification signals 303 and 113, respectively. E
N CPloo or 1 connected to X T 1010
10, upon receiving the detour configuration notification signal 303.03, sends it to the processing bag [1000 (see FIG. 6C) J! <
().

31M11.100017) EX'l"1OIO is
From the detour configuration notification signal 113, the failed part is identified as 11.
3' (the downward-slanted part to the right in FIG.
(The diagonally shaded area on the upper right in Fig. 6(D)).

EXTIOIO combines the above two diagnostic results and displays on the display device t1020-hi that the faulty part is located somewhere between 113' and 303'.

The BITs 300B and 11B that configured the detour route 1 send the small loop check signal 302.112 and the large loop check signal 30 to check whether the failure has been recovered or not.
4.114 alternately and periodically. Since the large loop check signal does not bypass any NCP, if the large loop check signal 304 goes around the loop and returns to the source, the BIT 300B determines that the fault on the loop has been recovered. , cancels its own detour 3' OOA.

In addition, even if the small routine signal sent by BIT300B and 110B is returned, the BI that sent it
T cancels its own detour (see Figure 6).

The BIT 300B that has canceled the detour sends out a detour cancellation notification signal 305. N connected to EXT10'lO1
When CPloo receives the detour cancellation notification signal 305, it transmits it to EXTIOIO (see FIG. 6(F)).

EXT I OI O cancels the detour notification signal 303 from the BIT 300B based on the detour cancellation notification signal 305 and also cancels the failure diagnosis result on the loop 4100 in response to the above-mentioned diagnosis results 113' and 303'. to reduce the failure location diagnosis results to a range of 113” (see Figure 6.0).
reference).

Note that in order for transmission to be performed normally, it is essential that the addresses of each NCP are set without duplication. Therefore, each BIT is
Checks whether the same address as the own address has been set.

Now, when NCPloo is started, it is assumed that NCP has already been started (see outside of Figure 7).
The address train 106, which will be described in detail later, is sent out after DITlooBi of NCPloo.

The address train 100 is received each time N CP -C'M and sent out after filling in each address. After this address train 106 goes around the transmission path twice, it is sent to EXT 10 by the source B I T I OO.
Transferred to 10. The address train 106 is
FIG. 8 shows the process that is constructed each time P is passed. For each B I 'l', write the address 106A, and if a detour is being configured, write the detour flag 106.
B is °'1°1 □ B I T 100 B receives the address train 1068 that has made two rounds on the above transmission path, and the addresses of other subsystems between its own address 100 are the same in the first and second rounds. If the addresses are not the same, it is assumed that there is a duplicate address and no further transmission will be performed.

Mata, EXT l 010: m! Sale 7”, :NCP
loo takes in the address train 106 and EX
Notify Tlolo. EXTlolo determines the system configuration as 106' (see FIG. 7) by checking the detour flag and address in the address train 106, and outputs it to the display device 1020.

If the BIT in each treatment facility cannot be transmitted to the NCP 100', (or the same 110), it is transmitted to the NCP 110.
(or 100).

In the above embodiment, an example in which the present invention is applied to a loop transmission system is shown, but the present invention is not limited to this and can be similarly applied to other distributed processing systems such as line type, mesh type, etc. It goes without saying that it is possible.

Further, regarding the details of the operation shown in the above embodiment, please refer to the "Loop Transmission System"(I# Application No. 55-93924) and the "Transmission Control Device" (Utility Application No. 1983) proposed earlier by the present applicant.
I would like to add that you can refer to the descriptions such as No.-87835).

Effects of the Invention As described above, according to the present invention, each of the 1tl! In a distributed processing system consisting of % subsystems connected, each subsystem has a function of diagnosing failures in other subsystems, and based on the results of diagnosing failures in the other subsystems, Since the system is configured to perform system protection processing, it has the remarkable effect of preventing system failure in the distributed processing system and realizing a highly reliable distributed processing system.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the functional classification of various testers, and FIG. Third
The figures are diagrams schematically showing the functions of various testers, Figures 4 and 5.
The figure shows a schematic configuration of an embodiment of the present invention, and FIG. 6 (A
) to 0 and FIG. 7(A), however, FIG. 8 is a diagram showing the operation of the embodiment, and FIG. 8 is a diagram showing the address train. 1, 2.3.4. , 5 + subsystem, 100.11
0i200.210 +...r NCP', 100B
, ll0B1200B噌21OB+... IB IT
, 10001 processing device, 1010: EXT, 1.
020F display device. Patent applicant Hitachi, Ltd. Representative Patent attorney Masaaki Isomura
1 Figure 2 (B) Figure 6 (A) Figure 6 (B) Figure 6 (0 Figure 6 0 Figure 6 [F] Figure 6 [F] Figure 6 Ω Figure 7 ωO Figure 7 Figure (B) No. 8 Figure 1 Ob top 062

Claims (1)

[Claims] In a distributed processing system consisting of a plurality of subsystems connected to each other on an equal basis, each of the subsystems has a function of diagnosing failures in other subsystems, and also has the function of diagnosing failures in other subsystems. A distributed processing system characterized in that it is configured to perform protection processing for its own subsystem based on a D-cut result.