JPS59133718A - Gain control circuit - Google Patents

Abstract

PURPOSE:To simplify the constitution and to reduce the power consumption of a gain control circuit by adding a gain control function to a current mirror circuit provided to a phase wave detecting circuit. CONSTITUTION:The FM modulated signal is supplied to an input terminal 1, and the output of a limiter amplifier 2 is applied to a 90 deg. phase shifting circuit 3 as well as to a phase detecting circuit 4. The signal underwent a phase shift through the circuit 3 is supplied to the circuit 4 together with the gain control voltage sent from a terminal 9. A sound signal is delivered from the circuit 4 and applied to a sound output amplifier 7. A current mirror circuit consisting of transistors TR71, 72, 75 and 76 and TR35 and 36 is provided to the circuit 4. Then the gain control voltage E1 is applied to the common-connected collectors of the TR72 and 76 of the mirror circuit; while currents I0 and -I0 of adverse phases to each other are supplied to the collectors of the TR71 and 75. Currents I1 and I2 are supplied to the TR35 and 36, and a voltage drop is produced at the joint between resistances 41 and 42 to actuate differentially the current mirror circuit. Thus the gain can be controlled.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a gain control circuit having a current mirror circuit configuration and having a gain control function.

"Background Art and Its Problems" Gain control circuits are used, for example, in audio circuits of television receivers. FIG. 1 shows the configuration of a conventional audio circuit, in which an FM modulated signal is extracted by an audio detection circuit (not shown) and passed through an audio intermediate frequency amplifier (not shown).
A carrier frequency of 4.5 MHz) is supplied to an input terminal indicated by 1, and is supplied to a limiter amplifier 2. The output signal of the jitter amplifier 2 and a signal passed through a phase shift circuit 3 which carries out a phase shift of 90'' are supplied to a phase detection circuit 4.

This FM detection method is called a qua-V lacha FM detection method.

The output of the phase detection circuit 4 is supplied to the volume adjustment circuit 5 via a de-emphasis circuit (not shown). A speaker 8 is connected to the output terminal 6 of the volume adjustment circuit 5 via an audio output amplifier 7.

FIG. 2 shows a specific configuration of the above-mentioned audio system circuit. 20
．． FM modulation signals having mutually opposite phases are supplied to input terminals 21, which are supplied to the phase shift circuit 3 and also to the bases of transistors 22 and 23 of the phase detection circuit 4.

The phase detection circuit 4 has a double balanced multiplier configuration, in which a constant current source 24 is connected to the emitter connection point of both transistors 22 and 23, and a transistor 25 constituting a differential amplifier is connected to the collector of each. The common emitter connection point of .26 and the transistor 27. which constitutes the differential amplifier.
28 emitter common connection points are connected. Output signals of the phase shift circuit 3 having mutually opposite phases are supplied to the bases of the transistors 25 and 28 and the bases of the transistors 26 and 27. Input terminal 2 is connected to the collector connection point of both transistors 25 and 27 and the collector connection point of transistors 26 and 28.
The multiplication output of the signal from 0.21 and the output signal of the phase shift circuit 3 is obtained.

A diode 290 is connected to the common connection point of the transistors 25 and 27 from which one output current of the phase detection circuit 4 is taken out. The anode of diode 29 is resistor 3
0 to a power line 34 extending from a power terminal 33. At the common connection point of the collectors of the transistors 26 and 28 from which the other output current of the phase detection circuit 4 is taken out,
Similarly, a diode 31 and a resistor 32 are connected.

Collector of transistor 25, 27 and diode 29
The connection point of the cathode of the transistor 26.28 and the connection point of the collector of the transistor 26.28 and the cathode of the diode P31 are connected to the respective bases of the transistors 35.36. The pair of diode 29 and transistor 35 and the pair of diode 31 and transistor 36 each constitute a current mirror circuit, and the current flowing through each of diodes 29 and 31 and the collector current of transistor 35 and 36 are approximately equal. do. The collector current of the transistor 35 is the diode 3
7 and a resistor 38 in series. A connection point between the collector of transistor 35 and the anode of diode 37 is connected to the base of transistor 39. The emitter of this transistor 39 is grounded via a resistor 40,
Its collector and the collector of transistor 36 are connected. This diode 37. Transistor 39. resistance 3
8.40, an FM detection output current converted to a single voltage is generated at the connection point between the collector of transistor 36 and the collector of transistor 39.

The collector connection point of this transistor 36.39 is resistor 4
1.42 and the base of transistor 43. The series circuit of resistors 41 and 42 is connected to the power supply line 34.
and ground. Transistor 43 is of an emitter seven-lower configuration.

The emitter of transistor 43 is connected to the base of transistor 44 of volume adjustment circuit 5. The emitters of transistor 44 and transistor 45 are connected through a resistor 46, and the collectors of transistors 44 and 45 are connected to the emitters of transistors 47 and 48, respectively. A DC voltage source 49 is connected to the bases of these transistors 47 and 48, and their respective collectors are connected to the power supply line 34.
The base-emitter junction of transistors 47 and 48 (7) operates as a diode.

The emitter of transistor 44 is connected to constant current source 50, and the emitter of transistor 45 is connected to constant current source 51. The constant current sources 50 and 51 each flow a constant current II. Further, a DC voltage source 52 is connected to the base of the transistor 45.

The respective emitters of the aforementioned transistors 47, 48 are connected to the respective bases of transistors 53, 54. The emitters of transistors 53 and 54 are commonly connected, and a constant current source consisting of a transistor 55 and a resistor 56 is connected to this common connection point. □The constant current I2 from this constant current source is
The value corresponds to the volume control voltage applied to the terminal 57 from which the base of the transistor 55 is derived. transistor 5
3.54+7) A series circuit of a resistor 58 and a diode 59 and a series circuit of a resistor 60 and a diode 61 are inserted between each collector and the power supply line 34.

Therefore, the collector of transistor 53 and diode P58
The connection point between the cathode of the transistor 54, the collector of the transistor 54, and the cathode of the diode 6o is the connection point of the transistor 62.
．． 63 respective bases. This current mirror circuit extracts an output current, and furthermore, the diode-YB2° transistor 65. It is converted to a single-ended output current by resistors 66 and 67. A predetermined DC voltage divided by resistors 68 and 69 is applied to the collector of this transistor 65. Then, the emitter of the emitter follower type transistor 10 is led out as the output terminal 6.

The volume adjustment circuit 5 is configured as a key-in control amplifier, and its gain is proportional to (-!). Therefore, if the magnitude of the constant current 2 is changed by the volume control voltage,ゝIn will change.

As described above, in the conventional audio circuit, a volume adjustment circuit is provided completely independent of the FM detection circuit, and the circuit configuration is complicated and the current consumption is large.

``Purpose of the Invention'' This invention has a widely used configuration in which the detected output is extracted in the form of a large current from a phase detector to a current mirror circuit, and is converted into an output voltage at a portion where a wide dynamic range can be achieved. We realized a gain control circuit that is a current mirror circuit with a gain control function.
This is intended to simplify the circuit configuration.

"Summary of the Invention" This invention consists of the following aspects: 1. In the current mirror circuit composed of second and third transistors, a variable voltage generating circuit for gain control is inserted between the collector of the third transistor and a reference potential point.

Embodiment J An embodiment in which this invention is applied to an audio circuit of a television receiver will be described.As shown in FIG. A gain control function is added to the terminal 9, and a gain control voltage is supplied from terminal 9. Therefore, the first
There is no need to separately provide the volume adjustment circuit 5 in the configuration shown in the figure.

FIG. 4 shows the configuration of an embodiment of the present invention. The output current of the multi-channel filter that constitutes the FM detection circuit is connected to the common connection point between the collectors of transistors 25 and 27 and the transistor 2.
6.28 appear at the collector common connection point in opposite phases. The collector of the transistor γ1 and the base of the transistor 120 are connected to one collector common connection point. The emitter of this transistor 71 is connected to the power supply line 34 via a resistor 73. Further, the base of the transistor 71 and the emitter of the transistor 72 are connected, and this connection point is connected to the power supply line 34 via the resistor 14 and to the base of the transistor 35.

Further, the collector of the transistor 75 and the base of the transistor 16 are connected to the collector connection point of the transistors 26 and 28 of the phase detection circuit 4. This transistor 75
The emitter of is connected to the power supply 2-in 34 via a resistor 77. Further, the base of the transistor 150 and the emitter of the transistor 16 are connected, and this connection point is connected to the power supply line 34 via a resistor 78 and to the base of the transistor 36.

PNP type transistors 71, 72, and 35 constitute one current mirror circuit, and PNP type transistors 75, 76, and 36 constitute the other current mirror circuit. The collectors of transistors 72 and 76 are connected to the emitter of PNP type transistor 9, the collector of transistor 79 is grounded, and the base of transistor 79 is connected to the slider of variable resistor 8o. The variable resistor 8o is inserted between the terminal 81 to which DC voltage is supplied and ground. The variable resistor 80 is for volume adjustment, and is connected to the transistors 72 and 76 via the base-emitter junction of the transistor 79.
A variable voltage for gain control is supplied to the collector of.

A diode 31 . is connected between the collector of transistor 35 and ground. A series circuit of resistor 38 is inserted, and transistor 3
6 is grounded between the collector and emitter of the transistor 39 via a resistor 40, and the anode of the diode 37 and the base of the transistor 39 are connected. This current mirror circuit converts the current into a single-ended output current, and the emitter-follower type transistor 43 converts the current into an output voltage, which is taken out to the output terminal 6.

As a configuration for applying a gain control voltage to the collectors of the transistors 72 and -76, an emitter follower type transistor 82 may be used as shown by the broken line in FIG.

In the embodiment of the present invention described above, the basic configuration of one current mirror circuit of the phase detection circuit 4 is shown in FIG. In FIG. 5, El is a gain control voltage applied via transistor 79. Further, the current flowing through the transistor 25.27 and the current flowing through the transistor 26.28 are shown as Io and -Io because they have opposite phases. This current Io,
-I.

is the current 11. of transistor 35.36. -11 +, and a voltage drop due to both occurs at the connection point of resistors 41 and 42.

In one embodiment of the present invention, a differentially connected current mirror circuit is used, but as shown in FIG. ,. In this FIG. 6, as shown by the broken line, its collector is connected to the power supply line 34, and its emitter is connected to the collector of the transistor 71 and the transistor 720.
The transistor 83 connected to the base is a parasitic transistor formed when a particle PNP is used.

The parasitic transistor 83 is in a cutoff state in a range where the level of the gain control voltage E1 is lower than the base voltage of the transistor 72. In a range where the gain control voltage E1 is small and the collector-emitter voltage of the transistor 72 is sufficiently secured, the collector current of the transistor 71 is 1. and the collector current 11 of the transistor 35 have the following relationship.

11 = -J.

hfe indicates the current amplification factor of the transistor 71.35, and hfe3 indicates the current amplification factor of the transistor 72.

Generally, the current amplification factor is much larger than 1, so (11
~IO) holds true.

The gain control voltage E1 increases, the collector-emitter voltage VCE of the transistor 2 becomes small, and the transistor 72 enters the saturation region. In the saturation region, the current amplification factor hfe3 of transistor 2 decreases, and as is clear from the above equation, 11<T.

It becomes a relationship. This current amplification factor hfe3 is
As the emitter voltage VCE decreases, the voltage decreases and the voltage increases. Furthermore, when the gain control voltage E1 is increased to deepen the saturation, the diode between the collector and base of the transistor 72 is turned on, and the current I0 is supplied through this diode.
．． It stops flowing at 35.

In addition, when the parasitic transistor 83 is configured, the gain control voltage E1 is set to be higher than the base voltage of the transistor 72.
When the base-emitter voltage drop VBE is increased, this parasitic transistor 83 is turned on. Therefore, the current ■o flows from the power supply line 34 to the parasitic transistor 8
3, so that transistor 71.35 is turned off and current 11 no longer flows.

In the embodiment of the present invention described above, as shown in FIG. 7, the gain is maximum when the gain control voltage E1 is O, and the gain decreases as the gain control voltage E1 becomes larger.

This gain change curve is one of the characteristics of the variable resistor, D.
It is similar to a curve.

- "Effects of the Invention" According to the present invention, a gain control function can be added to a current mirror circuit. Therefore, the circuit configuration can be greatly simplified and power consumption can be reduced compared to the conventional configuration in which a double balanced connection circuit and a gain control circuit, which are suitable for multiplication circuits, are configured separately.

[Brief explanation of drawings]

1 and 2 are block diagrams and connection diagrams showing the conventional configuration of the audio circuit of a television receiver to which the present invention can be applied, and FIGS. 3 and 4 show an embodiment of the present invention. Block diagram and connection diagram. 5 and 6 are connection diagrams used to explain the present invention, and FIG. 7 is a graph showing the gain change characteristics of the present invention. 4... Phase detection circuit, 6...
......Audio signal output terminal, 34...
・・・・・・Power line, 71.75・・・・・・
...First transistor, 72.76...
・・・・・・Second transistor, 35, 36...
......Third transistor. Agent Masatomo Sugiura

Claims (1)

[Claims] a first transistor whose emitter is connected to one reference potential point; a current source inserted between the collector of the first transistor and the other reference potential point; and a base of the first transistor and its emitter. and a second transistor to which the collector of the first transistor and its base are connected, and a gain/gain control transistor inserted between the collector of the second transistor and the other reference potential point. and a third transistor, the base of which is connected to the base of the first transistor, whose emitter is connected to one of the reference potential points, and whose collector current is taken out. control circuit.