JPS59131276A - Television sound receiver - Google Patents

Abstract

PURPOSE:To prevent noises at muting from being generated by muting also an output of an FM detecting circuit in muting a sound output circuit. CONSTITUTION:An FM modulating signal from a sound intermediate frequency amplifier is inputted to a terminal 1. An output of a limiter amplifier 2 and a signal phase-shifting the output by 90 deg. are supplied to a phase detecting circuit 4. The phase detecting output is applied to a sound volume adjusting circuit 7 through a deemphasis circuit 5. A muting circuit 11 applies muting to the sound volume adjusting circuit 7 by a muting signal 12 and also to the phase detecting circuit 4. Then, the generation of noise at muting is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a television audio receiver for receiving audio signals of television broadcasting.

"Background technology and its problems" The audio system circuit of a television receiver consists of an audio detection circuit that extracts an FM modulated signal with a carrier frequency of 4.5 MH2, an audio intermediate frequency amplification circuit, an FM detection circuit, and a digital a fax circuit, a spinal adjustment circuit, an audio output amplifier,
The speakers are connected in sequence. It's a trench.
When the power is turned on or when switching channels, muting is applied to the audio circuit. This muting function is provided in the FM detection circuit in consideration of the user of the multiplex terminal from which the multiplexed composite signal is taken out.

In other words, a multiplex terminal is derived from between the FM detection circuit and the de-emphasis circuit, and by connecting the multiplex topology circuit to this multiplex terminal,
If the configuration is such that it is possible to receive television audio multiplex broadcasting, it is necessary to apply muting at a stage prior to this multiplex terminal. For this purpose, the FM detection circuit is provided with a muting function.

When muting is performed in the FM detection circuit,
The output DC potential is fixed to a predetermined value defined by a circuit unrelated to the FM detection circuit, such as a series circuit of a plurality of resistors inserted between the power supply and ground. Ideally, this predetermined DC potential matches the DC potential obtained when a 4.5 MH2 carrier wave is input to the FM detection circuit. However, doing so is extremely difficult in terms of circuit technology and requires accurate adjustment of the discret transformer. If a ceramic element is used as the discretrance and no adjustment is made, fluctuations in the DC potential due to this variation cannot be avoided. Further, fluctuations in DC potential due to variations in temperature characteristics of circuit elements cannot be prevented.

For this reason, when muting is applied to the FM detection circuit, a sudden change in the DC potential difference occurs,
This had the disadvantage of appearing as noise through the DC cut capacitor.

``Object of the Invention'' The present invention is to prevent noise from occurring when muting is applied to an audio circuit.

"Summary of the Invention" The present invention provides a method for muting the audio output circuit and delaying the time in a television audio receiver in which a multiplex output terminal is provided between an FM detection circuit and an audio output circuit. The output of the FM detection circuit is muted.

"Example" FIG. 1 shows the configuration of an embodiment of the present invention.

An FM modulated signal (having a carrier frequency of 4.5 MH2) extracted by an audio detection circuit (not shown) and passed through an audio intermediate frequency amplifier (not shown) is supplied to an input terminal indicated by 1.
It is supplied to limiter amplifier 2. limiter amplifier 2 with
The output signal and the signal passed through the phase shift circuit 3 which performs a 90° phase shift are supplied to the phase detection circuit 4. This FM
The detection method is called a quadrature or FM detection method. - The output of the phase detection circuit 4 is supplied to the volume adjustment circuit 7 via the de-emphasis circuit 5 and the DC cut capacitor 6. Although not shown, a speaker is connected to the output terminal 8 of the volume adjustment circuit 7 via an audio output amplifier.

A multiplex terminal 9 is led out between the phase detection circuit 4 and the de-emphasis circuit 5. By connecting a multiplex demodulation circuit 10 to this multiplex terminal 9 as shown by the broken line, audio signals of two channels of audio multiplex broadcasting can be taken out. A muting circuit 11 is also provided, and is configured to apply muting to both the phase detection circuit 4 and the volume adjustment circuit 7 using a muting signal from a terminal 12. In this case, at the start of the muting operation, the phase detection circuit 4 is turned off with a slight delay after the volume adjustment circuit 7 is turned off, and when the muting operation is canceled, the phase detection circuit 4 is turned on. After that, the volume adjustment circuit T is controlled to be turned on with a slight delay.

FIG. 2 shows a specific configuration of an embodiment of the present invention.

FM modulation signals having mutually opposite phases are supplied to input terminals 20 and 21, and are supplied to the phase shift circuit 3 and also to the paces of transistors 22 and 23 of the phase detection circuit 4.

The phase detection circuit 4 has a double balanced multiplier configuration, in which a constant current source 24 is connected to the emitter connection point of both transistors 22 and 23, and a transistor 25 constituting a differential amplifier is connected to the collector of each. The common emitter connection point of .26 and the transistor 27. which constitutes the differential amplifier.
28 emitter common connection points are connected. The output signals of the phase shift circuit 3 having mutually opposite phases are supplied to the paste transistors 26 and 27 of the transistors 25 and 28, respectively. Input terminal 2 is connected to the collector connection point of both transistors 25 and 27 and the collector connection point of transistors 26 and 28.
The multiplication output of the signal from 0.21 and the output signal of the phase circuit 3 is obtained.

The collector of the transistor 29 operating as a diode and the transistor 30 are connected to the common connection point of the transistors 25 and 27 from which one output current of the phase detection circuit 4 is extracted.
The pace of is connected.

The emitter of the transistor 29 is connected to the power supply terminal 37 through the resistor 31, the emitter of the transistor 30 and the base of the transistor 29 are connected, and this connection point is connected to the power supply terminal 37 through the resistor 32. A transistor 26 from which the other output current of the phase detection circuit 4 is taken out.
．． Similarly, a transistor 34, a diode-connected transistor 33, and a resistor 35.
36 are connected. The collectors of these transistors 30 and 34 are commonly connected, connected to the collector of a transistor 38, and grounded via a resistor 39. The emitter of transistor 38 is connected to power supply terminal 37.

Transistors 30, 34, and 38 constitute a section of the muting circuit 11.

A connection point between the emitter of the transistor 30 and the resistor 32;
The emitter of transistor 34 and the connection point of resistor 36 are connected to the bases of transistors 40 and 41, respectively.

The pair of transistors 29 and 40 and the pair of transistors 33 and 41 constitute a current mirror circuit. The collector current of transistor 41 is supplied to a series circuit of diode 42 and resistor 43.

A connection point between the transistor 41 and the anode of the diode 42 is connected to the base K of the transistor 44.

The emitter of this transistor 44 is grounded via a resistor 45, and its collector is connected to the collector of the transistor 40. This diode 42. transistor 44
．． Resistors 43 and 45 produce a single-ended FM detection output current at the connection point between the collector of transistor 40 and the collector of transistor 44.

The collector connection point of this transistor 40.44 is resistor 4
6.47 and the base of transistor 48. A series circuit of resistors 46 and 47 is inserted between power supply terminal 37 and ground.

The transistor 48 has an emitter seven-lower configuration, and its emitter is led out as the multiplex terminal 9 and is connected to the input terminal of the de-emphasis circuit 5.

The output terminal of the de-emphasis circuit 5 where the audio signal appears is connected to the base of the transistor 49 of the sound i adjustment circuit I via a DC cut capacitor 6. The emitters of transistor 49 and transistor 50 are connected through a resistor 51, and the respective collectors of transistors 49 and 50 are connected to the respective emitters of transistors 52 and 53. A DC voltage source 54 is connected to the bases of the transistors 52 and 53, and their respective collectors are connected to the power supply terminal 37, so that the base-emitter junctions of the transistors 52 and 53 operate as diodes.

The emitter of transistor 49 is connected to a constant current source 59 through the collector and emitter of transistor 55, and the emitter of transistor 50 is connected to constant current source 60 through the collector and emitter of transistor 56. The constant current sources 59 and 60 each pass a constant current of 1.

Also, the emitter of the transistor 52 and the transistor 55
A transistor @57 is provided in which the emitter of
A transistor 58 is provided between the emitter of the transistor 3 and the emitter of the transistor 56. This transistor 57.
58 is for muting.

The respective emitters of the aforementioned transistors 52, 53 are connected to the respective bases of transistors 61, 62. The emitters of transistors 61 and 62 are commonly connected, and a constant current source consisting of a transistor 63 and a resistor 64 is connected to this common connection point.

The constant current I2 generated by the constant current source has a value corresponding to the volume control voltage applied to the terminal 65 from which the base of the transistor 63 is derived. A resistor 66 and a diode 67 are connected between the respective collectors of the transistors 61 and 62 and the power supply terminal 31.
A series circuit of resistor 68 and diode 69 is inserted.

In addition, the collector of the transistor 61 and the diode 67
The connection point between the 0 cathode and the collector of the transistor 62 and the cathode of the diode 69 is the transistor 70.
．． 71 are attached to each base. This current mirror circuit extracts the output current as an output current, and the diode 72° transistor 73. It is converted to a single-ended output current by resistors 74 and 75. A predetermined DC voltage divided by resistors 76 and 77 is applied to the collector of this transistor 73. Then, the emitter of the emitter follower type transistor 78 is led out as the output terminal 8.

The volume adjustment circuit 7 is a gain control amplifier. Therefore, depending on the volume control voltage, the constant current I2
If you change the size of , the gain will change. The paces of transistors 55 and 56 for flowing constant current 11 are connected to a DC voltage source 79, and the transistors 57 and 57 are connected to a DC voltage source 79.
The pace of 58 is connected to the pace of transistor 80.

The base of this transistor 80 is grounded via 1K81°82, and a muting drive signal is supplied to a terminal 83 from which the connection point between the two is derived.

The collector of this transistor 80 is connected to the power supply terminal 37 via a resistor 84, and also to the pace of the transistor 38. The emitter of transistor 80 is grounded through resistors 85 and 86, and the connection point between the two is connected to the emitter of transistor 81. The collector of this transistor 87 is connected to the power supply terminal 37, and the base of the transistor 87 is connected to the DC voltage source 19.

The muting circuit 11 composed of transistors 80, 87, etc. will be explained. The muting drive signal (voltage) VM supplied to the terminal 83 is a trapezoidal wave whose rising edge and falling edge each have a slope, as shown in FIG. Also, the voltage of the DC voltage source 79 is set to V
Let it be B.

When the muting drive signal VM rises, VM >
At tl at VB (see FIG. 3), transistors 57 and 58 are turned on and transistors 55 and 56 are turned off. Therefore, the transistor 49.50 has a constant current of 11
is played, and the sound adjustment circuit 7 becomes muted. The output potential in the mute state is determined by the ratio of resistors 76 and 77.

Further, in the differential pair composed of transistors 80 and 87, at t2 when VM>VB+α, the transistor 80 is turned on and the transistor 87 is turned off.

Since the resistor 85 is inserted into the emitter of the transistor 80, the voltage at which the transistor 80 is turned on is α higher than VB.
only becomes larger. Current flows through the turned-on transistor 80, creating a voltage drop across the resistor 840, which turns on the transistor 38. Therefore, the collector potential of the transistors 30 and 34 rises to the power supply potential, and the phase detection circuit 4 becomes muted.

- As an example, resistor 81 is IOKΩ, resistor 82 is 20K
'Ω, resistor 85 is 5Ω, resistor 86 is IOKΩ.

The husband and wife select that the power supply voltage is +9V and the DC voltage vB is +2.24V. In this case, the transistors 57 and 58 are turned on at 2.5 sv (the voltage is higher by the voltage drop across the resistor 81), and the volume adjustment circuit 7 becomes muted. Then, the transistor 80 turns on at 2.95 V, and the phase detection circuit 4 becomes muted.

In this manner, when entering the mute state, the volume adjustment circuit 7 enters the mute state at tl, and then the phase detection circuit 4 enters the mute state at t2. Further, when the muting drive voltage falls, as shown in FIG. 3, the mute state of the phase detection circuit 4 is released at t3, and the mute state of the volume adjustment circuit 7 is released at the subsequent time t4.

"Application Example" As the FM detection circuit, a circuit other than the quadrature detection method may be used. Further, in this embodiment, since the circuit configuration from the limiter amplifier 2 to the volume adjustment circuit 7 is integrated, muting is performed in the volume adjustment circuit 7. However, the volume adjustment circuit 7
Muting may also be performed in a low frequency amplifier connected at a subsequent stage.

In addition, two types of drive voltages VMI and VM2 as shown in FIG. 4 are used as muting drive voltages, and the volume adjustment circuit T
muting operation, and the other drive voltage vM2
The FM detection circuit may be caused to perform a muting operation.

"Effects of the Invention" According to the present invention, by muting the FM detection circuit, the output of the multiplex terminal can also be muted. Even if the output DC potential fluctuates due to the muting of the FM detection circuit, the audio output circuit takes the lead and enters the muting state.
Generation of noise can be prevented.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.
FIG. 2 is a connection diagram of an embodiment of the present invention. FIGS. 3 and 4 are waveform diagrams of one example and another example of the muting drive voltage, respectively. 4... Phase detection circuit, 7...
・・・・・・−・Volume adjustment circuit, 9・・・・・・・・・
...Multiplex terminal, 11...
...muting circuit. Agent Masato Sugiura

Claims (1)

[Claims] 111 In a television audio receiver provided with a multiplex output terminal between an FM detection circuit and an audio output circuit, the audio output circuit is muted, and the audio output circuit is muted with a time delay. A television audio receiver equipped with a muting circuit that mutes the output of the FM detection circuit. (2) The muting circuit has semiconductor switching elements that operate at different threshold voltages, and a trapezoidal wave-shaped muting drive voltage is supplied to the muting circuit. Television audio receiver.