JPS59128760U - Board selection device - Google Patents
Board selection deviceInfo
- Publication number
- JPS59128760U JPS59128760U JP20294283U JP20294283U JPS59128760U JP S59128760 U JPS59128760 U JP S59128760U JP 20294283 U JP20294283 U JP 20294283U JP 20294283 U JP20294283 U JP 20294283U JP S59128760 U JPS59128760 U JP S59128760U
- Authority
- JP
- Japan
- Prior art keywords
- board
- board selection
- fixed pattern
- signal
- motherboard
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図および第２図は従来の基板選択装置の例を示す構
成図、第３図および第４図は本考案による基板選択装置
の実施例を示す構成図である。
ＭＢ・・・マザーボート、ＰＢ・・・プリント基板、Ａ
ＤＲ３０〜ＡＤＲ３，・・・基板選択アドレスバス、Ｃ
０ＤＥ０〜Ｃ０ＤＥｎ−基板コード、ＣＯＭＰ−・・比
較回路。1 and 2 are block diagrams showing an example of a conventional substrate selection device, and FIGS. 3 and 4 are block diagrams showing an embodiment of a substrate selection device according to the present invention. MB...Mother boat, PB...Printed circuit board, A
DR30~ADR3,... Board selection address bus, C
0DE0~C0DEn-board code, COMP-...comparison circuit.
Claims (1)
において、前記マザーボード上にｎビットの基板選択コ
ードとしての０の信号あるいは１の信号を与えるべく接
地あるいは開放とした固定パターンと、前記マザーボー
ドに装着された全プリント基板に共通して入力される基
板選択バスとを有し、かつ選択される前記プリント基板
内には前記固定パターンから得られるコード化された信
号と全基板に共通して入力される基板選択バス信号と比
較する比較回路を設け、前記固定パターンから得られる
コード化された信号と基板選択バス信号とが一致したと
き所定のプリント基板が選択されたことを示す選択信号
を発生させるようにしたことを特徴とする基板選択装置
。In a device in which a plurality of printed circuit boards are arranged on a motherboard, a fixed pattern that is grounded or open to give a 0 signal or a 1 signal as an n-bit board selection code is provided on the motherboard, and a fixed pattern is attached to the motherboard. and a board selection bus that is commonly input to all the printed circuit boards selected, and the selected printed circuit board includes a coded signal obtained from the fixed pattern and a board selection bus that is input commonly to all the boards. A comparison circuit is provided to compare the board selection bus signal obtained from the fixed pattern with the board selection bus signal, and generates a selection signal indicating that a predetermined printed board has been selected when the coded signal obtained from the fixed pattern and the board selection bus signal match. A board selection device characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20294283U JPS59128760U (en) | 1983-12-29 | 1983-12-29 | Board selection device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20294283U JPS59128760U (en) | 1983-12-29 | 1983-12-29 | Board selection device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59128760U true JPS59128760U (en) | 1984-08-30 |
Family
ID=30428160
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20294283U Pending JPS59128760U (en) | 1983-12-29 | 1983-12-29 | Board selection device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59128760U (en) |
-
1983
- 1983-12-29 JP JP20294283U patent/JPS59128760U/en active Pending
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