JPS59127322U - power amplifier - Google Patents
power amplifierInfo
- Publication number
- JPS59127322U JPS59127322U JP1947683U JP1947683U JPS59127322U JP S59127322 U JPS59127322 U JP S59127322U JP 1947683 U JP1947683 U JP 1947683U JP 1947683 U JP1947683 U JP 1947683U JP S59127322 U JPS59127322 U JP S59127322U
- Authority
- JP
- Japan
- Prior art keywords
- amplification stage
- power amplifier
- collector
- push
- pull
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来装置の一例の構成を示す回路構成図、第２
図は本考案の一実施例の構成を示す回路構成図、第３図
は本考案の他の実施例の構成を示す回路構成図、第４図
は本考案のその他の実施例の構成を示す回路構成図であ
る。
１、 ２． ２０・・・差動電圧増幅段、４・・・５Ｅ
ＰＰ電力増幅段、２１・・・位相反転回路、３０・・・
プッシュプル電圧増幅段、Ｔｒ□〜Ｔｒ１□・・・トラ
ンジスタ（ＦＥＴを含む）、Ｒ□〜Ｒ２３・・・抵抗、
Ｉ・・・電流源、Ｄ１〜Ｄ３・・・ダイオード、Ｃ・・
・コンデンサ。Figure 1 is a circuit configuration diagram showing the configuration of an example of a conventional device;
The figure is a circuit configuration diagram showing the configuration of one embodiment of the present invention, FIG. 3 is a circuit configuration diagram showing the configuration of another embodiment of the present invention, and FIG. 4 is a circuit diagram showing the configuration of another embodiment of the present invention. FIG. 3 is a circuit configuration diagram. 1, 2. 20...Differential voltage amplification stage, 4...5E
PP power amplification stage, 21...phase inversion circuit, 30...
Push-pull voltage amplification stage, Tr□ to Tr1□...transistor (including FET), R□ to R23...resistance,
I...Current source, D1-D3...Diode, C...
・Capacitor.
Claims (1)
クタとコレクタ抵抗との接続点にそれぞれ接続され、且
つ各々のコレクタ側で互いに接続されたＮＰＮ トラン
ジスタとＰＮＰ ）ランジスタからなるプッシュプル電
圧増幅段で５ＥＰＰ電力増幅段を駆動すφ構成の電力増
幅器において、上記プッシュプル電力増幅段を構成する
上記両トランジスタのベース同士の間にコンデンサを介
挿したことを特徴とする電力増幅器。A push-pull voltage amplification stage consisting of an NPN transistor and a PNP transistor whose bases are respectively connected to the connection point between the collector and collector resistor of the transistor in the previous voltage amplification stage and which are connected to each other on the collector side of each 5EPP. A power amplifier having a φ configuration for driving a power amplification stage, characterized in that a capacitor is inserted between the bases of both of the transistors constituting the push-pull power amplification stage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1947683U JPS59127322U (en) | 1983-02-15 | 1983-02-15 | power amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1947683U JPS59127322U (en) | 1983-02-15 | 1983-02-15 | power amplifier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59127322U true JPS59127322U (en) | 1984-08-27 |
Family
ID=30150620
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1947683U Pending JPS59127322U (en) | 1983-02-15 | 1983-02-15 | power amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59127322U (en) |
-
1983
- 1983-02-15 JP JP1947683U patent/JPS59127322U/en active Pending
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