JPS5912662A - Mf-fs signal system data receiver - Google Patents

Abstract

PURPOSE:To simplify the constitution of a receiver, by detecting whether a signal applied to an input port is an FS system or an MS sytem depending on the level of an FS signal component extracted at a receiving filter for outputting automaticaly a signal to an output terminal. CONSTITUTION:Only an in-band signal is extracted from the FS signal from a receiving input terminal 1 at a receiving filter 4 via a hybrid coil 2 and a signal amplifier 3 and amplified to a saturation level at a limiter amplifier 5. An output of the amplifier 5 is demodulated at a signal demodulator 6, its output is applied to an S-P signal converter 8 and a parallel data is outputted to a data output port 16. Further, a part of the output of the amplifier 5 is applied to a transistor (TR)9 having a relay 10 via a signal detector 7. On the other hand, an MF signal from the terminal 1 is decoded at an MF signal decoder 12 and applied to a gate circuit 13 and outputted to a port 16. Further, the gate 13 is controlled with the level of the FS signal detected at the TR9 and a strobe signal is outputted via a contact 15 of the relay 10.

Description

[Detailed description of the invention] Industrial applications The present invention relates to data receivers used on telephone lines.

Conventional configuration and its problems The reception signal method of the receiver that receives and collects theta from a remote location on a telephone line varies depending on the communication speed, but the most commonly used method is the one used in Gutshuphone etc. There is the MF (multi-frequency) system, which is used in ζtan, and the FS (frequency modulation) signal system, which is used for low-speed data communication. Conventionally, data receivers that receive and collect data from multiple lines using these methods require dedicated hardware for receiving and decoding all signals according to the MF method or the FS method.

Therefore, the current situation is that MF system hardware cannot receive FS system signals, and FS system hardware cannot receive iiMF system signals.

OBJECTS OF THE INVENTION The present invention solves the above-mentioned conventional drawbacks, and aims to provide a device that can receive both MF system and FS system signals.

Structure of the Invention In order to achieve the above object, the MF-FS@ signal system data receiver of the present invention is designed to calculate how many n signals f' are supplied to the input port from the n FS@ signal components extracted by the reception filter.
In the case of F13100, the data output of the MF signal decoder is completely prohibited from being supplied to the common data output port, and the reproduction timing of the FS method or the MF method is determined according to the above determination. The configuration is such that a signal is selected and supplied to a common strobe signal output.

Description of examples Hereinafter, one embodiment of the present invention will be described based on the drawings.

Now, if the data receiving fσ signal is an FS signal, the signal input to the signal input port (1) is a hybrid signal.

All coils (2) are amplified to a constant level by a signal amplifier (3), only the signal within the band is extracted by a 75% reception filter (4), and further amplified to a constant saturation level 1 by a limiter amplifier [5]. The signal is amplified again by the FB signal demodulator (6) and output as serial data, which is converted into parallel data by the serial/parallel signal converter (8).1. Denu output capo via diode α4) Q+1 (7)
It is output to D, ~D. Further, a part of the output of the IJ transmitter amplifier (5) is extracted by a signal detector (7) and converted into a DC signal, thereby turning on a switching transistor. As a result, relay oo is energized, and the timing signal outputted from the serial/parallel signal converter (8) is outputted to strobe signal output terminal 0 through relay contact 0 of relay αO. NaP
lHere, in order to control the output gIJ of the gate circuit a (described later) by turning ON the transistor (9), the diode α is
411r: No signal is output to the data output port θ via.

Similarly, if the data signal is an MF false signal, it is amplified by the signal amplifier (Ill) through the hybrid coil +2), and is amplified by the M
The P signal signal is decoded by the P signal decoder and input as parallel data to the gate circuit (181).Here, since the MF@ signal has a different signal frequency band from the PS signal,
Even if a part of the MF false signal enters F's@ signal detection +1111, it will not be extracted by the reception filter (4),
Therefore, the signal detector (7) output turns off the transistor (9). As a result, the gate 1131 is turned on, and the data output from the MF signal decoder (121) is output to the data output port Od through the gate diode (141). The signal is outputted to the strobe signal output terminal θη via a decoder (121, glass, relay, etc.).

As described in the detailed description of the invention, one advantage of the present invention is that the received data method is M.
The signal output to the data output port and the strobe signal output terminal is switched by fully automatically detecting the number of signals of both the F method and the FS method. It is also preferable from an economical point of view because it allows reception even in the case of the above system, and it is possible to share hardware compared to the conventional case where a receiver dedicated to the F13 method and a receiver dedicated to the MF method are installed side by side. It is something.

[Brief explanation of drawings]

The drawing is a configuration diagram of an embodiment of the present invention. (1)...Signal input boat, (2)...I\Ibrid coil, +3) (Ill...Signal amplifier, (4
)...Reception filter, (5)...Limiter amplifier,
- (61...FS signal demodulator, (7)...signal detection 13, fs)...serial/buffsil signal converter, (
9)... Switching transistor, 00... Relay, (+21... MF signal decoder, 0(... Gate circuit, (141041... Diode, (151...
...To relay contact 1, to 11...Data output port, 0
η...Strobe signal output terminal agent Yoshihiro Morimoto

Claims (1)

[Claims] 1. Signal layer width means for separately amplifying multi-frequency signaling data or frequency modulation signaling data supplied to a common signal input port, and signal layer width means for separately amplifying multi-frequency signaling data or frequency modulation signaling data supplied to a common signal input port; Frequency modulation signal band signal from frequency modulation signal system data? a receiving filter for extracting, an FS signal demodulating means for amplifying and detecting the output signal of the receiving filter to a certain level, and a serial/parallel signal converter for converting the output of the FS signal demodulating means into demodulated parallel data; a switching means that detects and switches the FS signal reception state from the signal extracted by the reception filter; an MP signal decoder that fully decodes the multi-frequency signal data amplified by the signal amplification means; and this MP signal decoder. a gate circuit in which a conversion output is applied to the input, the on/off of the output is selected by the switching means, and a signal is applied to the output data of the gate circuit and the output data of the serial/parallel signal converter, respectively. unidirectional means for supplying the common data output port with directionality, and output '2!' from the serial/parallel signal converter. The MF-n timing signal and the timing signal output from the MF@ decoder are all selected by the switching means and supplied to a common strobe signal output terminal.
FB signaling data receiver. 2. The unidirectional means is constituted by an OR gate, one input of which is respectively connected to each pit of said serial/parallel signal converter, and the other input of which is respectively connected to each pit of said gate circuit. , an output of an OR gate is connected to each bit of said data output port.