JPS59126589U - Inrush current suppression circuit during high frequency switching - Google Patents

Inrush current suppression circuit during high frequency switching

Info

Publication number
JPS59126589U
JPS59126589U JP1676283U JP1676283U JPS59126589U JP S59126589 U JPS59126589 U JP S59126589U JP 1676283 U JP1676283 U JP 1676283U JP 1676283 U JP1676283 U JP 1676283U JP S59126589 U JPS59126589 U JP S59126589U
Authority
JP
Japan
Prior art keywords
inrush current
high frequency
during high
frequency switching
circuit during
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1676283U
Other languages
Japanese (ja)
Inventor
金沢　徹
繁 山本
Original Assignee
株式会社日立製作所
日立エンジニアリング株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所, 日立エンジニアリング株式会社 filed Critical 株式会社日立製作所
Priority to JP1676283U priority Critical patent/JPS59126589U/en
Publication of JPS59126589U publication Critical patent/JPS59126589U/en
Pending legal-status Critical Current

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  • Power Conversion In General (AREA)
  • Protection Of Static Devices (AREA)
  • Dc-Dc Converters (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施の回路図、第２図は本考案のタ
イムチャートである。 ＧＴＯ・・・・・・ゲートターンオフサイリスタ、ＳＣ
Ｒ・・・・・・サイリスタ、Ｚ・・・・・・負荷、Ｒ・
・・・・・突入電流制限抵抗。FIG. 1 is a circuit diagram of one embodiment of the present invention, and FIG. 2 is a time chart of the present invention. GTO・・・Gate turn-off thyristor, SC
R...Thyristor, Z...Load, R.
...Inrush current limiting resistance.

Claims (1)

【実用新案登録請求の範囲】 ゲートターンオフサイリスタの簡易駆動回路、主回路電
源及び負荷よりなるスイッチング回路に於いて、 負荷と、この負荷に直列に設けた突入電流制限抵抗と、
この突入電流制限抵抗と並列に接続されたサイリスタと
からなることを特徴とする高周波スイッチング時突入電
流抑制回路。[Claim for Utility Model Registration] In a switching circuit consisting of a simple drive circuit for a gate turn-off thyristor, a main circuit power supply, and a load, a load, an inrush current limiting resistor provided in series with the load,
An inrush current suppression circuit during high frequency switching is characterized by comprising this inrush current limiting resistor and a thyristor connected in parallel.
JP1676283U 1983-02-09 1983-02-09 Inrush current suppression circuit during high frequency switching Pending JPS59126589U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1676283U JPS59126589U (en) 1983-02-09 1983-02-09 Inrush current suppression circuit during high frequency switching

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1676283U JPS59126589U (en) 1983-02-09 1983-02-09 Inrush current suppression circuit during high frequency switching

Publications (1)

Publication Number Publication Date
JPS59126589U true JPS59126589U (en) 1984-08-25

Family

ID=30148025

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1676283U Pending JPS59126589U (en) 1983-02-09 1983-02-09 Inrush current suppression circuit during high frequency switching

Country Status (1)

Country Link
JP (1) JPS59126589U (en)

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