JPS59126385A - Sif circuit - Google Patents

Sif circuit

Info

Publication number
JPS59126385A
JPS59126385A JP58001489A JP148983A JPS59126385A JP S59126385 A JPS59126385 A JP S59126385A JP 58001489 A JP58001489 A JP 58001489A JP 148983 A JP148983 A JP 148983A JP S59126385 A JPS59126385 A JP S59126385A
Authority
JP
Japan
Prior art keywords
power supply
circuit
amplifier circuits
circuits
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58001489A
Other languages
Japanese (ja)
Inventor
Hiroshi Kitahara
浩 北原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58001489A priority Critical patent/JPS59126385A/en
Publication of JPS59126385A publication Critical patent/JPS59126385A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/60Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Receiver Circuits (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To decrease mutual interference with another circuit formed on one chip by supplying power from a single power supply to a multi-stage cascade connecting amplifier circuit via each emitter follower transistor(TR). CONSTITUTION:Q1-Q8 are emitter follower TRs inserted in a power supply path of amplifier circuits 8-15 from an external power supply Vcc. The power supply of the amplifier circuits 8-15 is separated from that of another circuit, e.g., VIF circuit by the TRs Q1-Q8, the power supply is separated among the amplifier circuits 8-15, and then the number of amplifier stages is increased, then the leakage to other circuits is less, the superimposition of harmonic components among the amplifier circuits 8-15 is avoided, the harmonic component to the amplifier circuits 8-15 is less, the mutual interference with the other circuit is reduced sufficiently and a beat fault or the like hardly occurs.

Description

【発明の詳細な説明】 産業上の利用分野 この発明はテレビジョン受像機に用いられるIC化され
たSIF回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to an IC-based SIF circuit used in television receivers.

従来例の構成とその問題点 第1図はIC化された従来のSIF回路の回路図を示し
ている。第1図において、1は入力端子、2〜4け縦続
接続された3段の増幅回路、5は出力端子、6け定電圧
回路である。
Structure of the Conventional Example and Its Problems FIG. 1 shows a circuit diagram of a conventional SIF circuit implemented as an IC. In FIG. 1, 1 is an input terminal, 2 to 4 cascaded three-stage amplifier circuits, 5 is an output terminal, and 6 is a constant voltage circuit.

このよりなSIF回路は、それを用いるテレビジ璽ン受
像機の小形化、低コスト化を図るため、VIP回路、 
AGC回路などとともに同一のチップ上に形成されてい
る。しかしながら、このSTF回路は、チップ上でVI
P回路と電源が分離されていないため、VIP回路との
間で電源ラインを通じて相互干渉が生じ、例えば音声中
間周波の高調波が映像中間周波に干渉するとそれがビー
トとなってテレビ画面に現われるので、正しい情報伝送
が行えなかった。また、3段という少い段数で必要なゲ
インを得ているため、各段の電流が多く音声中間周波の
高調波成分の妨害成分のレベルが高く、干渉の影響が大
きかった。
This more sophisticated SIF circuit is designed to reduce the size and cost of television receivers that use it.
It is formed on the same chip along with the AGC circuit, etc. However, this STF circuit has a VI
Since the P circuit and the power supply are not separated, mutual interference occurs between the VIP circuit and the power supply line.For example, if harmonics of the audio intermediate frequency interfere with the video intermediate frequency, this will appear as a beat on the TV screen. , correct information transmission could not be performed. In addition, since the necessary gain is obtained with a small number of stages, ie, three stages, the current in each stage is large, and the level of the interference component of the harmonic component of the audio intermediate frequency is high, and the influence of interference is large.

第2図は提案例の回路図を示している。第2図において
、7は入力端子、8ないし15け縦続接続された8段の
差動増幅回路で、それぞれ差動増幅用トランジスタQ工
l’012と定電流用トランジスタロ工、と抵抗R工、
〜R工、とで構成されている。
FIG. 2 shows a circuit diagram of a proposed example. In Fig. 2, reference numeral 7 denotes an input terminal, and 8 to 15 cascade-connected 8-stage differential amplifier circuits, each consisting of a differential amplification transistor Q1'012, a constant current transistor 1'012, and a resistor R2. ,
It is composed of ~R engineering.

Qo。0.Q工。2け信号用のエミッタホロワトランジ
スタで、ここから次段の検波段へ送られる。R工。、〜
R工。4け抵抗、agは増幅回路8〜15へ電源供給す
るためのエミッタホロワトランジスタ、R工。5は抵抗
、16は出力端子、17は定電圧回路、B工は定電圧回
路17の電源である。
Qo. 0. Q engineering. This is an emitter follower transistor for two-digit signals, and from here it is sent to the next detection stage. R-engineer. , ~
R-engineer. 4 resistors, ag is an emitter follower transistor for supplying power to the amplifier circuits 8 to 15, R construction. 5 is a resistor, 16 is an output terminal, 17 is a constant voltage circuit, and B is a power source for the constant voltage circuit 17.

この提案例は電源をエミッタホロワトランジスタQ9に
より他の回路と分離し、かつ増幅段数を多くして各段の
電流を少くすることにより音声中間周波の高調波成分の
妨害成分を少くし、相互干渉を軽減するよう圧している
が、8段の増幅回路8〜15に共通に電源を供給してい
るため、各段の増幅回路8〜15で発生する高調波成分
が相乗して高レベルの高調波成分が電源ラインから漏れ
ることになり、相互干渉を十分圧軽減することはできな
かった。
In this proposed example, the power supply is separated from other circuits by an emitter follower transistor Q9, and the number of amplification stages is increased to reduce the current in each stage, thereby reducing interference components of harmonic components of the audio intermediate frequency. Although efforts are being made to reduce interference, since power is commonly supplied to the eight stages of amplifier circuits 8 to 15, the harmonic components generated in each stage of amplifier circuits 8 to 15 will synergize, resulting in a high level. Harmonic components leaked from the power supply line, making it impossible to sufficiently reduce mutual interference.

発明の目的 この発明は同一チップ上に形成した他の回路との相互干
渉を十分に軽減することができるSIF回路を提供する
ととを目的とする。
OBJECTS OF THE INVENTION An object of the present invention is to provide an SIF circuit that can sufficiently reduce mutual interference with other circuits formed on the same chip.

発明の構成 この発明のSTF回路は多段に縦続接続した増幅回路如
単−電源から各々エミッタホロワトランジスタを介して
給電することにより多段の増幅回路の電源ラインを分離
して多段の増幅回路間における音声中間周波の高調波成
分の相乗を阻止するようにし、他の回路との間の相互干
渉を十分に軽減するようにしている。
Structure of the Invention The STF circuit of the present invention consists of amplification circuits connected in cascade in multiple stages.Power is supplied from the power source through each emitter-follower transistor, thereby separating the power supply lines of the multi-stage amplifier circuits and connecting the power lines between the multi-stage amplifier circuits. It is designed to prevent synergy of harmonic components of audio intermediate frequencies, and to sufficiently reduce mutual interference with other circuits.

実施例の説明 第3図はこの発明の一実施例のSIF回路の回路図を示
している。第3図において、00〜Q8け外部電源V。
DESCRIPTION OF EMBODIMENTS FIG. 3 shows a circuit diagram of an SIF circuit according to an embodiment of the present invention. In FIG. 3, 00 to Q8 external power supply V.

0から各増幅回路8〜15への給電経路中に介挿したエ
ミッタホロワトランジスタで、増幅回路8〜15を他の
回路から電源分離するとともに相互間でも電源分離する
Emitter follower transistors inserted in the power supply paths from 0 to each of the amplifier circuits 8 to 15 isolate the power supplies of the amplifier circuits 8 to 15 from other circuits and also isolate the power supplies from each other.

このように、この実施例はエミッタホロワトランジスタ
Q工〜Q8により増幅回路8〜15と他の回路、例えば
VIP回路とを電源分離するとともに増幅回路8〜15
の相互間でも電源分離し、さらに増幅段数を多くしてい
るため、他の回路に対する漏れが少く、増幅回路8〜1
5の相互間での高調波成分の相乗がなく、増幅回路8〜
15の各々での高調波成分が少くなり、他の回路との相
互干渉を十分に軽減でき、ビート障害等は発生しにくい
As described above, in this embodiment, the emitter follower transistors Q to Q8 separate the power supplies between the amplifier circuits 8 to 15 and other circuits, such as the VIP circuit.
Since the power supplies are separated between each other and the number of amplification stages is increased, there is little leakage to other circuits, and the amplifier circuits 8 to 1
There is no synergy of harmonic components between the amplifier circuits 8 to 5.
Since the harmonic components in each of the circuits 15 are reduced, mutual interference with other circuits can be sufficiently reduced, and beat disturbances and the like are less likely to occur.

発明の効果 この発明のSIF回路によれば、同一チウプ上に形成し
た他の回路との相互干渉を十分圧軽減することができる
Effects of the Invention According to the SIF circuit of the present invention, mutual interference with other circuits formed on the same chip can be sufficiently reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のSIF回路の回路図、第2図は提案例の
回路図%第3図はこの発明の一実施例の回路図である。 7・・・入力端子、8〜15・・・増幅回路、Q工〜Q
8・・・エミッタホロワトランジスタ、vo。・・・外
部電源(5) 第1区
FIG. 1 is a circuit diagram of a conventional SIF circuit, and FIG. 2 is a circuit diagram of a proposed example. FIG. 3 is a circuit diagram of an embodiment of the present invention. 7...Input terminal, 8-15...Amplifier circuit, Q-Q
8... Emitter follower transistor, vo. ...External power supply (5) Ward 1

Claims (1)

【特許請求の範囲】[Claims] 縦続接続した多段の増幅回路と、この多段の増幅回路に
給電する電源と、この電源と前記多段の増幅回路の各々
の電源入力端との間にそれぞれ介挿した多数のエミッタ
ホロワトランジスタトラ備えたSIF回路。
A multi-stage amplifier circuit connected in cascade, a power supply for feeding power to the multi-stage amplifier circuit, and a large number of emitter follower transistor transistors each inserted between the power supply and the power input terminal of each of the multi-stage amplifier circuits. SIF circuit.
JP58001489A 1983-01-07 1983-01-07 Sif circuit Pending JPS59126385A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58001489A JPS59126385A (en) 1983-01-07 1983-01-07 Sif circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58001489A JPS59126385A (en) 1983-01-07 1983-01-07 Sif circuit

Publications (1)

Publication Number Publication Date
JPS59126385A true JPS59126385A (en) 1984-07-20

Family

ID=11502855

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58001489A Pending JPS59126385A (en) 1983-01-07 1983-01-07 Sif circuit

Country Status (1)

Country Link
JP (1) JPS59126385A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6151319U (en) * 1985-08-22 1986-04-07

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6151319U (en) * 1985-08-22 1986-04-07

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