JPS5912494A - Touch response apparatus for electronic musical instrument - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic musical instrument that changes the envelope waveform of a musical tone depending on the pressing speed of a key of a musical instrument having a keyboard, and particularly relates to a touch response device for an electronic musical instrument that digitally generates an envelope waveform of a musical tone. .

Conventionally, as a method of changing the envelope waveform of a musical tone depending on the pressing speed of a key, there is a method using a time constant formed by a resistor R and a capacitor C. A touch detector generates a voltage corresponding to a touch, that is, a voltage corresponding to a pressing speed, and using this signal, a resistor R and a capacitor C generate an envelope waveform.

Another method is to convert the key press speed into a digital value, digitally process the digital value, read it from an envelope memory in which envelope values are stored in advance, and generate an envelope waveform. In this method, the speed at which data is read from the envelope memory is changed in relation to the pressing speed, and the address position from which the data is read is changed.

The above-mentioned conventional methods had the following drawbacks. The method using resistor R and capacitor C performs all processing in an analog manner, such as multiplication, so the processing circuit requires a large number of elements, and furthermore, the envelope waveform is determined by the time constant of CR, so it is not possible to create an arbitrary envelope waveform. It had the disadvantage that it was not possible to obtain Furthermore, the method using envelope memory requires access to memory address locations related to the pressing speed, and the processing is complicated.

Furthermore, the human ear senses the loudness of a sound logarithmically and also senses changes logarithmically.

For this purpose, it is desirable that the musical tones generated change exponentially.

The present invention solves the above-mentioned problem, and its purpose is to digitally generate an envelope waveform in response to a key touch using a simple circuit configuration and change the envelope waveform exponentially. Relating to a response device.

The present invention is characterized in that an envelope waveform generation device for an electronic musical instrument having a keyboard includes: touch control data generation means for outputting touch data related to the pressing speed of a key; and basic clock generation means for generating a basic clock. , a basic clock counting means for counting the basic clock, a programmable counting means for counting the clock corresponding to the basic clock and generating a clock related to touch data, and a step counting means for counting the clock obtained from the programmable counting means. , a clock thinning means having a function of not outputting at least one clock of the basic clock based on the count data of the step counting means and the count data of the basic clock counting means, and an envelope counter for counting the clocks obtained from the clock thinning means. and a control means for controlling the envelope counting means, and outputs an envelope waveform having an exponential change.

A detailed explanation will be given below using the drawings.

FIG. 1 shows a system configuration diagram of an electronic musical instrument. The key operator unit 1 is composed of keys, switches, etc., and the key adjuster 2 detects the pressed key. The detection output is input to the scale register 3, envelope counter and status section 4. The scale register 3 is a register in which chords and the like of musical tones being sounded are stored. The data is the scale RO
It is output to M5 and accesses the address of ROM5.

This scale ROM 5 stores clock information corresponding to the key, and the data of the ROM whose address is accessed is output to the scale clock generator 6. The scale clock generator 6 generates a clock signal based on the data output from the ROM 5, ie, the clock information corresponding to the key, and outputs it to the waveform address counter 7. The waveform address counter 7 counts the clocks generated by the scale clock generator 6 mentioned above. This counter increments every time the clock is input. That is, the count value increases at a specific speed. The output of the waveform address counter 7 accesses the address of the waveform memory 8. The waveform memory 8 stores data for one wavelength of a musical tone to be generated, and its output is digital data corresponding to the musical tone.

On the other hand, in the key manual section, information corresponding to the speed at which the key is pressed is input to the touch control data generating section 9. The touch control data generation section 9 generates 3-bit data a, b, and c from the data, that is, the information corresponding to the speed of the press, and inputs it to the touch control clock generation section 10 and the envelope counter and status section 4. . The touch control clock generating section 10 uses the clock signal Eo obtained from the envelope clock generating section 11 and the aforementioned 3-bit data a, b.
, c, a clock E corresponding to the pressing speed is generated. The envelope counter and status section 4 generates envelope data by counting the aforementioned clock E. Further, the envelope counter and status section 4 outputs envelope data to the multiplication section 12 and also outputs status such as attack, decay, release, etc. to the envelope clock generation section 11. The multiplier 12 multiplies the waveform data obtained from the waveform memory 8 and the digital data obtained from the envelope counter and status section 4, and outputs the result to a digital/analog converter D/A (not shown). The digital data output from the multiplier 12 is a musical tone corresponding to the pressed key, and its amplitude value is digital data related to the speed at which the key was pressed. Although not shown in FIG. 1, this digital data enters the digital/analog converter D/A, and the waveform converted to an analog value is a musical tone corresponding to the pressed key, and its amplitude value is the same as the pressed key. For example, it is proportional to the speed. The system configuration shown in FIG. 1 is designed to simultaneously generate a plurality of sounds using a time division processing method.

FIG. 2 shows a circuit diagram of a first embodiment of the invention.

This first embodiment corresponds to the envelope counter and status section 4 in the system configuration diagram shown in FIG.

The clock signal E generated by the touch control clock generator 10 is the lower bit B of the addition input of the full adder FA.
o and is input to the AND gate 13. In the attack state, a low (L) level signal is input to the subtraction signal, so the full adder FA operates in the same way as an increment counter. In the release state, the subtraction signal is high (
Since the old veil is input, the full adder FA sets the carry output Co to H level and operates in the same way as a decrement counter. In addition, the full adder FA has a function to output the carry from the lower 3 bits, and its output E
3' is the signal E3 via exclusive logic OR gate EXOR.
Although not shown in FIG. 1, this signal is input to the touch control clock generator 10. Note that a subtraction signal is applied to one input terminal of this exclusive OR gate EXOR. AND gate 14 and exclusive logic OR game
) 15-1 to 15-3 constitute a circuit for detecting the maximum value of envelope data, and the outputs of 8-bit shift registers 16-1 to 16-9 are input to the inputs thereof.

FIG. 3 shows the relationship between touch data and the maximum value of the envelope. Set the H level to 1. The L level is indicated by O. When touch data a, b, and c are all at H level, the envelope maximum value is 63 in hexadecimal, and when all of them are at L level, it is 511.

That is, data obtained by inverting the logic of touch data a, b, and c corresponds to the upper three bits of envelope data EB.

The 8-bit shift register was provided to handle the pressing of multiple keys, that is, to be able to produce up to eight notes at the same time, and the correspondence between each bit and the pressed key is made by the key assigner 2. . That is, the outputs of the 8-bit shift registers 16-1 to 16-9 are input to the augend input Ao''Aa of the full adder FA,
Addition output 5o-88 of full adder FA is NOR gate 22
-1 to 22-9, and input to shift registers 16-1 to 16-8 via 23-1 to 23-9, forming a loop-shaped shift memory. Noah Gate 23-1~23-
9 and orday 1-24-1 to 24-3 are attack signals A
This is a gate circuit that inputs L level to shift registers 16-1 to 16-9 when TT and control signal CON are input. NOR gates 22-1 to 22-9 and ant games 125-1 to 25-3 are circuits that input the maximum value when a preset signal is input, that is, in a released state, and touch data a, b, and c are inverted. 8
Bit shift 1 - registers 16-9 to 16-7, OR gates 24-3 to 24-1 and NOR gates 23-9 to 23-
7.

Furthermore, H level is input to all of the 8-bit shift registers 16-6 to 16-1. This input state is made by the basic clock φ1.

As described above, the outputs of the 8-bit shift registers 16-1 to 16-9 are input to the circuit for detecting the required maximum value of the envelope data, and are also input to the OR gates 26-1 to 26-2.
6-6 and Noah Gate 27-1 -27-3, 28-
1 to 28-3 and output as envelope data EB.

In the decay state, the decay signal DC is input, and the lower 6 bits of the envelope data all become H level.
The upper 3 bits are the touch data c via AND gates 29-1 to 29-3 and NOR gates 28-1 to 28-3.
, b, and a are inverted and output as envelope data EB.

That is, the maximum value corresponding to the touch data shown in FIG. 3 is output.

Half adder HA, shift register 17-1゜17
-2. ANDGATE 113-1. l8-2゜19-1.
19-2. The inverters 20 and 21 are circuits that store and generate statuses indicating the sounding state of the pressed key, that is, the attack, release, and decay states. 8-bit shift register 1' used in this circuit
7-'1.17-2 are provided to enable simultaneous sound generation, similar to the 8-bit shift registers 16-1 to 16-9 that store the envelope data described above, and each bit and the pressed The key assigner 2 makes correspondence between the keys. Shift register 17-1.17-
The outputs of the half adder HA are input to the addend inputs Ao, A+, and the addition outputs So, S+ of the half adder HA are input to the NOR gates 19-1. Nantes Gate 19-2.18-1.1
The signal is input to shift registers 17-1 and 17-2 via 8-2, forming a loop-shaped shift memory. An attack signal ATT, a decay signal DC, a release signal REL, and a preset signal PS are generated by a control circuit (not shown) by the output signals of the shift registers 17-1, 17-2.

ANDGATE 30. Orgate 31. The exclusive OR gate 32 constitutes a gate circuit that changes the status part state from attack to decay, and inputs an H level to the addition input of the half adder HA when the output of the shift register reaches the maximum value.

FIG. 4 shows a timing chart of the first embodiment of the present invention shown in FIG. (al is the status part, (bl is
, (C1, (dl, (81, ff1. (gl,
(hl is attack signal A, T T , release signal R
EL, recent signal PS, subtraction signal, carry signal C, decay signal, control signal, (1) is envelope counter output, 01 is envelope data E
B is shown respectively.

The operation of the first embodiment of the present invention will be explained in more detail below with reference to FIG.

Key presses are detected by the key assigner 2. Furthermore, channels not used by the key assigner 2, that is, each register 16-1 to 16-9.17-1.1 in FIG.
An unused register is selected in steps 7 to 2, and an attack signal A T T + is input at the corresponding position of the internally rotated data.

In this state, H level, ■, and level are input to the shift registers 17-1 and 17-2, respectively. In addition, the shift register 16 is activated by the attack signal A T T +.
I and level are input to all bits from -1 to 16-9. In other words, the data in the corresponding channel position of the shift register is cleared.

After the attack signal A T T + is input, the data is incremented every time the clock signal E is input. This state continues until the content reaches the maximum amplitude value specified by the touch data. Shift register 16-
When the contents of AND gates 1 to 16-9 become equal to the aforementioned maximum amplitude value, an H level is output from AND gate 1-14, and AND gate 30. The carry signal C+ is passed through the OR gate 31 to the input BO of the half adder with the same timing as the clock.
is input. This signal is also input to the control circuit. When the control circuit receives this carry signal C1 in the attack state, it outputs the control signal CON+ and sets the contents of the shift registers 16-1 to 16-9 to L level. This signal causes the status to decay. That is, it is incremented by a half adder,
The shift register 17-1 is at L level, and the shift register 18-1 is at H level. This register 17-1゜1
The control circuit receives the signal 7-2 and outputs a decay signal DC+. Due to the decay signal DC+, the data in the shift register is not output, and the maximum amplitude value is output as the envelope data EB. That is, as described above, when the decay signal DC becomes H level, the OR gate 26
The outputs of -1 to 26-6 are at H level, and the lower 6 bits of envelope data EB are at H level. Further, the NOR gates 27-1 to 27-3 are set to L level, and the AND gates are turned on by the decay signal, and the touch data a, b, and c are inverted and outputted via the NOR gates 28-1 to 28-3. This state is the decay signal DC
Continues until + reaches L level. That is, the contents of the shift register are cleared by the aforementioned control signal CON+, and the contents are incremented again by the clock signal, and this continues until the carry signal C2 is output. This carry signal C2 causes the next state, that is, the release state. The decay signal DC+ goes to L level when the pressing of the key is forcibly interrupted.
This is when the content of has reached the maximum amplitude value.

In the state shown in time chart 1- of FIG. 4, the output of exclusive logic OR gate 32 is at L level, and furthermore, since ant gate 14 has detected the maximum amplitude value, carry signal C2 is output from OR gate 31. The contents of the half adder HA are incremented and the state is released.

In other words, since shift registers 17-1 and 17-2 both become H level, the control circuit makes a distinction and releases the release signal R.
It outputs EL I and also outputs a recent signal PS+. Further, since the full adder must be decremented in the released state, the status section outputs a subtraction signal.

Shift register 16-1 by precent signal PS+
~16-9 indicates the maximum amplitude value.

Since the subtraction signal remains at H level until the next carry signal C3 is output from OR gate 31, the contents of registers 16-1 to 16-9 are decremented each time clock E is input. Here, the carry signal C3 is output from the exclusive logic OR gate 32 via the OR gate 31 when the carry output Co of the full adder FA becomes L level.

As a result of the above-described operation, the output of the envelope counter, that is, the data in the registers 16-1 to 16-9, has the waveform shown in FIG. 4 (O), and the envelope data EB has the waveform shown in 01.

FIG. 5 shows a second embodiment of the invention, in which the circuit
This corresponds to the touch control clock generating section 10 in the system configuration diagram of the electronic musical instrument shown in the figure. The second embodiment of the present invention shown in FIG. 5 is functionally divided into a programmable counter section, an octal counter section, and a thinning counter section.

The programmable counter section has touch data a.

The base number of the counter changes depending on b and c.

In other words, a clock corresponding to the touch data is generated. This programmable counter section has a gate circuit of 33.8 bits and a shift register of 34-1, 34-2.
, Half Adder HA-1, Noah Gate 35-1~35-
3. Inverter 36-1~36-3.38-1~38-
6. Consists of AND gate 37.

The gate circuit 33 and inverters 38-1 to 38-6 output touch data a, b, c and shift registers 34-1 to 34-.
It has a logical function of determining whether or not to output the clock E3 via the AND gate 37 based on the contents of the clock E3. For example, touch data a.

When b and c are respectively at L and H levels, the contents of shift registers 34-3 to 34-1 are H and H, respectively.
, and outputs an H level to the AND gate 37. Note that in the gate circuit 33, ○ indicates the input of the AND gate, . indicates the input of the OR gate, horizontal lines 33-1 to 33-8 indicate the output of the AND gate, and vertical line 3 indicates the input of the AND gate.
3-9 functionally represent the outputs of the OR gates, which have a matrix structure.

That is, touch data a, b, c and register 34-3
The H level is input from the gate circuit 33 to the AND gate 37 in accordance with the contents of .about.34-1.

A clock E3 is also input to the AND gate 37, and as a result, the AND gate 37 outputs the clock E3 only when the output of the gate circuit 33 becomes H level. When the clock E3 is outputted via the AND gate 37, the NOR gates 35=1 to 35-3 output the I5 level. That is, the L level is input to the registers 34-1 to 34-3, the previous data is erased, and the registers 34-1 to 34-3 are reset.

The output of the AND gate 37 is the NOR gate 35-1 to 35-
3, if the output of the gate circuit 33 is at L level, the output of AND gate 37 is at L level, and the NOR gates 35-1 to 35-3 are half adder HA.
-1 addition output S.

~S2 outputs the data input via the inverters 36-1 to 36-3 to the registers 34-1 to 34-3. When touch data a, b, and c are all at L level, once every 8 clocks; when they are at L, L, and H levels, once every 7 clocks; when they are at L, H, and L levels, once every 6 clocks; , when the clock E3 is at H level, the AND gate 37 outputs the clock E3 once every five clocks. Also H, L, L level, H, L, H level, H, H.

L level, H2 fertilizer I (at level, 4 clocks, 3 rip: l tsuk, 2 clocks, 1 in 110 tsuk)
The clock E3 is output from the AND gate 37 each time. In other words, the programmable counter section receives touch data a and b.

It has a function of frequency-dividing the clock E3 in accordance with C. Further, the data becomes L level due to the reset signal. This frequency division controls the rate of change of the envelope and therefore the maximum amplitude value.

The octal power counter section includes shift registers 38-1, 38-2.
38-'3 Half Adder HA-2, And Gate 39
-1 to 39-3. Consists of 40 Impark. This octal force counter section counts the steps at the time of activation and release, and outputs the number of the step to the thinning counter section. Half adder HA-2 adds human power Bo and augend human power Ao to A3, and the output 5o=S2 is sent to 8-bit shift registers 38-1 to 38-3 via AND gates 39 to 1 to 39-3. Enter. That is, except at the time of reset when a reset signal is input, the clock obtained from the aforementioned programmable counter section is counted.

In the embodiment of the present invention, the amplitude of the envelope waveform is divided into eight parts corresponding to the touch data, and the slope of the first envelope waveform is determined according to the position thereof. This octal output count section counts the number of the envelope waveform.

The thinning count section is a gate circuit 41. Half adder HA-
3, Inverter 42-1~42-3゜43-1~43-
3. NOR gates 44-1 to 44-3.8-bit shift registers 45-1 to 45-3. Inverter 46. Consists of AND gate 47. The basic clock Ea is input to the addition manual Bo of the half adder HA-3, and the augend input Ao-
The outputs of shift registers 45-1 to 45-3 are input to A3. Calculation output S of half adder HA-3.

-S2 are inverters 43-1 to 43-3. noah gate 4
8-bit shift register 4 via 4-1 to 44-3
Input in 5-1 to 45-3. In addition, the outputs of the 8-bit shift registers 45-1 to 45-3 are transferred to the inverter 42-
It enters the gate circuit 41 via 1 to 42-3. The output of the gate circuit 41 is connected to the AND gate 4 via the in-hark 46.
Enter 7.

The basic clock Eft is also input to the Antogame 1.47. The 8-bit shift registers 45-1 to 45-3 and the half adder constitute an increment 1 counter, which is sequentially incremented by the basic clock Eo.

When a reset signal is input or other than at cent time, the gate circuit 41 outputs an H signal in response to the contents of the shift registers 45-1 to 45-3 and the 3-bit output from the octal counter section.
The level is output and the AND gate 47 is turned off via the inverter 46.

When AND gate 47 is turned off, the basic clock
Eo is not output.

The gate circuit 41 has a matrix structure like the gate circuit 33 described above, and 0 means an input of an ant game 1. and . means an input of an OR gate.

FIG. 6 is a diagram showing the output state of the clock in the thinning counter. ○ indicates a state in which the basic clock Eo is not output. All outputs of the octal power counter section are at L level (6th
In the figure, "0" corresponds to L level and "L" corresponds to H level), it is output for each clock, and all H
When it is at level, it is output once every 8 clocks. Further, for example, if the output of the octal power counter section is low and the L and H levels are low, the output will not be output once for every 8 clocks.

As a result, as the output value of the octal counter section increases, the number of clocks that are not output increases. This means that the envelope counter advances slowly. In other words, the output of the envelope counter increases slowly as the output of the octal force counter section increases.
Or reduce sip.

FIG. 7 shows the first embodiment of the present invention. 7 shows an envelope waveform according to a second example. Envelope waveform EB+ is when touch data a, b, and c are all at L level, and EB2 is when touch data a, b, and c are all at L level.
, b, c, high, H, and H levels are shown, respectively. As is clear from FIG. 7, each slope becomes gentler depending on the value obtained by dividing the amplitude value into eight.

Also, the slopes at attack and release are opposite. This is due to the characteristics of the present invention, and 8
It is obtained by memorizing the attack state and release state using a force counter, and its waveform changes exponentially.

In the embodiment of the present invention, the same basic clock E8 was used for attack, decay, and release. This is an attack,
Dikejin Released state time will be the same. However, Attack 5 Day Kay.

This can be changed by changing the basic clock in accordance with the release state. In that case, the frequency of the basic clock Eo may be controlled by supplying the output of the shift register 17-1, 17-2 shown in FIG. 2 to the envelope clock generating section 11.

The present invention has been described in detail using examples of the present invention. According to the present invention, an envelope waveform corresponding to a key touch can be digitally generated using a simple circuit, and the waveform changes exponentially, so it generates a sound that is close to the actual musical sound generated by a musical instrument and is easy to hear. It becomes possible to obtain an electronic musical instrument that performs the following functions.

[Brief explanation of drawings]

Fig. 1 is a system configuration diagram of an electronic musical instrument, and Fig. 2 is a system configuration diagram of an electronic musical instrument. FIG. 5 shows the first embodiment of the present invention. A circuit diagram of the second embodiment, FIG. 3 is a diagram showing the relationship between touch data and the maximum envelope value,
FIG. 4 is a time chart 1 of the circuit according to the first embodiment of the present invention.
・FIG. 6 is a diagram showing the daily counter output and the timing at which the clock is not output, and FIG. 7 is a waveform diagram obtained by the embodiment of the present invention. 16-1~16-9.17-1.17-2゜34-1~
34-3.38-1~38-3.45-1~45-3・
...8-bit shift register, FA...full adder, HA, HA-1 to HA-3...half adder, 19-
1.22-1~21-9.23-1~23-9.27=
1~27-3.28-1~28-3.35-1~35-
3.44-1 to 44-3... Noah Gate, 18-1.18-2.19-2... Nantes Gate, 24-1 to 24-3. 26-1~26-6゜31...
・Or Gate, 13.14.25-1~25-3.29-1~29-3
．． 30, 37.39-1~39-3°47...AND gate, 15-1~15-3.32. EXOR...Exclusive logical OR gate, 20.21.38-1 to 38-6.36-1 to 36-3
．． 40.42-1~42-3.43-1~43-3.4
6... Inverter, 33.41... Gate circuit. Patent applicant Casio Computer Co., Ltd. agent patent attorney
Yoshiyuki Osuga Figure 3 Figure 4 5l (d) PS Figure 6 Figure 7

Claims (2)

[Claims] (1) In an envelope waveform generation device for an electronic musical instrument having a keyboard, a touch control data generation means outputs a value related to the pressing speed of a key, a basic clock generation means generates a basic clock, and a basic clock is counted. basic clock counting means for counting clocks corresponding to the basic clock and generating clocks related to touch data; step counting means for counting clocks obtained from the programmable counting means; and step counting means for counting the clocks obtained from the programmable counting means. clock thinning means having a function of not outputting at least one clock of the basic clock based on the count data of the basic clock counting means and the count data of the basic clock counting means; an envelope counting means for counting the clocks obtained from the clock thinning means; 1. A touch response device for an electronic musical instrument, comprising a control means for controlling a counting means and outputting an envelope waveform having an exponential change. (2) The control means has a memory circuit for storing attack, decay, and release states, and in the attack and decay states, the envelope counting means is reset and counts up until it matches the touch data, and in the release state, the envelope counting means is incremented until it matches the touch data. Claim 1, characterized in that control is performed to preset and count down, output the count data of the envelope counting means as envelope data in the attack and release states, and output touch data in the decay state.
A touch response device for an electronic musical instrument as described in Section 1.