JPS5912179B2 - liquid crystal display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to display devices, particularly monolithic matrix displays.

An object of the present invention is to provide an inexpensive matrix display device that takes measures against failures of transistors that address a matrix display, greatly improves the manufacturing yield of the display.

Traditionally, matrix displays such as character displays and graphic displays are all C, R, and J.
It is a large device, requires high voltage and high current, and is heavy, making it unsuitable for portable use.
Therefore, in recent years, plasma displays, EL) LEDs, and LCDs have been developed as thin, small, and low-power display devices.
has been researched and put into practical use, but in most cases, the segment method is the main method of display, and C.
Matrix (array) displays that could replace R, J, are still in the research stage. The first example shows an example of a method for configuring a matrix array using the plasma display, EL, LED, and LCD.
It is a diagram.

X1 to X5 are a plurality of gate lines, and a plurality of source lines Y are provided perpendicularly to the gate lines and insulated from -Y8. Accordingly, when an arbitrary pixel, for example, pixel A, is to be turned on, it is done by applying a voltage to the gate line X2 and the source line Y4. FIG. 2 shows an example of the configuration of pixel A in FIG. 1.

Tr4 is a transistor for pixel selection, 1 is a display material, and a display signal is applied through the transistor to make it blink. The gate electrode of the transistor Trl is connected to the gate line X2, the source electrode is connected to the source line Y4, the drain is connected to one electrode sandwiching the display material, and the other electrode is grounded. As described above, when configuring a matrix array, the number of pixel selection transistors is extremely large. For example, when configuring an array with 100 gate lines and 100 source lines, the number of transistors required The number is 100x100 = 10,000. When considering the process C, the yield of an IC with one element is low, and naturally the yield of a matrix display is also low. This is one of the reasons why matrix displays using plasma, EL, LED, and LCD are extremely expensive and difficult to put into practical use. The present invention eliminates the above-mentioned drawbacks, provides failure countermeasures for pixel selection transistors, and significantly improves the manufacturing yield of displays, thereby reducing manufacturing costs and promoting the practical use of thin displays. . One embodiment of the present invention is shown in FIG. 3, which shows the configuration of one pixel.

Xl, X', r are a set of gate lines in one row of the matrix array, and Y is a source line. Tr4 and Tr5
is a nonvolatile memory such as FAMOS, and Tr2,
Tr3 is a transistor for pixel selection, and 2 is a display material. When operating this circuit, first, Tr4 or T
Apply a voltage to the control gate of r5 through the gate line X' or r, and set this memory transistor to "0N".
state, pixel selection transistors Tr2 and Tr3
Check the operation. In this case, the voltage applied to the control gates of the memory transistors Tr4 and Tr5 must be at a level desired to write information as a memory element. Next, for example, among the pixel selection transistors Tr2 and Tr3, Tr2 is defective, and Tr2 is defective.
If 3 is good, use gate line X' and source line Y,
The memory transistor Tr5 is written into the "ON" state semi-permanently.

As a result, the third
When the pixel shown in the figure is selected, the transistor Tr3, which is a good product, is always used as the pixel selection transistor Shioichi. As in this example, if two transistors are prepared to select one pixel display body 2, at least one of them will operate normally, and both transistors will be defective. The probability of this occurring is extremely low, and therefore, it can be expected that the product yield will be significantly improved. The circuit used for this troubleshooting of the pixel selection transistor is not limited to the one shown in FIG. 3 of the embodiment, and the elements used for the troubleshooting are also limited to nonvolatile memories such as FAMOS. As described above, the present invention arranges a plurality of selected pixel transistors in each of the liquid crystal pixel electrodes arranged in a matrix, checks whether each transistor is good or bad, and sends an image display signal to only the good transistors. By connecting the supplied fixed memory, it is possible to configure correction means for all pixels arranged in a matrix, and therefore it is possible to configure correction means for all pixels arranged in a matrix, without having to prepare any preliminary parts for this purpose. can be corrected for.

Furthermore, in the past, when there was a defective transistor, it was impossible to display pixels in the entire line where the transistor existed, but this invention has the effect of completely solving this problem. Furthermore, the fixed memory allows checking whether each transistor is a good product before the final image display is possible, greatly contributing to quality control and yield improvement in the manufacturing process. It has a contributing effect.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of a method of configuring a matrix array. FIG. 2 shows an example of the structure of a pixel in a conventional matrix display, and FIG. 3 shows an example of the structure of a pixel in a matrix display according to the present invention. be. X1 X5, x, x', r: Gate line, Y1ゞY8'Y: Source line, Trl, Tr2, T
r3: pixel selection transistor, Tr4, Tr5: memory transistor, 1, 2: display material.

Claims (1)

[Claims] 1. In a liquid crystal display device in which a liquid crystal is sandwiched between upper and lower substrates, and pixel electrodes for driving the liquid crystal are arranged in a matrix on the substrates, a plurality of pixel selection transistors are connected to each pixel, and the pixel selection transistor is connected to each pixel. A liquid crystal display device characterized in that a fixed memory is connected to each of the transistors to check the operating state of the transistor and to supply an image display signal to only those transistors that are found to be non-defective as a result of the check.