JPS59117305A - Fm demodulating circuit - Google Patents

Abstract

PURPOSE:To suppress noises at a weak input by AM-detecting an output of a phase shifter added to a quadrature detector and attenuating linearly a gain of an FM detector when the result of AM detection is a prescribed level or below. CONSTITUTION:An FM signal is inputted to an intermediate frequency amplifier 22 from an input terminal 20 and amplified, then distributed into two; one is inputted directly and the other is inputted through a phase shifter 24 to the FM detector 26, where the quadrature detection is executed. The output of the phase shifter 24 is inputted also to an AM detector 30, this AM-detection output is compared with a preset reference value by a comparator 32, and when a detected DC level is lower than the reference value, the gain of the FM detector 26 is suppressed continuously. Thus, a side peak part is unsharpened and although a signal S similar to a signal generated in a conventional system is generated at tuning, noises are suppressed when the tuning state is moved to a non- tuning state, the output is brought smoothly into a non-output state from the attenuating state, thereby preventing abnormal sound produced by sudden muting.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an FM demodulation circuit, and particularly to an FM demodulation circuit.
The present invention relates to a demodulation circuit that controls an FM demodulation gain according to the input level of a frequency modulation signal.

FIG. 1 shows the demodulation characteristics of the FM demodulation circuit, where A shows the S-curve characteristic and B shows the demodulated signal component obtained by this S-curve characteristic. In B, a normal/demodulated signal like the signal S is obtained at the center of the S curve characteristic, but a highly distorted waveform like the signal Sn is obtained at the time of detuning and at the side peak.

Conventionally, in order to reduce noise at the time of such side peaks or weak input, an FM demodulation circuit to which a mute circuit is added, as shown in FIG. 2, has been used. That is, an FM signal converted to an intermediate frequency is applied to the input terminal 2 from a mixer section (not shown), and this FM signal is amplified by an intermediate frequency amplifier (IF) 4. The amplified output of the intermediate frequency amplifier 4 is subjected to FM detection by an FM detector 6 and then taken out from an output terminal 10 via an electronic volume 8.

Further, the output of the intermediate frequency amplifier 4 is given to a signal strength detection circuit 12, which detects the signal strength from the output of the intermediate frequency amplifier 4, and this detection signal is used to mute the weak input of the electronic volume 8. It becomes a signal. Also,
The detection output of the FM detector 6 is given to the S curve detection circuit 14, which detects the S curve,
When the DC voltage range set by the FM (S curve) demodulated DC voltage is exceeded, a side peak determination signal is generated. This site peak determination signal is input to the AND circuit 16 together with the detection signal of the signal detection circuit 12, and the AND circuit is performed. Therefore, only when there is a side peak determination signal, the output of the signal strength detection circuit 12 is given to the electronic volume 8 as a weak input mute signal, and the gain of the electronic volume 8 is attenuated in accordance with the weak input mute signal.

However, such FM demodulation circuits require a constant DC level to detect side peaks, making it difficult to drive at low voltages, and side muting occurs suddenly when a certain frequency width is exceeded, resulting in abnormalities. A sound is generated, and this abnormal sound causes auditory discomfort.

In addition, in such an FM demodulation circuit, it is impossible to control the electronic volume 8 only with the S curve detection circuit, and as shown in FIG.
Since the curve detection circuit 14 is required, there are drawbacks such as a complicated configuration and a large-scale system.

This invention performs AM detection on the output signal of the phase shifter added to the quadrature detector, and when the detected output is below a certain DC level, linearly attenuates the FM detection gain, thereby simplifying the configuration. The object of the present invention is to provide an FM demodulation circuit that can be driven at a low voltage.

The present invention includes a phase shifter that shifts the phase of an FM signal, an output signal of the phase shifter, and the FM signal, which extracts a desired signal component from these signals and adjusts the detection gain in accordance with a control signal. an enabled FM detector;
An AM detector performs AM detection on the output signal of the phase shifter, and the detected signal level obtained by this AM detector is compared with a preset reference DC level, and if the detected signal level is lower than the reference DC level, the FM detection is performed. 11. Generates a control signal that attenuates the detection gain of the detector according to the level.
A comparator that provides a control signal to the FM detector.

Embodiments of the invention will be described in detail with reference to the drawings. FIG. 3 shows an embodiment of the FM demodulation circuit of the present invention.

In the figure, an FM signal converted to an intermediate frequency is applied to an input terminal 20, and this FM signal is sent to an intermediate frequency amplifier 2.
It is amplified by 2. The output signal of the intermediate frequency amplifier 22 is input to the FM detector 26 via the phase shifter 24, and at the same time, is directly provided to the FM detector 26 without passing through the phase shifter 24. The phase shifter 24 is tuned to the carrier frequency of the FM signal and is configured to cause a phase shift delay of 90 degrees with respect to the center frequency.

The FM detector 26 is configured to extract a desired signal component from the intermediate frequency amplifier 220 FM signal and the phase-shifted FM signal obtained via the phase shifter 24, and in response to a control signal input. Detection gain is adjustable. In this embodiment, the FM detector 26 is composed of an Odoratcha detector, and its detection capability, that is, the detection gain, can be freely varied by the constant current value of a constant current circuit installed inside the detector. There is. The detected output of this FM detector 26 is then taken out from an output terminal 28.

Further, the output signal of the phase shifter 24 is given to an AM detector 30, and the detected signal of this AM detector 30 is given to a comparator 32. A base $ DC level is set in advance in the comparator 32 for the detected DC level formed by the AM detector 30, and the comparator 32 determines that the detected DC level is lower than the reference DC level based on the comparison between the two. At this time, a control signal for constant current adjustment to be given to the FM detector 26 is formed, and this control signal is given to the FM detector 26.

The operation of the above configuration will be explained with reference to FIG. The output signal of the intermediate frequency amplifier 22 is sent to the FM detector 2G.
The signal is input directly to the phase shifter 24 as well as via the phase shifter 24 . The output signal of the phase shifter 24 is detected by an AM detector 30, and the DC level (average value) of this detection output is detected by a comparator 32.
is given to the reference DC level and compared with the reference DC level. As a result,
When the detected DC level of the AM detector 30 is higher than the reference DC I/bevel set in the comparator 32, the detection ability of the FM detector 26 is maintained constant;
If the DC level of 0 is lower than the reference DC level set in the comparator 32, the comparator 32 generates a control signal that controls the detection gain of the FM detector 26. The detection gain of the FM detector 26 is continuously controlled in accordance with this control signal.

As a result, as shown in FIG. 4A, in the conventional S-curve characteristic, the side peak portion becomes slow as shown by the solid line.

Therefore, during tuning, the FM detector 26 generates a signal S similar to the conventional one, but since the side peak characteristics are slow, its detection output is in a continuous form like the signal Sn. This is a very small value. As a result, the deterioration of the demodulated output waveform during detuning is minimized, and
The output can be attenuated continuously and clearly as the detuning occurs. In particular, even when transitioning to a non-synchronized state, noise is suppressed and the output smoothly changes from an attenuated state to a no-output state, which reliably prevents the occurrence of abnormal sounds caused by sudden mute operations, which improves the auditory sense. Can relieve discomfort.

Further, according to such an FMfjuJ1 circuit, since the output of the phase shifter 24 is subjected to AM detection, the intermediate frequency component is detuned, and when the phase output includes an AM component, the output is suppressed. can do. In addition, for linear suppression of side peaks and weak input noise, site peak and weak noise suppression can be set externally, for example, by changing the resistance value, and the structure is simple and low voltage drive is possible. It is.

FIG. 5 shows a specific embodiment of the FM demodulation circuit of the present invention. In this embodiment, the same parts as in the previous embodiment are given the same reference numerals. An intermediate frequency signal is applied from the intermediate frequency amplifier 22 to the input terminals 34A and 34B. In this embodiment, a limiter amplifier 36 is installed before the FM detector 26. This limiter amplifier 36
are transistors 38, 40, 42, 44, constant current source 46
．． 48.50 and resistor 52.54.

The phase shifter 24 includes a capacitor 56, 58, 60 and a coil 6.
2, and the FM detector 26 is composed of a transistor 64.6.
6.68.70.72.74, diode 76.78.
80, capacitor 82.84, resistor 88.90.92.
94.96.98.100.102.104, a constant voltage source 105, and a constant current source 106. This F
An output circuit 108 is installed at the output section of the M detector 26,
This output circuit 108 is a transistor 110.112.1
14, diode 116, resistor 118 and constant voltage source 12
Consists of 0. and transistor 112.1
An output terminal 122 for extracting the FM detection output is formed at a common connection point of the 14 collectors.

The AM detector 30 includes a transistor 124 and a capacitor 12
6. Consisting of constant current sources 1 and 30, transistor 124
The output of the phase shifter 24 is given to the base of the phase shifter 24.

A voltage-current conversion circuit 131 that converts the voltage output of the AM detector 30 into a current is installed on the output side of the AM detector 30, and this voltage-current conversion circuit 131 includes transistors 132, 134, 136, 138, . 153, resistance 15
0 and constant current sources 156 and 158. The output of this voltage-current conversion circuit 131 is proportional to the AM detection output, is taken out from the collector of the transistor 136, and is applied to the comparator 32.

Comparator 32 is transistor 144.146.168.1
70.172 and constant current sources 162.174.175, and is configured to compare the base input DC voltage of the Lancistor 144 and the base input DC voltage of the transistor 146. An output terminal 176 is formed for taking out a comparison output, and the output of this output terminal 176 becomes a display input of a signal making circuit (not shown).

A reference DC potential is set to the bases of transistors 144 and 146 of this comparator 32 from a reference potential setting circuit 139. That is, this reference potential setting circuit 139 is composed of transistors 140, 142, diodes 148, resistors 152, and constant current sources 154, 160. A constant bias voltage is externally applied to an input terminal 141 formed at the base of the transistor 140 and an input terminal 143 formed at the base of the transistor 142.

A constant current variable control circuit 177 is installed on the output side of the comparator 32 in order to control the constant current of the FM detector 26 according to the comparison output and adjust its detection gain. This constant current variable control circuit 177 is connected to the transistor 17
8.180.182, diode 184, resistor 186.
188, 190 and a capacitor 192, and an external control input terminal 1'94 is formed at the connection point between the capacitor 192 and the resistor 186.
A resistor or the like is connected to and a muting control voltage is set. That is, the constant current variable control circuit 177 converts the control voltage generated from the comparator 32 into a control current, and controls the constant current flowing through the transistors 72 and 74 of the FM detector 26 in accordance with the control voltage. There is.

The operation of the above configuration will be explained. Phase shifter 24
The FM signal from the FM signal becomes the base input of the transistor 124, and after charging the capacitor 126, AM detection is performed. A detected voltage corresponding to the output of the phase shifter 24 is generated at the emitter of the transistor 124 . This detection output is applied to the base of the transistor 132 of the voltage-current conversion circuit 131, and as the detection voltage changes, the transistors 132 and 136
Current will flow into the collector of.

Here, the output voltage of the phase shifter 24 is Vs, and the AM detector 30
The conversion efficiency is η, and the output current of the constant current source 156 is 1156
Then, the transistor 13 of the voltage-current conversion circuit 131
The current Ic sucked from the collector of 2.136 is given by IC=2η・Vs・ll56/VT (1). However, VT is the thermoelectromotive force of the transistor. Then, the resistor 152, the diode 148, and the constant current source 156 convert the converted current into a voltage again in a form that matches the reference voltage of the comparator 32.

Also, the output current of the constant current source 154 is set to [154, the resistor 15
If the resistance value of 2 is R152, the output V' of the phase shifter 24 is
The converted voltage Vc generated when s changes is as follows: Vc=2η·Vs−gm−R152+VF+F2=2η−Vs−gm8R+sz (2). However, in equation (2), gm is the mutual conductance of the transistor, and VFI is the current (1, +s4+
The base-emitter voltage of the transistor due to Ic),
VF2 is the base-emitter voltage of the transistor due to the current 1154. Then, the voltage Vc is Vc-A・
This voltage is generated across the resistor 152 and the diode 148.

Comparator 32 performs a comparison of the base input DC voltages for transistors 144.146, but not for transistors 140.146.
When a bias of a certain constant potential is set to the base of transistor 142, the base input voltage (ie, differential input voltage) of transistors 144 and 146 is proportional to the voltage Vc and proportional to the voltage Vs.

Therefore, the output of the phase shifter 24 is generated, the voltage generated between the terminals of the resistor 152 and the diode 148 increases, and when the base current of the transistor 144 becomes lower than the base voltage of the transistor 146, the collector current of the transistor 144 increases. becomes large, and this current (・transistor 166.
It is inverted at 172. The collector current and constant current source 17
The muting control voltage generated at the external control input terminal 194 is determined by the product of the difference current from the output constant current of 5 and the resistor 186.188 and the forward voltage of the diode 184. Namely 1. By adding a resistor to the external control input terminal 194, the output current of the constant current source 175 can be adjusted, so the muting control voltage can be freely controlled from the outside.

This control voltage is converted into a current by a constant current variable control circuit 177, and changes the operating current of a quadrature detector constituting the FM detector 26. That is, the external control input terminal 194
When a voltage is generated, current flows through resistors 186 and 188 and diode 184, and transistor 178 and resistor
A sinking current is generated in the current mirror circuit. This current is reversed by a current mirror circuit of transistors 180.182, and resistors 8B, 90.92.
94, increasing the emitter potential of transistor 72.74 and decreasing the current flowing through transistor 72.74. As a result, the detection gain of the FM detector 26 decreases, causing muting in the demodulated output.

In this way, in this FM demodulation circuit, the external control input terminal 1
A resistor is added to 94 to control the control voltage, and the FM detector 2
The demodulation gain of 6 can be freely set by adjusting the drain current to 1 lil. In addition, external control input terminal 19
4, the reference voltage set in the comparator 32 and the output level of the AM detector 30 are compared as explained in the previous embodiment, and based on the comparison output, The control output from the constant current variable control circuit 177 is the resistor 88
．． 90 connection points are provided.

In this embodiment, the output of the limiter amplifier 36 is supplied to the double-balanced multiplier constituting the FM detector 26 via capacitors 82 and 84 with the DC component cut off, ensuring stable operation. can do. Also,
By supplying current to emitter resistors 92 and 94 of the differential amplifier constituted by transistors 72 and 74, the detection ability can be lowered and a mute function can be achieved.

Moreover, according to such a configuration, it is possible to operate at a reduced voltage of about 1.4 V, and detuning and soft muting at the time of weak input are possible. Moreover, an arbitrary voltage can be set to the external control input terminal 194. By doing so, it is possible to set a desired detection gain without setting constants of circuit elements.

Furthermore, since this embodiment uses a quadrature detector as the FM detector 26, it has better voltage reduction characteristics than a peak detector, and also has better voltage reduction characteristics than a ratio detector. There are also advantages such as fewer external parts and an extremely simple configuration.

Moreover, FIG. 6 shows another specific embodiment of this invention,
The same parts as those in the circuit shown in FIG. 5 are given the same reference numerals. That is, the input terminals 34A and 34B are provided with the output signal of the intermediate frequency amplifier 22 as in the previous embodiment, the limiter amplifier 36 is configured in the same manner as in the previous embodiment, and the phase shifter 24 is
is capacitor 56.58, coil 62 and resistor 196
It is made up of. Further, the FM detector 26 includes transistors 64.66.68.70.72.74.198.2
00.202, diode 204.205.206.2
07, resistor 208, 210, 212 and constant current source 214
．． 216.217. transistor 64
．． A constant bias is applied to the input terminal 218 formed at the base of the transistor 70, and the output terminal 2 formed from the collector of the transistor 66, 70 via the output circuit 108 is applied.
The demodulated output is taken out from 20.

In this embodiment, a variable constant current source is configured by transistors 200, 202 and resistors 208, 210, a constant bias is set to the base of transistor 202, and the base of one transistor 2°O is muted. A control input terminal 220 to which an input is applied is formed. Further, the output circuit 108 has a similar configuration to the circuit shown in FIG.

According to such a configuration, the current flowing through the transistors 72 and 74 is controlled according to the control voltage applied to the control input terminal 220, a desired mute is provided, and noise is linearly suppressed at signal peaks and weak inputs. is possible, and its settings can be easily made from the outside.

As explained above, according to the present invention, the phase shifter output is
Since M detection is used, when the intermediate frequency component of the phase shifter output contains an AM signal due to detuning, the demodulated output can be suppressed, and noise at the time of side peaks and weak input can be linearly suppressed. The settings can be easily made from the outside, the configuration is simple, and moreover, it can be driven with a low voltage.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram showing the operating characteristics of a conventional FM input device, FIG. 2 is a block diagram showing the configuration of a conventional FM demodulation circuit, and FIG. 3 is a block diagram showing an embodiment of the FM demodulation circuit of the present invention. 4 are explanatory diagrams showing its operating characteristics, and FIGS. 5 and 6 are circuit diagrams showing specific embodiments of the FM demodulation circuit of the present invention. 24... Phase shifter, 26... FM detector, 30...
AM detector, 32... comparator. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] A phase shifter that shifts the phase of an FM signal, an output signal of this phase shifter, and the FM signal are provided, and a desired signal component is extracted from these signals, and the detection gain can be adjusted in accordance with a control signal. An FM detector, an AM detector that performs AM detection on the output signal of the phase shifter, compares the detected signal level obtained by this AM detector with a preset reference DC level, and determines that the detected signal level is higher than the reference DC level. A comparator that generates a control signal that attenuates the detection gain of the FM detector according to the level when the level is low, and supplies this control signal to the FM detector.
Demodulation circuit.