JPS59111373U - audio cancellation circuit - Google Patents
audio cancellation circuitInfo
- Publication number
- JPS59111373U JPS59111373U JP536083U JP536083U JPS59111373U JP S59111373 U JPS59111373 U JP S59111373U JP 536083 U JP536083 U JP 536083U JP 536083 U JP536083 U JP 536083U JP S59111373 U JPS59111373 U JP S59111373U
- Authority
- JP
- Japan
- Prior art keywords
- audio
- input terminal
- cancellation circuit
- voltage
- mute
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Television Signal Processing For Recording (AREA)
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は音声消去回路を関係回路と共に示す概略説明図
である。第2図は従来の音声消去回路を示す回路図であ
る。第3図は従来の異なる音声消去回路例を示す回路図
である。第4図は本考案を実施した音声消去回路を示す
回路図である。
17・・・音声IF−IC,20・・・入力端子、34
・・・ミュート電圧を印加する手段、Ql・・・増幅ト
ランジスタ、Pie’ P ’ 1・・・ミュート電圧
。FIG. 1 is a schematic explanatory diagram showing a voice cancellation circuit together with related circuits. FIG. 2 is a circuit diagram showing a conventional voice cancellation circuit. FIG. 3 is a circuit diagram showing an example of a different conventional audio cancellation circuit. FIG. 4 is a circuit diagram showing a voice cancellation circuit embodying the present invention. 17... Audio IF-IC, 20... Input terminal, 34
. . . Means for applying mute voltage, Ql . . . Amplification transistor, Pie' P ' 1 . . . Mute voltage.
Claims (1)
接続された音声IP・ICの前記入力端子に該入力端子
を通常動作時の電圧範囲よりも高電位若しくは低電位に
設定するミュート電圧を印加する手段を接続して前記ミ
ュート電圧印加時に前記増幅トランジスタを飽和若し゛
くは遮断状態にするようにしたことを特徴とする音声消
去回路。Means for applying a mute voltage to the input terminal of the audio IP/IC whose base of the amplification transistor is connected to the audio IF signal input terminal to set the input terminal to a higher potential or lower potential than the voltage range during normal operation. A sound canceling circuit characterized in that the amplifying transistor is brought into a saturated or cut-off state when the mute voltage is applied by connecting the mute voltage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP536083U JPS59111373U (en) | 1983-01-17 | 1983-01-17 | audio cancellation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP536083U JPS59111373U (en) | 1983-01-17 | 1983-01-17 | audio cancellation circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59111373U true JPS59111373U (en) | 1984-07-27 |
Family
ID=30136948
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP536083U Pending JPS59111373U (en) | 1983-01-17 | 1983-01-17 | audio cancellation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59111373U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5812414A (en) * | 1981-07-15 | 1983-01-24 | Sanyo Electric Co Ltd | Sound muting circuit |
-
1983
- 1983-01-17 JP JP536083U patent/JPS59111373U/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5812414A (en) * | 1981-07-15 | 1983-01-24 | Sanyo Electric Co Ltd | Sound muting circuit |
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