JPS59110230A - Interframe signal monitoring system - Google Patents

Interframe signal monitoring system

Info

Publication number
JPS59110230A
JPS59110230A JP57220689A JP22068982A JPS59110230A JP S59110230 A JPS59110230 A JP S59110230A JP 57220689 A JP57220689 A JP 57220689A JP 22068982 A JP22068982 A JP 22068982A JP S59110230 A JPS59110230 A JP S59110230A
Authority
JP
Japan
Prior art keywords
circuit
transmitter
level
output
mounting information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57220689A
Other languages
Japanese (ja)
Inventor
Hajime Yamazaki
一 山崎
Ryoichi Shinoda
篠田 良一
「よう」 勝博
Katsuhiro Yo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57220689A priority Critical patent/JPS59110230A/en
Publication of JPS59110230A publication Critical patent/JPS59110230A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/46Monitoring; Testing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)

Abstract

PURPOSE:To find trouble speedily by generating a warning by a reception-side error detecting circuit in response to the breaking of a mounting information signal when a transmission part is mounted. CONSTITUTION:The mounting information line 9 is provided between a transmitting frame 1' and a receiving frame 2', and the line 9 is released when a transmission part 3' is mounted on the side of the transmitting frame 1' or grounded when not. The output of the line 9 is ANDed by the AND circuit 11 in the receiving frame 2' with the output of a mounting information line 8 after passing through an inverter 10, and the result is supplied to the error detecting circuit 6. When the transmission part 3' is mounted and a signal line 7 and the mounting information lines 8 and 9 are normal, the output of the circuit 11 is at a level L, and when abnormal, the output is also at the level L, so that the circuit 6 generate a warning.

Description

【発明の詳細な説明】 (a)  発明の技術分野 本発明は送信部を実装する送信部と受信部を実装する受
信架間の信号の異常を、送信部が実装されている場合は
該受信架の誤シ検出回路で検出して警報を発し、送信部
が未実装の場合はff、報の発生を禁示する装置に係シ
、送信部実装時は、未実装の場合警報の発生を禁止する
ための実装情報線が断になっても信号線の断を含め信号
に異常があれば誤シ検出回路よシ警報を発する架間信号
監視方式に関する。
Detailed Description of the Invention (a) Technical Field of the Invention The present invention detects an abnormality in a signal between a transmitting unit equipped with a transmitting unit and a receiving frame equipped with a receiving unit. If the transmitter is not installed, the error detection circuit of the rack detects it and issues an alarm, and if the transmitter is not installed, it is ff. The present invention relates to an interframe signal monitoring system in which an error detection circuit issues an alarm if there is an abnormality in the signal, including a disconnection of the signal line, even if the mounting information line for prohibition is disconnected.

(b)  従来技術と問題点 第1図は従来例の架間信号監視方式の回路構成を示すブ
ロック図である。
(b) Prior Art and Problems FIG. 1 is a block diagram showing the circuit configuration of a conventional interframe signal monitoring system.

図中1は送信部、2は受イa架、3は送信部、4はドラ
イバ、5はレジーバ、6は誤シ検出回路、7は信号線、
8は実装情報線、R3は抵抗をボす。
In the figure, 1 is a transmitter, 2 is a receiving rack, 3 is a transmitter, 4 is a driver, 5 is a receiver, 6 is an error detection circuit, 7 is a signal line,
8 is a mounting information line, and R3 is a resistor.

第1図では送信部1の送信部3のドライバ4及び信号!
7を介し受信部2のレシーバ5に送信されるディジタル
信号の異常を、パリティ−チェック等の方法で誤シ検出
回路6にて監視し異常があれば警報を発している。この
ような場合送信部3が未実装の場合は警報を発しなくす
るよう実装情報&18を用い送信部1側は送信部3が未
実装時には開放で実装時には接地するようにし、受信部
2側は誤勺検出回路6に接続し、この接続部には抵抗R
3を介して+5vが供給しである。このようにすること
によシ送信部3が未実装の時は実装情報線8の[検出回
路6への入力部FiHレベルとなり、送信部1側から信
号が来なく異常であっても誤シ検出回路6は警報を発し
なくしている。当然送信部3が実装されていれば実装情
報線8はアースされ誤p検出回路6への入力はLレベル
であるので、送信部3よシ送信されるディジタル信号に
異常があれば誤り検出回路6は異常を検出して警報を発
する。しかしこの回路では送信部3が実装されている場
合、信号線7の断を含み信号に異常があり警報を発せね
ばガらない場合に、実装情報線8が断であると誤ル検出
回路6の実装情報線8の入力はHレベルとなるので警報
を発せず障害の発見が敏速に出来ない欠点がある。尚信
号線7の断を含み信号の異常としたのは実装情報線8が
断となれば信号f5!7も同時に断となることが多いた
めである。
In FIG. 1, the driver 4 of the transmitter 3 of the transmitter 1 and the signal!
An error detection circuit 6 monitors the abnormality of the digital signal transmitted to the receiver 5 of the receiving section 2 via the receiver 7 by a method such as a parity check, and issues an alarm if there is an abnormality. In such a case, if the transmitter 3 is not installed, the mounting information &18 is used to prevent the alarm from being issued.The transmitter 1 side is open when the transmitter 3 is not installed, and is grounded when it is installed, and the receiver 2 side is Connected to the error detection circuit 6, and a resistor R is connected to this connection.
+5v is supplied via 3. By doing this, when the transmitter 3 is not mounted, the input part of the mounting information line 8 to the detection circuit 6 will be at the FiH level, and even if there is no signal from the transmitter 1 side and there is an abnormality, an erroneous signal will be detected. The detection circuit 6 does not issue an alarm. Naturally, if the transmitter 3 is mounted, the mounting information line 8 is grounded and the input to the error p detection circuit 6 is at L level, so if there is an abnormality in the digital signal transmitted from the transmitter 3, the error detection circuit 6 detects an abnormality and issues an alarm. However, in this circuit, when the transmitter 3 is mounted, if there is an abnormality in the signal including a disconnection of the signal line 7 and an alarm must be issued, the error detection circuit 6 Since the input of the mounting information line 8 is at H level, there is a drawback that no alarm is issued and failures cannot be discovered quickly. The reason why the disconnection of the signal line 7 is regarded as a signal abnormality is that when the mounting information line 8 is disconnected, the signal f5!7 is often disconnected at the same time.

(e)  発明の目的 本発明の目的は上記の欠点に鑑み、送信部実装時実装情
報線が断になった場合でも信号線の断を含み信号が異常
になれば誤9検出回路よシは警報を発する架間信号監視
方式の提供にある。
(e) Purpose of the Invention In view of the above-mentioned drawbacks, the purpose of the present invention is to prevent the error 9 detection circuit from being removed even if the mounted information line is disconnected when the transmitter is mounted, if the signal becomes abnormal including the disconnection of the signal line. The purpose of the present invention is to provide a system for monitoring signals between frames that issues an alarm.

(d)  発明の構成 本発明は上記の目的を達成するために、送信部を実装す
る送信部と受信部を実装する受信架間の信号の異常を、
送信部が実装されている場合は、該受信部の誤シ検出回
路で検出し警報を発し、送信部が未実装の場合は警報の
発生を禁示する装置において、該送信部受信架間に第1
.第2の実装情報線を設は各々の送信架側は送信部が実
装された場合は接地及び開放とし、未実装の場合は開放
及び接地となるようにし、受信架側では該第1の実装情
報線はアンド回路の第1の入力に接続し、該第2の実装
情報線はインバータ回路を介し1髪ンド回路の第2の入
力に接続し又該第1の入力及び該インバータの入力には
Hレベルを与えておき、該アンド回路の出力を誤り検出
回路に接続し、送づれか一方又は両方共析となった時は
Lレベルとし、該アンド回路の出力がLレベルで該誤シ
検出回路が誤シを検出した時は警報を発することを特徴
とする。
(d) Structure of the Invention In order to achieve the above object, the present invention detects an abnormality in a signal between a transmitting section in which a transmitting section is mounted and a receiving frame in which a receiving section is mounted.
If the transmitter is installed, the error detection circuit of the receiver detects it and issues an alarm, and if the transmitter is not installed, the device prohibits the generation of an alarm. 1st
.. A second mounting information line is installed on each transmitting rack so that it is grounded and open when the transmitter is mounted, and open and grounded when it is not mounted, and on the receiving rack side, it is connected to the first mounting information line. The information line is connected to a first input of the AND circuit, and the second implementation information line is connected to a second input of the single-AND circuit via an inverter circuit, and the second implementation information line is connected to the first input and the input of the inverter. is given an H level, and the output of the AND circuit is connected to an error detection circuit, and when one or both of the transmissions result in co-analysis, it is set to an L level, and when the output of the AND circuit is at an L level, the error detection circuit is connected to the error detection circuit. It is characterized in that it issues an alarm when the detection circuit detects an error.

(e)  発明の実施例 以下本発明の1実施例につき図に従って説明するO 第2図は本発明の実施例の架間信号監視方式の回路のブ
ロック図である。
(e) Embodiment of the Invention An embodiment of the invention will be described below with reference to the drawings. FIG. 2 is a block diagram of a circuit for an interframe signal monitoring system according to an embodiment of the invention.

図中第1図と同一機能のものは同一記号で示す。Components in the figure that have the same functions as those in FIG. 1 are indicated by the same symbols.

1′は送信部、2′は受信部、3′は送信部、9は実装
情報線、10はインバータ、11はアンド回路、R3は
抵抗を示す。
1' is a transmitter, 2' is a receiver, 3' is a transmitter, 9 is a mounting information line, 10 is an inverter, 11 is an AND circuit, and R3 is a resistor.

第2図で第1図と異なる点は実装情報線9を設け、この
送信部1′側では送信部3′が実装された場合は開放で
未実装の場合は接地するようにしてあシ、又受信部2′
ではインバータ10を介し、実装情報線8と共に新しく
設けたアンド回路110入力に接続しアンド回路11の
出力を誤り検出回路6に接続した点である。尚実装情報
線8のアンド回路11の入力及び実装情報11i19の
インバータ10の入力には抵抗RHR11を介して+5
vが印加しである。このようにすることによシアンド回
路11の出力は、送信部3′が未実装の場合はHレベル
であり誤シ検出回路6よシ警報は発しないが、送信部3
′が実装され、信号線7実装情報線8,9が正常であれ
ばアンド回路11の出力はLレベルで、信号に異常があ
れば警報を発することは勿論、実装情報線8,9の両方
又はいづれか一方が断になってもアンド回路11の出力
はLレベルであるので、信号線7の断を含み信号が異常
になれば誤シ検出回路6は警報を発する。従って実装情
報線8,9が断であっても信号に異常があれば警報を発
するので障害の発見が迅速に出来る。
The difference between FIG. 2 and FIG. 1 is that a mounting information line 9 is provided, and on the transmitter 1' side, it is open when the transmitter 3' is mounted and grounded when it is not mounted. Also, the receiving section 2'
Here, the input of the newly provided AND circuit 110 is connected together with the mounting information line 8 via the inverter 10, and the output of the AND circuit 11 is connected to the error detection circuit 6. Note that +5 is connected to the input of the AND circuit 11 of the mounting information line 8 and the input of the inverter 10 of the mounting information 11i19 through a resistor RHR11.
v is applied. By doing this, the output of the CAND circuit 11 is at H level when the transmitting section 3' is not installed, and the error detection circuit 6 does not issue an alarm, but the output of the transmitting section 3'
' is mounted and if the signal line 7 mounting information lines 8 and 9 are normal, the output of the AND circuit 11 is L level. Alternatively, even if one of them is disconnected, the output of the AND circuit 11 is at L level, so if the signal becomes abnormal including the disconnection of the signal line 7, the error detection circuit 6 issues an alarm. Therefore, even if the mounting information lines 8 and 9 are disconnected, if there is an abnormality in the signal, an alarm is issued, so that the fault can be discovered quickly.

(f)  発明の効果 以上詳細に説明せる如く本発明によれば、送信部実装時
実装情報線が断になっても、信号線の断を含み信号に異
常があれば受信側の誤り検出回路では警報を発するので
障害の発見が迅速に出来る効果がある。
(f) Effects of the Invention As explained in detail above, according to the present invention, even if the mounted information line is disconnected when the transmitter is mounted, if there is an abnormality in the signal including a disconnection of the signal line, the error detection circuit on the receiving side will be activated. Since this system issues an alarm, it has the effect of allowing troubles to be discovered quickly.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の架間信号監視方式の回路構成を示すブ
ロック図、第2図は本発明の実施例の架間信号監視方式
の回路構成を示すブロック図である0 図中1,1′は送信部、2,2′は受信架、3゜3′は
送信部、4はドライバ、5はレシーバ、6は誤シ検出回
路、7tj:信号線、8,9は実装情報線、10はイン
バータ、11はアンド回路、Ro。 R2は抵抗を示す。
FIG. 1 is a block diagram showing the circuit configuration of a conventional hoist signal monitoring system, and FIG. 2 is a block diagram showing the circuit configuration of a hoist signal monitoring system according to an embodiment of the present invention. ' is a transmitter, 2 and 2' are a receiving rack, 3°3' is a transmitter, 4 is a driver, 5 is a receiver, 6 is an error detection circuit, 7tj is a signal line, 8 and 9 are mounting information lines, 10 is an inverter, 11 is an AND circuit, Ro. R2 indicates resistance.

Claims (1)

【特許請求の範囲】[Claims] 送信部を実装する送信部と受信部を実装する受信架間の
信号の異常を、送信部が実装されている場合は、該受信
架の誤シ検出回路で検出して警報を発し、送信部が未実
装の場合は警報の発生を禁示する装置において、該送信
部受信架間に第1゜第2の実装情報線を設は各々の送信
架側は送信部が実装された場合は接地及び開放とし、未
実装の場合は開放及び接地となるようにし、受信架側で
は該第1の実装を情報線はアンド回路の第1の入第1の
入力及び該インバータの入力にはHレベルを与えておき
、該アンド回路の出力を誤シ検出回路に接続し、送信部
が未実装の時は該アンド回路の出力をHレベルとし、実
装時及び第1.第2の実装情報線のいづれか一方又は両
方共析となった時はLレベルとし、該アンド回路の出力
がLレベルで該誤シ検出回路が誤シを検出した時は警報
を発することを特徴とする架間信号監視方式。
If a transmitting unit is installed, the error detection circuit of the receiving rack detects an abnormality in the signal between the transmitting unit that is equipped with the transmitting unit and the receiving rack that is equipped with the receiving unit, and an alarm is issued. In a device that prohibits the generation of an alarm if the transmitter is not installed, the first and second mounting information lines are installed between the transmitter and receiver racks, and each transmitter is grounded if the transmitter is installed. and open, and if it is not mounted, it is open and grounded, and on the receiving rack side, the first mounting is connected to the information line, the first input of the AND circuit, and the input of the inverter is set to H level. The output of the AND circuit is connected to an error detection circuit, and when the transmitter is not installed, the output of the AND circuit is set to H level, and when the transmitter is installed and the first . When one or both of the second mounting information lines are eutectoid, the level is set to L level, and when the output of the AND circuit is L level and the false alarm detection circuit detects an false alarm, an alarm is issued. A system for monitoring signals between frames.
JP57220689A 1982-12-16 1982-12-16 Interframe signal monitoring system Pending JPS59110230A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57220689A JPS59110230A (en) 1982-12-16 1982-12-16 Interframe signal monitoring system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57220689A JPS59110230A (en) 1982-12-16 1982-12-16 Interframe signal monitoring system

Publications (1)

Publication Number Publication Date
JPS59110230A true JPS59110230A (en) 1984-06-26

Family

ID=16754936

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57220689A Pending JPS59110230A (en) 1982-12-16 1982-12-16 Interframe signal monitoring system

Country Status (1)

Country Link
JP (1) JPS59110230A (en)

Similar Documents

Publication Publication Date Title
JPS59110230A (en) Interframe signal monitoring system
JP3256256B2 (en) Transmission monitoring device
JP2765350B2 (en) Package mounting abnormality detection device
JP2800765B2 (en) Optical burst signal output control circuit
JP2591455B2 (en) Communication device
JPS6259435A (en) Data transfer supervisory equipment
JPH04142139A (en) Monitoring device
JP3155288B2 (en) Communication system and subsystem for communication system
JP2581419B2 (en) Transmission device and protection method using transmission device
JPH07307715A (en) Secondary fault suppression system and device therefor
JP3016280B2 (en) In-device monitoring method
JPH0547419Y2 (en)
KR100352848B1 (en) Apparatus for error checking of multiframe indicator byte in communication system
JPS5957535A (en) Disconnection of line detecting circuit of digital signal transmission circuit
JPH06169300A (en) Fault detection system
JPH04146693A (en) Connector linkage confirming circuit
JPH0512590A (en) Automatic alarm informing system
JPH07202826A (en) Method for locating faulty position
JPH11275100A (en) Can-communication signal branch unit
JPH05136785A (en) Fault packet prevention device
JPS61198823A (en) System for detecting unconnection of input signal line
JPH1070781A (en) Facility remote monitor device
JPH0454042A (en) Transmission signal management system
JPH05236639A (en) Compensator for transmission line
JPH0413324A (en) Fault notice system and data transmission system