JPS59109876A - Detection for abnormality of memory holding storage battery - Google Patents
Detection for abnormality of memory holding storage batteryInfo
- Publication number
- JPS59109876A JPS59109876A JP57220674A JP22067482A JPS59109876A JP S59109876 A JPS59109876 A JP S59109876A JP 57220674 A JP57220674 A JP 57220674A JP 22067482 A JP22067482 A JP 22067482A JP S59109876 A JPS59109876 A JP S59109876A
- Authority
- JP
- Japan
- Prior art keywords
- data
- comparison
- memory
- storage battery
- abnormality
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Landscapes
- Tests Of Electric Status Of Batteries (AREA)
- Secondary Cells (AREA)
Abstract
Description
【発明の詳細な説明】
(a) 発明の技術分野
本発明は情報処理システムに係り、特に揮発性メモリ内
に格納されるデータを保持する為に設けられた蓄電池の
異常を確実に検出するメモリ保持蓄電池異常検出方式に
関す。Detailed Description of the Invention (a) Technical Field of the Invention The present invention relates to an information processing system, and in particular to a memory that reliably detects an abnormality in a storage battery provided for retaining data stored in a volatile memory. Concerning retention storage battery abnormality detection method.
Tbl 従来技術と問題点
第1図は従来あるメモリ保持倫電池異常検出方式の一例
を示す図である。第1図において、不揮発性メモリとし
て設けられている読出し専用メモリ1には、図示されぬ
情報処理システムの動作を制御するプログラム等の変更
不要な情報が記憶されており、揮発性メモリとして設け
られている随時書込み読出しメモリ2には、前記情報処
理システムに固有のデータが記憶されている。随時書込
み読出しメモリ2は、電源を蓄電池3から給電経路4を
介して常時供給されており、該電源が異常を来さぬ限り
、一度格納されたデータは変化すること無く保持される
。従って随時書込み読出しメモリ2が格納されているデ
ータを正常に保持し、当該情報処理システムが正常な稼
働を保証する為には、蓄電池3から随時書込み読出しメ
モリ2に対して供給される電源の異常を素晴監視する必
要がある。第1図においては、電源監視回路5が蓄電池
3に併設されて蓄電池3の出力電圧を常時監視しており
、該出力電圧が基準値から外れたごとを検出すると警報
を発し、蓄電池3の(l’t (nを促す。Tbl Prior Art and Problems FIG. 1 is a diagram showing an example of a conventional memory retention battery abnormality detection method. In FIG. 1, a read-only memory 1 provided as a nonvolatile memory stores information that does not need to be changed, such as a program that controls the operation of an information processing system (not shown), and is provided as a volatile memory. The optional read/write memory 2 stored therein stores data specific to the information processing system. The read/write memory 2 is constantly supplied with power from a storage battery 3 via a power supply path 4, and data once stored is retained without change unless the power supply malfunctions. Therefore, in order to properly retain the data stored in the read/write memory 2 and to ensure normal operation of the information processing system, it is necessary to need to be closely monitored. In FIG. 1, a power supply monitoring circuit 5 is attached to the storage battery 3 and constantly monitors the output voltage of the storage battery 3. When it detects that the output voltage deviates from the reference value, it issues an alarm and l't (prompt n.
以上の説明から明らかな如く、従来あるメモリ保持蓄電
池異常検出方式においては、電源監視回路5が随時書込
み読出しメモリ2に電源を供給する蓄電池3の出力電圧
を監視していた。然しかかる電源監視回路5によっては
、給電経路4の障害に起因する随時書込み読出しメモリ
2に供給される電源の異席迄は検出することが出来ず、
当該情報処理システムの稼働を麻痺させる想れが在った
。As is clear from the above description, in the conventional memory storage battery abnormality detection system, the power supply monitoring circuit 5 monitors the output voltage of the storage battery 3 that supplies power to the write/read memory 2 at any time. However, such a power supply monitoring circuit 5 cannot detect abnormalities in the power supplied to the read/write memory 2 at any time due to a failure in the power supply path 4.
There was a desire to paralyze the operation of the information processing system.
fc) 発明の目的
本発明の目的は、前述の如き従来あるメモリ保持蓄電池
異常検出方式の欠点を除去し、随時書込み読出しメモリ
2に供給される電源の異冷を確実に検出し1Mる手段を
実現することに在る。fc) Object of the Invention The object of the present invention is to eliminate the drawbacks of the conventional memory retention storage battery abnormality detection method as described above, and to provide a means for reliably detecting abnormal cooling of the power supply supplied to the read/write memory 2 at any time. It lies in the realization.
(d) 発明の構成
この目的は、蓄電池により記憶内容を席時保持する揮発
性メモリを具備する情報処理システムにおいて、不揮発
性メモリ内に記憶された基準データと同一の比較データ
を前記揮発性メモリ内に予め格納し、前記情報処理シス
テムの再開時に前記揮発性メモリから抽出した前記比較
データと前記不揮発性メモリから抽出した前記基準デー
タとを比較する手段を設け、該手段の比較結果により前
記蓄電池の異常を検出することにより達成される。(d) Structure of the Invention The object of the present invention is to provide an information processing system equipped with a volatile memory whose storage contents are permanently retained by a storage battery, in which comparison data identical to reference data stored in the non-volatile memory is stored in the volatile memory. means for comparing the comparison data extracted from the volatile memory with the reference data extracted from the non-volatile memory when the information processing system is restarted; This is achieved by detecting abnormalities in
+e) 発明の実施例 以下、本発明の一実施例を図面により説明する。+e) Examples of the invention An embodiment of the present invention will be described below with reference to the drawings.
第2図は本発明の一実施例によるメモリ保持蓄電池異常
検出方式を示す図である。なお、全図を通じて同一符号
は同一対象物を示す。第2図においては、読出し専用メ
モリ1内に基準チーフルらが設けられている。該基準チ
ーフルロ内には、予め定められた基準データ(例えは1
0101 (110から成る数ハイドのデータ)が記憶
されている。FIG. 2 is a diagram showing a memory storage battery abnormality detection method according to an embodiment of the present invention. Note that the same reference numerals indicate the same objects throughout the figures. In FIG. 2, a reference chifur et al. is provided in the read-only memory 1. In FIG. In the standard chief fluro, predetermined standard data (for example, 1
0101 (number hyde data consisting of 110) is stored.
また随時書込み読出しメモリ2内には、当該情報処理シ
ステムが稼働を開始する時に読出し専用メモリ1内の基
準テーブル6と同一内容の比較データを記憶する比較テ
ーブル7が所定位置に格納される。従って随時書込み読
出しメモリ2に止糸な電源が供給されている限り、比較
チーフル7内の比較データは基準テーブル6内の基準デ
ータと等しく維持されるが、該電源が異常状態となった
場合には、比較テーブル7内の比較データは破壊され、
基準テーブル6内の基準データとは一致しなくなる。一
方当該情報処理システムの再開処理を司る再開処理機構
8内には比較回路9が設けられており、情報処理システ
ムの再開時に再開処理機4MY 8が起動されると、比
較回路9は読出し専用メモリ1内の基準テーブル6から
抽出した前記基準データと、随時1込み読出しメモリZ
内の比較テーブル7から抽出した前記比較データとを比
較し、両者が一致した場合には蓄電池3から給電経路4
を介して随時rト込み読出しメモリ2に供給されている
電源ば止富であると判定し、再開処理を継続させる。ま
た比較回路9が前記基準データと前記比較データとの不
一致を検出した場合には、随時書込み読出しメモリ2に
供給されている電源が異常状態にあると判定して再開処
理を中止させ、′;)等報を発して蓄電池3或いは給電
経路4の診断修復を促す。Further, a comparison table 7 that stores comparison data having the same content as the reference table 6 in the read-only memory 1 when the information processing system starts operating is stored in the read-out memory 2 at a predetermined location. Therefore, as long as constant power is supplied to the read/write memory 2, the comparison data in the comparison chiffle 7 will be maintained equal to the reference data in the reference table 6. However, if the power supply becomes abnormal, , the comparison data in comparison table 7 is destroyed,
The reference data in the reference table 6 no longer matches. On the other hand, a comparison circuit 9 is provided in the restart processing mechanism 8 that controls the restart processing of the information processing system, and when the restart processing device 4MY8 is activated when the information processing system is restarted, the comparison circuit 9 is transferred to a read-only memory. The reference data extracted from the reference table 6 in 1 and the 1-inclusive readout memory Z at any time.
The comparison data extracted from the comparison table 7 in
It is determined that the power supply that is being supplied to the readout memory 2 at any time via the power source 2 is at full power, and the restart processing is continued. Further, when the comparison circuit 9 detects a mismatch between the reference data and the comparison data, it determines that the power supply supplied to the read/write memory 2 is in an abnormal state and stops the restart process; ) to prompt diagnosis and repair of the storage battery 3 or power supply path 4.
以上の説明から明らかな如く、本実施例によれば、随時
書込み続出しメモリ2に供給される電源の異常は、随時
書込み読出しメモリ2内の比較テーブル7の内容と読出
し専用メモリ1に在る基準テーブル6の内容との不一致
により検出される為、蓄電池3のみならす給電経路4の
障害による電源の異常も総合的に検出可能となる。As is clear from the above description, according to the present embodiment, an abnormality in the power supplied to the continuous write memory 2 is caused by the contents of the comparison table 7 in the continuous write memory 2 and the read-only memory 1. Since it is detected based on the mismatch with the contents of the reference table 6, it becomes possible to comprehensively detect abnormalities in the power supply due to failures in the power supply path 4 as well as in the storage battery 3.
なお、第2図はあく迄本発明の一実施例に過ぎず、例え
ば再開処理機構8の構成は図示されるものに限定される
ことは無く、例えばプログラムで構成する等地に幾多の
変形が考慮されるが、何れの場合にも本発明の効果は変
らない。また揮発性メモリおよび不揮発性メモリの構成
は図示される随時書込み読出しメモリ2および読出し専
用メモリ1に限定されることは無く、他に幾多の変形が
考慮されるが、何れの場合にも本発明の効果は変らない
。It should be noted that FIG. 2 is merely one embodiment of the present invention, and the configuration of the restart processing mechanism 8 is not limited to that shown in the figure, for example, and numerous modifications may be made to, for example, the configuration of the program. However, the effects of the present invention do not change in either case. Further, the configurations of the volatile memory and the non-volatile memory are not limited to the illustrated read/write memory 2 and the read-only memory 1, and many other modifications may be considered, but in any case, the present invention is applicable. The effect of is unchanged.
(fl 発明の効果(fl Effects of the invention
Claims (1)
備する情報処理システムにおいて、不揮発性メモリ内に
記憶された基準データと同一の比較データを前記揮発性
メモリ内に予め格納し、前記情報処理システムの再開時
に前記揮発性メモリから抽出した前記比較データと前記
不揮発性メモリから抽出した前記基準データとを比較す
る手段を設け、該手段の比較結果により前記蓄電池の異
常を検出することを特徴とするメモリ保持前電池異當検
出方式。In an information processing system equipped with a volatile memory whose storage contents are always retained by a storage battery, comparison data that is the same as reference data stored in the nonvolatile memory is stored in advance in the volatile memory, and the information processing system A memory characterized in that means is provided for comparing the comparison data extracted from the volatile memory and the reference data extracted from the nonvolatile memory at the time of restart, and an abnormality in the storage battery is detected based on the comparison result of the means. Battery abnormality detection method before holding.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57220674A JPS59109876A (en) | 1982-12-16 | 1982-12-16 | Detection for abnormality of memory holding storage battery |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57220674A JPS59109876A (en) | 1982-12-16 | 1982-12-16 | Detection for abnormality of memory holding storage battery |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59109876A true JPS59109876A (en) | 1984-06-25 |
Family
ID=16754680
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57220674A Pending JPS59109876A (en) | 1982-12-16 | 1982-12-16 | Detection for abnormality of memory holding storage battery |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59109876A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008050180A1 (en) * | 2006-10-27 | 2008-05-02 | Freescale Semiconductor, Inc. | Power supply monitoring method and system |
-
1982
- 1982-12-16 JP JP57220674A patent/JPS59109876A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008050180A1 (en) * | 2006-10-27 | 2008-05-02 | Freescale Semiconductor, Inc. | Power supply monitoring method and system |
US8245068B2 (en) | 2006-10-27 | 2012-08-14 | Freescale Semiconductor, Inc. | Power supply monitoring method and system |
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