JPS59108413A - Automatic level adjusting circuit - Google Patents

Abstract

PURPOSE:To realize the direct coupling of a signal transmitting section by controlling the level of an input signal when a DC level of an input signal exceeds a reference level. CONSTITUTION:A voltage comparison circuit 66 compares the reference level with a value of an output signal of an amplifier 52 and generates a pulse having a width corresponding to the section of an input signal level higher than the reference voltage level. This pulse turns on a transistor (TR) 72. A capacitor 76 is charged by a current flowing to the TR72. A variable resistive element 58 is controlled by a terminal voltage of the capacitor 76. The input signal is attenuated corresponding to a value where the peak value of an inputted AC signal exceeds the reference voltage. Since no coupling capacitor is used for the controlling part, the circuit integration is attained easily.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic level adjustment circuit, and more particularly to an automatic level adjustment circuit that adjusts the level of an alternating current signal such as an audio signal.

FIG. 1 shows a conventional automatic level adjustment circuit. The input signal applied to the input terminal 2 is applied to the amplifier 8.10 via the resistor 4 and the capacitor 6, and is also applied from the terminal 12 formed between the resistor 4 and the capacitor 6 (1) as a variable resistance element. Applied to the collector of transistor 14. The emitter of the transistor 14 is grounded at the same point as the operating point potential of the input signal.

The signals sequentially amplified by amplifiers 8 and 10 are transferred to capacitor 1.
The signal is taken out from the output terminal 18 via the terminal 6, and is applied to the level detection circuit 22 from the terminal 20. That is, the terminal 20 is grounded via a resistor 24, and the operating point of the amplified output is converted to ground potential, and after being detected by a diode 26, a capacitor 30 forming a filter is connected via a resistor 28.
A DC voltage having a level corresponding to the output signal level is generated at the terminal 32.

This DC voltage is amplified by a current buffer circuit 34 whose collector is connected to Vcc, and is applied to the base of a transistor 36. That is, by using the minute current of the charge stored in the capacitor 30, a sufficient Hase current is applied to the power supply Vcc to cause the transistor 36 to function as a variable resistance element.
supply, and has a higher input resistance.

(2) The emitter of this transistor 36 is connected to the base of the transistor 14, and this transistor 1
The base current of transistor 4 is controlled by the output current of transistor 36. As a result, the transistor 14 functions as a variable resistance with respect to the input signal applied to the input terminal 2.

In such an automatic level adjustment circuit that utilizes the saturation characteristics of a transistor, the input level of the amplifier 8 is controlled by the transistor 14 installed as a variable resistance element, and the output signal level is kept constant.

However, in such a circuit, the diode 26
Since the forward direction drop voltage vF of the transistors 14 and 14 and 36 contributes to level adjustment, the level adjustment output is greatly influenced by its temperature characteristics.

Further, a capacitor 1 is connected between the amplifier 10 and the control system.
6, and when this circuit is constructed from an integrated circuit, there is a drawback that the number of pins increases because of the capacitor 16 which is an external component. Furthermore, in this circuit, the peak (3) voltage from the AC operating point is applied to the diode 26 and transistor 14.
It is fixed at a level determined by the forward drop voltage of , and cannot be adjusted freely, and the level itself has drawbacks such as a wide range of variation due to variations in diodes and transistors.

Further, the current buffer circuit 34 can also be configured as shown in FIG. That is, the current buffer circuit 3
4 is a transistor to which a control input is given from the terminal 32;
40 and transistors 42 and 44 forming a constant current circuit
It is made up of.

Even if such a current buffer circuit 34 is used, the peak voltage from the AC operating point is fixed at a level determined by the forward drop voltage of the two diodes (transistors), and there are the same drawbacks as described above.

The purpose of this invention is to provide an automatic level adjustment circuit that can freely set the level, reduce level variations, improve temperature characteristics, and enable direct connection between the output section and the control system. .

The present invention provides a voltage comparator circuit that compares the DC level of an input signal to be level-adjusted with an arbitrarily set reference level; It is characterized by consisting of a smoothing circuit that smoothes the output generated by the voltage comparison circuit, and a variable resistance element whose resistance value is controlled according to the DC output generated by the smoothing circuit and whose input signal level is adjusted.

Embodiments of the invention will be described in detail with reference to the drawings. FIG. 3 shows an embodiment of the automatic level adjustment circuit of the present invention. In the figure, a resistor 54 and a capacitor 56 are connected in series between an input terminal 50 to which an input signal whose level is to be adjusted is applied and an input section of an amplifier 52.
The connection point between the capacitor 56 and the capacitor 56 is connected to the ground through a variable resistance element 58. In addition, the input section of the amplifier 52 is connected to a resistor 6.
A voltage source 62 is connected through 0 to apply a bias voltage VB to the amplifier 52, and the output operating point of the amplifier 52 is also set by this bias voltage VB. An output terminal 64 for taking out an output signal is formed at the output part of this amplifier circuit 52, and a voltage comparison circuit 66 is formed.
The non-inverting input terminal (5) of the terminal (+) is connected. A level setting terminal 68 for setting a reference level is formed at the inverting input terminal (-) of this voltage comparison circuit 66.
The reference voltage vRE F is supplied from a variable voltage source (not shown).
is set. It is assumed that this voltage source 62 has the same temperature characteristics, power supply voltage fluctuation characteristics, etc. as the bias voltage value v.

A resistor 70 is connected between the output part of the voltage comparison circuit 66 and the reference potential point, and the base of a transistor 72 is connected to the high potential side terminal of the resistor 70. The transistor 72 constitutes a buffer circuit, a collector is connected to a power supply line, and an emitter is formed with a terminal 74 via a low resistance 73 that determines the active time.
4 is grounded via a special capacitor 76.

Further, although not shown, a high resistance that determines the recovery time may be grounded in parallel to the capacitor 76. The DC voltage extracted from the emitter of transistor 72 is
It serves as a control signal for the variable resistance element 58.

(6) In the above configuration, the input signal given to the input terminal 50 is applied between the terminals of the variable resistance element 58, and
The signal is applied to an amplifier 52 and amplified. In this case, the input signal is input to amplifier 52 whose DC level is given by the output level of bias voltage source 62 .

The output signal of the amplifier 52 is given to a voltage comparator circuit 66,
Reference voltage level V applied to level setting terminal 68
Compared to REF. That is, the voltage comparison circuit 66 compares the output signal of the amplifier set by the bias voltage source 62 with a reference level, and generates a pulse having a width corresponding to the section of the input signal level higher than the reference voltage level VRE_F. , this pulse is applied from resistor 70 to the base of transistor 72. A current corresponding to the input pulse flows through the transistor 72, but this intermittent current is charged by the capacitor 76 and converted into a DC voltage. That is, the DC voltage generated in the transistor 72 becomes a control input to the variable resistance element 58, and the resistance value according to the control input is changed to the variable resistance element 58.
is formed. As a result (7), the amplitude level of the input signal is adjusted so that the peak value of the AC output becomes the difference between the VREF and VB, and the level-adjusted signal output can be taken out from the output terminal 64.

According to such a configuration, the amplitude level of the input signal can be adjusted by setting the DC voltage VREF at an arbitrary level equal to or higher than the bias voltage VB to the level setting terminal 68 of the voltage comparison circuit 66.

In addition, regarding the circuit configuration, since the conventional rectifier circuit is replaced with the voltage comparator circuit 66, there is no need for a coupling capacitor, and the amplifier 52 and the control system can be directly connected. , the number of pins for externally connecting capacitors can be reduced. Furthermore, regarding the temperature characteristics, since the temperature characteristics of elements such as transistors that constitute the voltage comparison circuit 66 can be canceled out,
Temperature characteristics can be improved.

FIG. 4 shows another embodiment of the invention, in which the same parts as in the circuit of FIG. 3 are given the same reference numerals. In this example,
The voltage comparison circuit 66 is composed of a differential amplifier (8), and the variable resistance element 58 is a transistor 7.
The DC voltage generated at the emitter of the transistor 72 is converted into a current by a voltage-current conversion circuit 80 and applied to the base of the transistor 78. That is, the emitters of the pair of transistors 81 and 82 are connected in common, and a constant current source 84 that regulates the current flowing through both transistors 81 and 82 is connected between the emitters and a reference potential point. The base of the transistor 81 is connected to the output part of the amplifier 52 via a resistor 86, and the base of one transistor 82 is connected to a movable piece of a variable resistor 90 connected between the voltage application terminal 88 and the reference potential point. A reference voltage VREF is set. Note that in this case, it is assumed that the bias voltage source 62 does not have temperature characteristics.

Further, a diode-connected transistor 92 is connected between the transistor 81 and the voltage application terminal 88.
The base and collector of this transistor 92 are connected to the base of a transistor 94. That is, the transistors 92 and 94 constitute a current mirror circuit, the emitter of the transistor 94 is connected to the voltage application terminal 88, and a constant current source 84 and a voltage comparator are connected between the collector and the reference potential point. A relatively high resistance 96 determines the voltage gain of, the maximum pulse amplitude.
is connected.

Regarding the transistor 72 and the capacitor 76, the third
The transistor 7 is connected in the same way as the circuit shown in the figure.
The base of a transistor 98 is connected to the emitter of the transistor 2 via a resistor 73.

The emitter of transistor 98 is grounded through a resistor 100 and connected to the base of transistor 98. By increasing the gain of the voltage comparator circuit, the resistance of 10
Since 0 can also be made large, the base input resistance of the transistor 98 can be made high, the recovery time can be lengthened, and a decrease in the discharge time constant caused by a decrease in the input resistance at the time of strong input can be prevented. transistor 98
A diode-connected transistor 102 is connected between the collector of the voltage application terminal 88 and the voltage application terminal 88 . The base of this transistor 102 (10) is connected to the base of the transistor 104, forming a current mirror circuit.The emitter of the transistor 104 is connected to the voltage application terminal 88, and its collector is connected to the transistor 7.
It is connected to the base of 8.

Based on the above configuration, its operation will be explained with reference to the operation waveforms shown in FIG. The operating waveforms in FIG. 5 show a transient state. Assuming that the voltage comparison circuit 66 does not include the transistor 78 as a variable resistance element, in this case, based on the input signal applied to the input terminal 50, the output signal shown in FIG. shall be provided.

In this signal waveform, the reference voltage level is set to vR
E F, this signal waveform has a reference voltage level vR
A signal exceeding EF exists.

In this case, if the reference voltage level VRE F is set in the voltage comparator circuit 66 by the variable resistor 90, this v, , E
Based on the comparison between F and the signal shown in FIG. 5, a pulse shown in FIG. 5C is generated across the terminals of resistor 96. This pulse is applied to the capacitor 76 via the transistor 72, smoothed by charging the capacitor 76 (11), and converted into a DC voltage at C as shown by the dashed line. This DC voltage is applied as a control voltage to the base of transistor 98, the collector current of transistor 98 is controlled by this DC voltage, and the control current is transmitted from transistor 104 to transistor 7.
It will be given to the base of 8.

As a result, the internal resistance of the transistor 78 changes in response to the control voltage, the pulse width narrows so that the charging current to the capacitor 76 due to the pulse and the discharging current from the capacitor are balanced, and the amplitude level of the input signal is adjusted. , a level-adjusted output signal shown in FIG. 5B is taken out from the output terminal 64. The reason why the amplitude of the waveform shown in Figure 5B gradually approaches the reference voltage level and the width of the pulse shown in Figure 5C gradually becomes smaller is that this automatic level adjustment circuit is a feedback system. This is because the transient state is shown enlarged to explain the operation.

It goes without saying that the above operation is similarly performed even when the input signal waveform fluctuates and its output waveform exceeds the reference voltage level vREF (2), and the level amplitude of the input signal is adjusted.

By arbitrarily setting the signal level to the reference voltage VREF in this manner, the amplitude level of the output signal can be adjusted, and the level setting can be freely performed using the variable resistor 90. Since the conventional detection circuit can be configured with the voltage comparison circuit 66, the amplifier 52 and the voltage comparison circuit 66 can be directly connected without using a capacitor, and the circuit configuration is suitable for tC.

Further, as is clear from such a circuit configuration, the configuration is such that the temperature characteristics of the transistors related to level setting are offset, the influence of the temperature characteristics can be avoided, and stable operation can be obtained.

As explained above, according to the present invention, the signal amplitude level can be adjusted freely, and level variations can be suppressed by matching the characteristics of the output operating point of the amplifier and the reference level. Since it is possible to connect directly between the output section and the control system without using a capacitor, the number of external bins can be reduced when configured with an integrated circuit.
In addition, stable operation can be achieved by improving temperature characteristics.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing a conventional automatic level adjustment circuit, Figure 2 is a circuit diagram showing a conventional automatic level adjustment circuit.
The figure is a circuit diagram showing the current bath control circuit of the automatic level adjustment circuit, FIGS. It is an explanatory diagram showing operation. 58... Variable resistance element, 66... Voltage comparison circuit, 7
6... Capacitor, 78... Transistor as a variable resistance element. (14)

Claims (1)

[Claims] A voltage comparison circuit that compares the DC level of the input signal to be level-adjusted with an arbitrarily set reference level and generates an output when the peak level of the input signal exceeds the reference level; An automatic level adjustment circuit comprising a smoothing circuit that smoothes an output, and a variable resistance element whose resistance value is controlled according to the DC output formed by the smoothing circuit and adjusts the input signal level.