JPS59108315A - Diffusion treatment of semiconductor wafer - Google Patents

Abstract

PURPOSE:To prevent the generation of a thermal strain, to keep the temperature of a semiconductor wafer in a high temperature region constant at all times and to obtain a junction in uniform depth and uniform resistivity extending over the whole surface of the wafer by preheating the wafer so that its temperature is elevated slowly in the low temperature region of the same oven, transferring its to the high temperature region and diffusing an impurity while heating it at a high temperature. CONSTITUTION:A heater 5A is controlled so that the temperature of the low temperature region 5 is kept at an initial temperature (such as 600 deg.C) at its maximum where the wafer is not thermally strained. The semiconductor wafers (W) are loaded on a boat (B), and charged into the low temperature region 5 from an oven inlet. Temperature distribution is stabilized, and the temperature of the low temperature region 5 is elevated step by step or in a rampy manner up to a first temperature (such as 1,000 deg.C) higher than the initial temperature by the heater 5A. The boat (B) is moved to the high temperature region 4, and the impurity is diffused according to a predetermined manner. Both the high temperature region 4 and the low temperature region 5 are kept at fixed temperature during the diffusion. Diffusion is completed, the boat (B) is moved into the low temperature region 5, the region 5 is cooled slowly, and the temperature of the region 5 is dropped step by step or the rampy manner up to the initial temperature by the heater 5A.

Description

[Detailed Description of the Invention] [Technical Field of the Invention 1] The present invention relates to a diffusion processing method for semiconductor wafers, and in particular, a method that has a faster processing speed than conventional diffusion processing methods and can obtain semiconductor wafers of uniform quality. , relates to an improved diffusion processing method.

[Technical Background of the Invention I Recently, in the manufacture of semiconductor devices, 4-inch wafers have been used instead of the conventional 3-inch wafers for the purpose of achieving high integration and improving chip yield. As semiconductor wafers become larger, it becomes difficult to process the entire wafer to uniform quality using conventional manufacturing methods for 3-inch wafers, resulting in a decline in chip yield and a situation that goes against the initial objective. There was also a risk that this would occur. Although such risks exist throughout the semiconductor wafer processing process, they are especially great in the impurity diffusion process that has the greatest impact on device quality.

Conventionally, the following methods have been used as diffusion processing methods for semiconductor wafers, but these methods have the following problems, and therefore are not suitable as diffusion processing methods for large wafers. It wasn't.

[Problems with Background Art] Conventionally, methods used for impurity diffusion in processing semiconductor wafers include (I) four-fold furnace cooling method;
(Crazy) There were two methods: S TQ (Slow In & Out) method. Among these, (I) 4 rise furnace cooling method is a method in which only one soaking area is installed in the diffusion furnace.
Then, the semiconductor sea urchin charged into the soaking area [60
After preheating to 0°C, the furnace temperature is raised to 1200°C, and impurities are diffused into the semiconductor tube while maintaining the temperature of the soaking area at 1200°C. This is a method in which the temperature of the thermal region is lowered to 600° C., the semiconductor wafer is slowly cooled, and then the semiconductor wafer is taken out of the furnace.

In the above-mentioned 4-furnace-cooling method, (a) It takes a very long time for the temperature in the soaking area to stabilize when the temperature is raised and lowered, so the total time required for the diffusion process is very long, and the equipment operating rate is therefore low. and low production efficiency; (b) short-time diffusion does not make the depth of the diffusion layer uniform, nor does the resistivity of the diffusion layer become uniform; (0) low-concentration diffusion has poor reproducibility; Even if the wafer is processed under the same diffusion conditions, it is not always possible to obtain the same results, and therefore there are problems such as the inability to perform appropriate quality control. The time required to warm up and cool down becomes even longer,
The basic drawback was that production efficiency was further reduced.

On the other hand, the SIQ method of (IT) does not raise or lower the temperature of the diffusion furnace, but adjusts the temperature of the soaking area to the diffusion treatment temperature < 1200℃.
), the wafer is preheated and slowly cooled by controlling the speed at which the wafer is loaded into the furnace and the speed at which the wafer is pulled out from the furnace, and is currently widely used. It is a method. This SIQ method does not raise or lower the furnace temperature, so production efficiency and equipment availability are higher than the 4-furnace cooling method. (f) Wafer equipment in which the temperature in the soaking area near the furnace mouth where wafers tend to escape is unstable, and it takes time for the temperature in the soaking area to recover to the temperature before charging after loading the wafer. Even a slight change in the time required for loading and unloading tends to have a large effect on the impurity concentration and resistivity of the diffusion layer, and therefore, variations in the resistivity of each diffusion layer are likely to occur even between wafers in the same lot. ) Since the wafer is preheated while passing through an area with a steep temperature gradient, there are problems such as slippage (thermal distortion) in the wafer, and these problems are further amplified as the wafers to be processed become larger. I know it will happen.

Therefore, the conventional diffusion processing method as described above is not suitable as a diffusion processing method for large diameter wafers.

[Objective of the Invention] The object of the present invention is to solve the problems in the conventional diffusion processing method, to reduce variations in the depth and resistivity of the diffusion layer, and to always provide constant results even in short-time diffusion processing. Another object of the present invention is to provide an improved diffusion processing method that can uniformly and efficiently process semiconductors of one diameter.

[Summary of the Invention 1] As described in the claims of Patent 5-1, the diffusion treatment method improved by the present invention provides a high-temperature region and at least one low-temperature region in the same furnace, The wafer is heated to a specified preheating temperature (e.g. 1000°C) in the low temperature range.
), then the semiconductor wafer is moved to the high temperature range and impurity diffusion is performed while heating it to a diffusion treatment temperature (1200°C) higher than the preheating temperature. In the end step 1, the semiconductor wafer is returned to the low temperature range, and then slowly cooled in the low temperature range.

In one embodiment of this invention, the preheating temperature and slow cooling temperature are configured in two stages, 600°C and 1000°C, and there is only one low temperature range, but if there are two or more low temperature ranges, A low temperature region of 600° C. and a low temperature region of 100° C. may be provided separately. When there is only one low temperature region as in the embodiment of the present invention, the same effect can be obtained by increasing or decreasing the temperature of the low temperature region while preheating and slowly cooling the semiconductor wafer in the low temperature region. can be obtained.

In addition, when using a diffusion furnace with a furnace opening only on one end side, it is recommended to provide a high temperature zone at the back of the furnace and a low temperature zone near the furnace mouth. In addition, we have installed mainly in high temperature areas (J
Alternatively, a low-temperature region communicating with the furnace mouth may be arranged around a high-temperature region in a ring shape or a modified shape, and a one-sided furnace type may be adopted.

In the diffusion treatment method A5 of the present invention, since the wafer is sequentially exhausted from a relatively low temperature to the diffusion treatment temperature, there is no risk of thermal distortion occurring in the wafer, and the temperature in the high temperature range is always constant. Since it is not affected by the opening and closing of the furnace opening, it is possible to easily reproduce short-time diffusion and low-concentration diffusion, and it is possible to achieve junctions with a uniform depth and resistivity of -C over the entire surface of the wafer.

"Embodiment of the Invention" An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of a horizontal diffusion furnace, which is an improved version of a conventional diffusion furnace for carrying out the method of the present invention. In the figure (13, 1 is the furnace body, 2 is the gas supply port installed in the R inner part of the furnace body 1, and 3 is the furnace mouth.

This diffusion furnace differs from conventional Fik furnaces in that it has a high-temperature zone 4 (that is, a diffusion temperature zone) and a low-temperature zone 1 and 5 (
In other words, a preheating temperature zone) is provided, and the high temperature zone 4 is the furnace body 1.
The low temperature region 5 is located at the back of the furnace, and the low temperature region 5 is located at the furnace mouth side.

A heater 4 for forming a high temperature region 4 is provided on the outside of the furnace body 1.
Heaters 5A and the like are arranged to form a low temperature region 5 with A, and the action of the heater 4A realizes the temperature distribution shown by the symbol a at the bottom of the figure in the high temperature region 4, and the action of the heater 5A Therefore, at low temperature #i5, each heater is configured so that the temperature distribution already indicated by the reference numeral is realized. In the method of the present invention, the temperature in the high temperature region 4 is always maintained at the diffusion treatment temperature (for example, 1200°C), but the temperature t in the low temperature region 5 used for preheating and slow cooling of the semiconductor wafer causes thermal stress on the semiconductor wafer. In this embodiment, the temperature of the low temperature range 5 is set to be variable from 600°C to 100°C.
The heater 5A is controlled so that it can be raised and lowered in a stepwise or rampwise manner up to 0°C.

In addition, in the temperature distribution graph shown at the bottom of Fig. 1,
The abscissa axis x indicates the distance taken from the origin to the innermost point of the furnace body 1 toward the furnace mouth, and the ordinate axis represents the temperature °C.

Bonding in which the semiconductor wafer W is subjected to a diffusion process in the above configuration;
Prior to wafer loading, the temperature of the low tfiAIli5 is set to the maximum initial temperature (e.g. 6
00° C.) J: Sea urchin heater 5Δ is controlled. The semiconductor wafer W is mounted on a known bow l-B,
Boat B is first charged into the low temperature area 5 from the furnace [1]. After the temperature distribution in the low-temperature area 5 has stabilized or the required glue has recovered for one hour, the temperature in the low-temperature area 5 is increased in a step or ramp-like manner to a first temperature (for example, 1000° C.) higher than the initial temperature by the heater 5Δ. Ru. After the altitude distribution of the low temperature area 5 becomes stable at the first temperature as shown by the dotted line in the figure, the boat B is moved to the high temperature area 4 by borders 1 to 0 (not shown), etc. A predetermined impurity diffusion is performed on the semiconductor wafer W while the semiconductor wafer W is left standing for a predetermined time. While performing the diffusion process, both the high temperature area 4 and the low temperature area 5 are kept at a constant temperature (the low temperature area 5 is
00° C.), the temperature distribution in the high-temperature region 4 is kept stable, and therefore there is no possibility of uneven diffusion or the like occurring.

9- After the diffusion is completed, Po 1 to B are transferred to a low temperature 1g 5, and after being slowly cooled in the low temperature range at 1000°C for a predetermined time, they are transferred to a heater 5A.
As a result, the temperature of the low-temperature region 5 is lowered stepwise or ramp-wise to the initial temperature. And after R, the initial temperature (
600° C.) for a predetermined period of time, the boat B is taken out of the furnace.

[Effects of the Invention] According to the method of the present invention as described above, preheating and slow cooling are performed before and after supplying the semiconductor wafer to the high temperature region used for impurity diffusion so as to prevent thermal distortion from occurring in the semiconductor wafer in the low temperature region. Therefore, impurity diffusion can be performed even in large semiconductor wafers without causing thermal distortion. In addition, since the temperature in the high temperature range can be kept constant and the temperature distribution can be kept stable, even in short-time diffusion or low concentration diffusion, a uniform bonding depth can be obtained over the entire wafer surface, and the resistivity of the diffusion layer can be reduced. can be set to a constant value. Further, according to the method of the present invention, processing can be carried out in a shorter time than the conventional furnace raising/cooling method, and production efficiency and equipment utilization rate can be improved.

In the above embodiment, only an example using a horizontal diffusion furnace was shown, but it goes without saying that the present invention can also be applied to a vertical diffusion furnace.

[Brief explanation of drawings]

FIG. 1 is a schematic vertical sectional view of a horizontal diffusion furnace suitable for carrying out the method of the present invention and a temperature distribution diagram within the diffusion furnace. 1... Furnace body, 2... Gas supply port, 3... Furnace mouth, 4
...High temperature range, 5...Low temperature range, 4A, 5A...Heater. -11~ Figure 1 0-1 → χ

Claims (1)

[Claims] 1. A high-temperature zone and at least one low-temperature zone are provided in the same furnace, and after preheating the semiconductor wafer in the low-temperature zone to sequentially raise the temperature to a predetermined first temperature, the semiconductor wafer is placed in the high-temperature zone. diffusing impurities into the semiconductor wafer while moving and heating it to a second temperature higher than the first temperature;
The semiconductor wafer after the impurity diffusion is returned to the low temperature range and is gradually cooled in the low temperature range,
Diffusion processing method for semiconductor wafers.