JPS59106884A - Control system for inverter - Google Patents

Abstract

PURPOSE:To obtain an output waveform similar to a sinusoidal wave by sequentially reading out unit data group in a period relative to the frequency of a 3- phase AC, and controlling ON and OFF a commutation element on the basis of the read-out information. CONSTITUTION:The output of a temperature sensor 1 for detecting a room temperature is applied to a V/F converter 3 through a sensor amplifier 2, the output is applied to an n-adic counter 4, and also applied to a CPU6 through an input port 5a. Binary information for controlling ON or OFF a transistor is stored in a memory 7, the CPU6 reads out the binary information, and outputs to a latch circuit 8 through an output port 5b. The memory 7 stores unit data group in a period relative to the frequency of the 3-phase AC for one cycle of 3-phase AC for a plurality of phases.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control method for an inverter, and more specifically to a control method for a PWM type inverter suitable for regulating the speed of an induction motor.

It is widely used to control the speed of induction motors using inverters, and various commutation control methods have been put into practical use, but PWM (Pulse Width Modulation) type inverters are the most effective in terms of performance and economy. Excellent and widely used. In this device, a pulse signal (chopping signal) that makes it possible to obtain a desired frequency and desired voltage is applied to a commutating semiconductor element (transistor or GTO thyristor).

This pulse signal needs to be determined so that the AC waveform to be output is close to a sine wave and has a smooth waveform, and the efficiency does not decrease due to loss due to harmonics. Therefore, it is desirable to make the pulse signal frequency as high as possible, but there is a limit to high-speed operation due to the switching characteristics of semiconductor elements, and control becomes complicated.

SUMMARY OF THE INVENTION An object of the present invention is to provide an inverter control method that provides a three-phase alternating current similar to a sine wave and is easy to control.

The present invention will be specifically explained below based on the drawings.

FIG. 1 is a block diagram when the method of the present invention is applied to an air conditioner, in which the rotational speed of the compressor motor 9 varies depending on the level of the room temperature, so that the temperature can be controlled.

The commercial power supply 10 is connected to a rectifier circuit 11, and the direct current obtained by this is given to three series circuits of commutation control transistors a, a, b, b and c, c connected in a totem pole. An intermediate node of each series circuit is connected to three terminals of a three-phase induction motor 9, respectively. Note that transistor a.

b, c are on the positive side, and i, ``, τ are on the negative side.

1 is a temperature sensor for detecting room temperature, the output of which is amplified by a sensor amplifier 2, and the amplified output is sent to a V/f (voltage/frequency) converter 3 to detect a high temperature.

The pulse signal P1 is converted into a pulse signal P1 whose period changes from short to long depending on the low level, and this pulse signal P1 is applied to an n-ary counter 4 and also applied to a CPU (central processing unit) 6 consisting of a microprocessor via an input port 5a. It will be done. The n-ary counter 4 emits a carry signal P2 every time it counts n elementary pulses of the noculus signal P1.
is given to the CPU 6 via the input port 5a. memory 7
are transistors a, π, blb, 01 as described later.
Binary information for on/off control of τ is stored,
The CPU 6 updates the contents of the read address counter based on the pulse signal P1 and the carry signal P2, reads out this binary information, and based on this read data, sends a signal to turn on and off the six transistors a''-'c. The latch circuit 8 holds a signal transmitted to the output port 5b and related to on/off of each of the transistors a to C, and this holding signal is applied to the pace of each of the transistors a to C to control their on/off. There is.

FIG. 2 is an explanatory diagram of binary information to be stored in the memory 7. FIG. 2(a) shows an ideal sine waveform of the three-phase alternating current that is obtained as the inverter output and is to be applied to the motor 9, and is the ideal sine waveform of the three-phase alternating current that is to be applied to the motor 9.

The phase involved in turning on π (or stone, c, 7) is the A phase (or B phase or C phase), and the timing of the voltage O of the A phase is 0° (360°).

Continuity control is performed, for example, with 60° as one section, here 0°, 60°, 120°, and 180°.

240° and 300° are used as reference phases for each section.

Figure 2 (b) shows the reference phase of ■...■ for each section at 0°.

FIG. 3 is an explanatory diagram showing the contents of commutation control according to the present invention method, which is determined based on the difference in the instantaneous values of the A, B, and C phases at 60°, . . . 300°, respectively.

I will explain the diagram of Mozuko. Table 1 shows the differences between the instantaneous values of each phase at the reference phase and the instantaneous values of phase A-phase B, phase B-phase C, and phase C-phase A based on this. For example, the instantaneous value of A phase at 0° is A phase - 0, B phase = -0,866
, C phase=0.866, A phase-B phase is 0.866
, B phase - C phase is -1,732, C phase - A phase is 0.86
It becomes 6. The positive or negative of this instantaneous value difference means the direction in which the current flows. For example, as mentioned above, if the A-phase-B phase is positive, it means that the current flows from the A-phase side to the B-phase side, and therefore the commutation control circuit This means that transistors a and 2 are turned on, and conversely, the fact that phase B and phase C are negative means that current flows from the phase C side to the phase B side, and therefore transistor
This means that and C are turned on.

In the method of the present invention, commutation control is performed as follows.

That is, in the interval 00 to 60° of the A phase, at the beginning timing of this interval, that is, at the reference phase O Current 0.866, -1.732 (the negative sign means the direction is from C phase to B phase).

0 and 866 are passed during different periods within this section, and the current value is replaced by the width of the passing time.

In other words, regarding section ■, as shown in Figure 2 (b), current flows from phase A to phase B for a period corresponding to 0.866 (transistors a and b are on), and then from phase B to C.
Transistor C9π is turned on, causing current to flow into the phase for a period corresponding to -1,732. It is assumed that the current flows from the C phase to the B phase (as shown below), and then the current is caused to flow from the C phase to the A phase for a period corresponding to 0.866 (transistor C9π is on). It is.

To explain this time width in more detail, one section has, for example, 450 unit times (hereinafter referred to as t), and this is divided into three equal sections, each of which consists of A phase-B phase, B phase-C phase, and C phase. This period is assigned as a period for current flow in each of the phases A and A. For example, the last 3 t of each period of 15 t is set as a energization prohibition period to prevent abnormal commutation due to a delay in turning off the transistor. In other words, 12 t is secured as the time width for the current flow between each phase, and this is used in proportion to the difference in the instantaneous values of the six sections. In this example, the absolute value of the difference between the instantaneous values is 0.866 and 1.866.
Since there are only 732, it is only necessary to allocate 6t to the former and 12t to the latter.

FIG. 3 is a conceptual diagram of data stored in the memory 7.

When the first elementary pulse of the pulse signal P is input to the CPU 6, the read address counter has the transistor a''-
The starting address {circle around (2)} of the area of the memory 7 that stores the binary information for on/off control of C is set, and the data at this address is read out. The data is 6 transistors a
-e on (“1”).

It has a total of 8 bits, including 6 bits of data (hereinafter referred to as unit data) representing off (“0”) and 2 bits (not shown). The first data read is from transistor a.
, π, b, b,. , expressed in a positive correspondence is 1.0,0,
1,0. The CPU 6 reads this and applies it to the latch circuit 8 from the output port 5b, and from there sends a signal to turn on the transistors a and b for a time L. (The frequency M of the clock signal, which will be described later) is developed. This is the section■
This means that the commutation control at is started. Note that the n-ary counter (here n=6) 4 is reset by the first elementary pulse.

Next, the contents of the address counter are incremented by 1 using a clock signal (not shown). The following content is the same, transistor a
, b remain on.

After that, the contents of the address counter continue to be incremented, but six pieces of the same unit data continue. Next, when the address counter is incremented, the contents of the unit data are o,
Changes to o, o, o, o, o. As a result, all transistors turn off. Nine pieces of such data are prepared, and no open current flows as they are sequentially read out.

The content of the unit data that is subsequently read is 0°0.0
, 1, 1.0, and accordingly, a signal to turn on transistors c and b is issued from the CPU 6, and transistors c and b are turned on. Such transistors c, b
Twelve pieces of unit data for turning on are prepared, and while this data is being read out, transistors c and b are turned on. Next, the contents of the unit data become all 0, and all transistors are turned off. The number of data is three.

Next, the contents of the unit data are 0, 1, 0, 0, 1゜0, and the signal to turn on transistors C and a is sent to the CPU6.
The transistor C1π is turned on. Six pieces of this data are prepared, and while this data is being read out, transistors C and a are turned on. Next, the contents of the unit data become all 0, and all transistors are turned off. This number of data is nine.

That is, in section (3), the current flows from phase A to phase B for 6t, then the open current does not flow for 9t, then the current flows from phase C to phase B for 12t, and then the open current flows for 3t. No current flows,
Next, the current flows from the C phase to the A phase for 6t, and then the open current does not flow for 9t. The last unit data of the unit data group in section ■, here the 2-bit data following the 6-bit unit data of address +44, stores data indicating the end of the unit data group, and the address counter is updated. The CPU 6 is stopped and waits for input of the next elementary pulse of the pulse signal P1.

When this second elementary pulse is input to the CPU 6, the address counter is incremented and the contents of the next address are read out. The content of this address is the address ■ to be set next in the address counter, and the CPU 6 reads this, sets it in the address counter, and starts reading the second unit data group in the same manner as described above. Start commutation control in section ■. In this case, the content of the unit data is
As is clear from Figure (B) and Table 1 (,1,0°o,
12 i, o, o, o, o, o, o, o.

3 0s, 6 O, 0, 0, 1, 1, 0, 0゜o,o
, 9 o, o, o, 6 1,0,0,0,0°1,
o, o, o, o, o, o are 9, totaling 45, and A
An open current flows between 12 from the phase to the B phase, 6 from the C phase to the B phase, and 6 from the A phase to the C phase, and after each current flows, the currents of 3t, 9t, and 9t do not flow. There will be a period. Note that the n-ary counter 4 is incremented by 1 upon input of the second elementary pulse.

Thereafter, a new unit data group is read out each time an elementary pulse of the pulse signal P1 is inputted, and commutation control is performed based on this. Sixth elementary pulse of pulse signal P1. is input and commutation control is performed in the interval ■, the state waits for the input of the seventh elementary pulse, but when the seventh elementary pulse is input, the n-ary counter 4 outputs the carry signal P2. is issued, and the contents return to 0. CPU6 carries carry signal P2
Then, the end of one cycle is detected, the address counter is set to ■ again, and the same control is repeated.

As can be understood from the above explanation, the readout period of the unit data group is governed by the period of the pulse signal P1,
Since the clock signal has a short period, the period of the pulse signal P1 is such that the period of the pulse signal P1 reads out the last unit data in the unit data group and controls the transistors on and off for a period of time t, and then reads the next unit data group. This period governs the time until the first unit data is read out, and when the period is long, this time is long, and when the period is short, this time is short.

The length of the period of this pulse signal P1 corresponds to the low or high temperature of the room temperature detected by the temperature sensor 1, so when the room temperature becomes high, the effective value of the inverter output of the present invention increases.
Conversely, when the room temperature becomes low, the effective values become small, and the motor 9 is rotated or the compressor is operated in accordance with these effective values, and desired temperature regulation control is performed. The conversion ratio of the V/f converter 3, the period of the clock signal, etc. are the access time of the memory 7, the load, and here the motor 9.
It may be selected as appropriate depending on the situation. Further, it goes without saying that the number of unit data in the unit data group is not limited to the above embodiment.

Further, in the above-described embodiment, the CPU 6 consisting of a microprocessor is used to control data reading from the memory 7, but its function is based on the pulse signal P1. Since the reading of the memory 7 is controlled by the carry signal P2+clock signal, there is no need to use a microprocessor, and it can be easily replaced by a dedicated circuit mainly consisting of a counter.

As described above, the inverter control method according to the present invention uses binary information regarding on and off of each commutation element as unit data to be read simultaneously, and sequentially reads information regarding the duration of the on and off states. The number of units of data to be read out is defined as the number of units of data to be read out, and this number is associated with the difference in the instantaneous value of each phase at a predetermined phase of the three-phase AC to be output. One cycle of alternating current is stored in memory, unit data groups are sequentially read out at a period associated with the frequency of the three-phase alternating current, and the commutation elements are turned on and off based on the read information. An inverter that can obtain an output waveform close to a sine wave, has high efficiency, and has a simple control system configuration can be realized. If the temperature sensor is associated with the reading cycle of the unit data group as in the example, it is possible to manufacture an air conditioner with a simple configuration and efficient temperature control function. The present invention has excellent effects such as making the waveform more similar to a sine wave.

[Brief explanation of drawings]

The drawings show embodiments of the present invention, and FIG. 1 is a block diagram when the method of the present invention is applied to an air conditioner, FIG. 2 (A),
(b) is an explanatory diagram of binary information stored in the memory, and FIG. 3 is a conceptual diagram of data stored in the memory. 1...Temperature sensor 3...V/f converter 4...
N-ary counter 6...CPU 7...Memory 9
- Motor a, a,, b, blClC...Transistor Patent applicant Sanyo Electric Co., Ltd. and 1 other patent attorney Noboru Kono 427-

Claims (1)

[Claims] 1. Binary information regarding ON and OFF of each commutation element is set as unit data to be read simultaneously, and information regarding the duration of ON and OFF is set as the number of units of data to be sequentially read out. Further, a unit data group, the number of which is associated with the difference in the instantaneous value of each phase at a predetermined phase of the three-phase alternating current to be output, is stored for one cycle numerator of the three-phase alternating current for each of the plurality of phases. An inverter control method characterized by sequentially reading unit data groups at a period related to the frequency of three-phase alternating current, and controlling on/off of commutation elements based on the read information.