JPS59105779A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To provide a shutter mechanism within a substrate by setting an overflow control gate between an overflow drain and a light sensor part, detecting the optical charge quantity from the light sensor part and deciding the cut-off period in response to the detected optical charge quantity. CONSTITUTION:In a period X of a frame cycle F, clock pulses phi1 and phi2 are at positive potential ''L'' and ''H'' respectively. Therefore a potential V7 under a channel gate 17 is kept at a level higher than V1 of a light sensor part 11; while V8 under an overflow control gate 18 is set at a level lower than V1. That is, the part 11 is kept at a fixed positive potential and then connected to an overflow drain 13 which holds the lower potential V3. As a result, the electric charge underwent the photoelectric conversion is all absorbed by the drain 13. In a period Y, the sensor part 11 is cut off from a vertical channel part 12 and the drain 13, and the electric charge is stored at the parts 11. The part 11 is connected to the part 12 in a period Z, and therefore, the electric charge stored at the part 11 is led into the part 12.

Description

Detailed Description of the Invention (+) Technical Field The present invention relates to a C0D (charge coupled device) type solid-state imaging device.

(10 Prior Art) This type of solid-state imaging device focuses an image on an imaging substrate on which a large number of optical sensor units that perform photoelectric conversion are arranged on a semiconductor substrate, and each optical sensor unit converts a photoelectric tag into an electric charge. The image signal is taken out to the outside as an image signal in pixel units, and an image is taken depending on the time.

However, when the image pickup board is partially exposed to strong light, the amount of charge that is converted by 13 u tons in the optical sensor section at this location becomes extremely large, and this charge becomes an extra burden and causes damage to the neighboring parts. As a result, the same electric charge as when strong light is applied often occurs in parts of the optical sensor that are not normally exposed to strong light. As a result, an image reproduced using the image signal obtained in this case is subjected to a pluming phenomenon in which white bleeding occurs, thereby degrading the quality of the reproduced image.

In order to suppress such a blooming phenomenon, solid-state imaging devices have appeared that are provided with overflow drains for absorbing the above-mentioned surplus charges at positions close to each original sensor portion of the imaging board.

However, even in such a solid-state imaging device, the upper limit of the amount of IL photocharge obtained from the optical sensor section of the imaging board is set to a constant value, which means that strong image light is incident on the entire imaging board. At 7'Ll, the entire 111 screen had the same brightness, and only a reproduced image with low contrast could be obtained.

Therefore, conventionally, an exposure mechanism such as a mechanical shutter or an aperture has been provided on the imaging board to determine the optimal range of the amount of charge at each optical sensor part of the imaging board.

However, in recent years, there has been a strong demand for smaller and lighter solid-state imaging devices for use in television cameras, etc.
Furthermore, if the device was equipped with the mechanical exposure mechanism as described above, there was a limit to the miniaturization of the device.

011) Purpose of the Invention The present invention has been made in view of the above-mentioned points, and provides a solid-state imaging device having an electric shutter function that functions equivalent to controlling the incident source in an imaging substrate having a semiconductor structure. This is what we provide.

OVJ Structure of the Invention The integrated imaging device of the present invention is provided with an overflow drain that absorbs surplus charge from the optical sensor section at a position close to a part of each sensor arrayed in large numbers on an imaging board having a semiconductor structure. At the same time, an overflow control gate is provided between the overflow drain and the optical sensor section to connect and cut off these, and an image signal is read out from the optical sensor section and a skewer is used to detect the amount of charge. Accordingly, the cutoff period at the gate portion is determined in accordance with this light weight amount.

(V) Embodiment FIG. 1 shows a solid-state PJL imaging device of the present invention. In the figure, (1)a is an imaging board for performing imaging, and its plan view is schematically shown. (21 is the first control board for the imaging board + 11 based on the image signal obtained from the imaging board.
The clock generator (4) of the second clock generator (4) is also the clock generator of the above-mentioned imaging, but the second clock generator of this second clock generator (4)
The duty ratio of the clock φ2 is variably controlled based on the exposure light amount detection signal tL obtained from the first exposure detection cycle (2).

Here, the configuration of the imaging substrate 11) is shown in cross section [4] in FIG.
Please refer to the following for details. In these figures, keC is a semiconductor substrate made of P-type silicon, U...a the substrate [1G
The optical senna section is arranged in rows and columns, and consists of 11-type taste filters into which IJ-type impurities have been introduced. uz... is a horizontal channel part that is continuous along each vertical column of the optical sensor part (]11..., and this channel part 0
..., (Ih process consists of an N-type region into which N-type impurities are introduced. U31V process) The optical sensor section ul...
Overflow drains are arranged along each vertical row of the other sides at one-tail intervals, and the optical sensor section (111...) and each channel section U21...
. . , - are composed of N-type regions, and their respective upper ends are commonly connected and held at a constant positive potential. The side is a channel stopper that extends vertically between the overflow drain (131) and the vertical channel part (12) adjacent thereto, and the P-type semiconductor substrate (101 is further doped with P-type impurities at a high latitude). It consists of the P1 type region introduced at the same time. (15+ is each region u11..., (1
21..., 121%131..., (141...,
It is an insulating film deposited on a semiconductor substrate 11α having a structure made of transparent silicon dioxide, which is subjected to surface oxidation treatment with a substrate force of 0). keii+... are vertical H charge transfer electrode arrays (L61...
The horizontal channel portion 121 and the insulating film are connected to the electrode array U61==, 1ILilrL, and the voltage of the general zCcDp!
It functions as a transfer element. That is, each vertical charge transfer electrode t16+... each electrode uGl...
・By applying two-phase clock pulses (not shown) at the same time, the [K load in each vertical channel section μz is transferred toward the lower end in unit units, and -10,000, horizontal charge transfer is performed. By applying a two-phase clock pulse (not shown) to each electrode (I61...) of the transformer in the electrode +tb+... column, the horizontal channel is connected from the vertical channel portion Qz... Transfers and outputs the charges introduced into the section (lz) toward the left end in unit units. (17)... Each vertical column of the optical sensor section old 1... above the frame and each vertical channel section tta
. . . is a channel gate extending vertically on the insulating film U in a strip-shaped area between and performs coupling and isolation between each original sensor section uII... and each vertical channel section (121.Q81.
. . . is an overflow control cage extending vertically on the insulating film strip at the strip-shaped portion between each vertical row of the optical sensor units till . . . and each overflow drain (141 . . . ) Based on the second clock pulse φ2 obtained from the second clock generator (4), coupling and disconnection between each original sensor a (Stil+... and each overflow drain 041...) is performed.

Next, the operation of the imaging apparatus of the present invention will be described based on the timing diagram of FIG. 6 and the potential diagram of FIG. 4. still,
Here, to simplify the explanation, the imaging board (1) has two rows of 6
It is assumed that a total of six optical sensor units σ-1... are provided.

In such a solid-state imaging device, imaging light is basically always incident on the imaging substrate (1), and is constantly converted into light in each sensor section ttn, as shown in FIG. as.

One screen is captured in units of frame period F.

In period X at the beginning of this frame period F.

The first clock pulse φ1 from the first clock i'E generator t31 has a positive potential of ``L#'', and the second clock pulse φ2 from the second clock generator (41 has a positive potential of ``L#''). It is located at the H level.Depending on this 2'L, the X in Figure 4
As shown in the channel game) (171...lower potential ■7μ original sensor part till... potential v1 is held at a higher level than the overflow control gate eel...lower potential ■8 is the optical sensor The potential level is lower than the potential v1 of part 1....In particular, the original sensor part (Ill...) is held at a constant positive potential, and the overflow drain (connected to 131) which holds an even lower potential V3. [Sa]L.

Therefore, in this period 1tfj
In this case, the electrons compete to absorb all of the overflow beam 1, α, and V.

During the period I\1lVc following this period y'-N171...and overflow control gate u81...both lower potentials ■7, V
The potential of the aH optical sensor part D... is higher than the potential ■1. That is, since the original sensor section (111... is connected to the overflow drain u3... as well as the vertical channel 11N3u21...), during this period Y, the optical sensor lsu... Light tun x dust!t
The magnetic particles accumulated in this optical sensor section 'Ill...' become the energy. At this time, overflow control game) <(81-・Lower potential V 8::7 channel game? (171...Lower potential V7)
Since the potentials of the first and second clock pulses φ1 and φ2 at the %L# level are set so that the VC level is slightly lower than that of the VC level, during this period Y, the 3u sensor section... When electrons are generated in the large area, the surplus electrons exceed the potential V8 below the overflow control gate 081... and the flow drain (13) holds the potential V5.・It will be absorbed by.

Furthermore, in the last period zi/of frame J system 4F9 following this period Y, the first clock pulse φ1['l(
' level and second Glock pulse φ2u a L
# level, and depending on this method, rm is shown on the 41st V, Z
<, Channel Gate Sumi 7)...Lower potential■
7 is at a lower level than the potential V1 of the 9th sensor section uII... Retained.

That is, the original sensor section IJ11... is the vertical channel section μ
2..., so the electrons that were accumulated in each optical sensor gu11... in the previous period Y are guided to the vertical channel section (121...◎) As shown above, for each frame period F, the electrons photoelectrically converted for one period Y in each photosensor section . . .
Vertical channel part uz... in pixel units corresponding to 111
・It will be necessary to start the process.

- 10,000, in the v-A period F, the vertical channel section (12
The electrons for all the pixels (in this case 6 pixels) introduced into the horizontal channel part (n obtained from the left end of the IS A column of electron quantities for six pixels is output as an image signal vout as shown in FIG.

In this way, the image signal ■・1 obtained for each frame period F
1t, is input to the exposure detection circuit (2), and the exposure detection circuit (2) detects the amount of exposure light on the imaging board (1) based on the image signal Vout. The exposure detection circuit (21
For example, a sophisticated device equipped with a sample and hold function is used to detect the peak value for each frame period F, for example, detect Vp of the image signal Vout in FIG. When the value vp is greater than n, which is set as the upper limit of the optimum exposure amount range for Outputs the exposure signal shown.

According to this method, the second clock generator (4) receives the exposure signal from the exposure detection circuit (2) and controls the overflow control gate tts of the imaging board (1) in the next frame period F. The duty ratio of the second clock pulse φ2 applied to the second clock pulse φ2 is determined.

That is, in the case of overexposure, the period X during which the second clock pulse φ2 is at the 'H level in each frame period F is extended. On the other hand, if there is insufficient exposure, the period X will be shortened 11. It becomes a ton.

Therefore, the second clock pulse φ at each frame period F
In order to use the electrons photoelectrically converted in each photosensor section j111... as the image signal Vout, the vertical channel section (period introduced in 121...) is the exposure detection circuit (121...) for the purpose of determining the optimal exposure amount.
2), and is feedback controlled by the second clock generator f4.

In the first embodiment described above, the exposure detection circuit (2) is provided with a sample hold function for detecting the peak value Vp of the frame period wait of the image/fgo signal VOut. 2) Calculate the average value of 4 voltages and 1 shift for each pixel of the image signal Vout within the frame period F,
It is also possible to use a configuration that detects the exposure amount based on this average value. In this case, although the contrast between the brightest and darkest parts of each pixel in one screen is often reduced compared to the above embodiment, even if a specific pixel is very bright, The brightness of other pixels can be set within the optimum brightness range. An overflow drain and an overflow control gate for coupling and blocking the optical sensor section and the overflow drain are provided in a position close to the original sensor section, and detect the original charge read out as an image signal from the above-mentioned original sensor section. Depending on the situation, the cut-off period at the gate is determined according to the amount of photoelectric charge, so depending on the imaging light incident on the semiconductor substrate, the light photoelectrically converted in the sensor section is Among the charges, the photoelectric charges that are photoelectrically converted within the period when the optimum range of exposure light amount can be obtained can be transferred to the outside as an image signal and sent to the outside.Therefore, a mechanical exposure mechanism is added to the imaging board. This makes it possible to control the exposure light intensity and the blooming phenomenon without having to worry about it, and not only can a 5 quality reproduction artist be obtained, but it is also possible to make this type of solid-state imaging device rL much smaller and lighter liquid.

[Brief explanation of the drawing]

Fig. 1 is a schematic drawing of a solid-state plate device of the present invention (IMflll), Fig. 2 is a plan view of a 3MI image substrate used in the present invention, and Figs. 6 and 4 are a diagram of the present invention. They are a timing diagram and a potential diagram related to the device. +11...imaging board, (2)...exposure detection circuit, (
3)...first clock generator, (4)...42 clock generator, 11(1...Dou conductor board, (ID
...Original sensor part, ua'z...Channel e, t1
31... Overflow drain, (141... Channel stopper, (171... Channel gate, u... Overflow control gate.
1 Procedures Amendment (Voluntary) December 1981
4. 1988 Patent 11', N No. 216324 2 Name of the invention Solid-state imaging device, Relationship with the person making the amendment Case Patent application Personal name (188) Sanyo Denki Co., Ltd. 4 Agent Address: 2-18-5, Keihan Hondori, Moriguchi City, Detailed Description of the Invention, column 6 of the specification subject to amendment, Contents of the amendment

Claims (1)

[Claims] 1) A large number of original sensor parts that perform fS electrical conversion are arranged on an imaging board with a semiconductor structure, and the photo charges from each optical sensor part are imaged. In the fan solid-state imaging device that is read as a signal, an overflow drain is provided in a position close to each of the above-mentioned optical sensor sections to absorb the residual iron load from these original sensor sections, and an overflow drain located close to this or the like is provided. The sensor section and the IMI are provided with an overflow control gate that connects and cuts off the optical sensor section and the overflow drain, and is used to detect the amount of photoelectric charge read out as an image signal from each of the optical sensor sections. Therefore, the solid-state imaging device is characterized in that a cutoff period at the gate is determined in accordance with the amount of photocharge, and during this cutoff period, the amount of photocharge obtained from the original sensor section is used as a side effect. Device.