JPS59105746A - Fault detecting system of time division switch - Google Patents

Abstract

PURPOSE:To detect a fault of a message channel of a time division switch with no suppression to be given to the processing capacity of a control part, by transmitting the specific data to the time division switch and comparing the data received from the time division switch with saod transmitted data when a terminal device is kept in an idle state. CONSTITUTION:When the communication is over between terminal devices, a selection circuit 72 of a terminal device 7' transmits the specific data d3 generated from a specific data generating circuit 71 to a time division switch 1 via a converting circuit 73. While a control part 8' actuatea a message channel release processing mechanism 81' and writes addresses a1 and a2 corresponding to each own terminal device on a memory 2 of a talking part to addresses a1' and a2' corresponding to both terminal devices of a message channel control memory 3 respectively. As a result, the data d3 transmitted from the device 7' is written temporarily to the address a1 of the memory 2 and read out to be sent back to the device 7'. At the device 7', a collating circuit 74 collates the data d3 sent back from the switch 1 with the specific data d3 generated from the circuit 71. When the coincidence is obtained, it is decided that the above-mentioned folded message channel is normal.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a fault detection method for a time division switch, particularly in a digital exchange equipped with a one-stage time division switch.
This invention relates to a fault detection method for time-division switches that rationally detects faults occurring in communication paths.

(b) Background of the Technology In small-scale digital exchanges, accommodated subscribers are connected to each other by time-division switches (so-called "single-stage switches") that form a complete connection grid using one stage of channel memory. On the other hand, in recent years, the functions of communication txta have become more sophisticated, and it has become possible to exchange not only voice but also various data such as digital data and facsimile data. There is a chance that it will be accommodated.

(C1 Prior Art and Problems Figure 1 is a diagram showing an example of a failure detection method of a conventional time division switch in this type of digital exchange.
In the figure, a time division switch 1 has a 71-stage configuration including a communication path memory 2 and a communication path control memory 3, and accommodates a terminal device 7 via an interface circuit 6. The counting circuit 5 receives data d sent from each terminal device 7 accommodated therein.
The address a for writing into the communication path memory 2 is supplied to the communication path memory 2 via the selection circuit 4, and the communication path control memory 3
The data d to be delivered to each terminal device 7 accommodated is stored in the communication path memory 2.
The address a read from the address a is supplied to the communication path memory 2 via the selection circuit 4. Each address a' of the communication path control memory 3
The address a of the communication path memory 2 written in the controller 8
controlled by

When the terminal device 7 communicates with an opposite terminal device (not shown), the control unit 8 sets the address a2 corresponding to the opposite terminal device in the 1ll1 channel memory 2 to the address a1° corresponding to the terminal device 7 in the channel control memory 3. Also, the address a1 corresponding to the terminal device 7 in the communication path memory 2 is written to the address corresponding to the opposite terminal device 82'. As a result, the output data dl and d2 of the corresponding terminal device 7 written in the terminal device corresponding addresses a1 and a2 of the channel memory 20 are time-divisionally exchanged and transmitted to the respective opposing terminal devices. When the communication between both terminal devices is completed, the communication path release processing mechanism 8 in the control unit 8
1 writes an uncorresponding address aO that does not correspond to any of the accommodated terminal devices 7 on the communication path memory 2 to both α11.1 and terminal device corresponding addresses a1° and a21 of the communication path control memory 3. As a result, the addresses a1 and a of the communication path memory 2 are
Output data d1 and d of both terminal devices 7 written in 2
2 is not transmitted to either terminal device 7, and the connection between both terminal devices 7 is released. On the other hand, the test processing mechanism 8 in the control section 8
2 separates the communication line leading to the terminal device 7 by controlling the 9J circuit 62 provided in the interface circuit 6 and connects it to the test device 9. By starting the test device 9, the terminal device 7 and the timer are connected. Execute a test of split switch 1.

As is clear from the above explanation, in the conventional failure detection method of a time division switch, the control unit 8 is connected to the test processing mechanism 8.
2, each interface circuit 6 and test bag W9
This has the disadvantage that the processing capacity of the control unit 8 is strained because it detects failures that occur on the communication path of the time division switch 1 and the terminal device 7 by controlling the .

+d) Purpose of the Invention The purpose of the present invention is to eliminate the drawbacks of the conventional time-division switch failure detection method as described above, and to detect failures occurring on the communication path of the time-division switch without burdening the processing capacity of the control unit. The objective is to realize a means for detecting.

(e) Structure of the Invention This object is to provide a digital switching system in which a terminal device is housed in a one-stage time-division switch having a communication path memory and a communication path control memory, in which the terminal device is in an idle state. means for transmitting data in a predetermined code format to the time division switch and means for collating data received from the time division switch with the transmitted data when the communication path in the time division switch is The control unit that controls the settings is provided with means for writing an address corresponding to the terminal device in the communication path memory to an address corresponding to the terminal device in an empty state in the communication path control memory, and writes the address corresponding to the terminal device in the empty state in the communication path control memory. This is achieved by making it possible to detect failures in the return communication path set in the time division switch.

(f) Examples of the invention An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a diagram showing a fault detection method of a time division switch according to an embodiment of the present invention. Note that the same reference numerals indicate the same objects throughout the figures. In FIG. 2, the time division switch 1 has the same configuration as in FIG. 1, but the disconnection circuit 62 (FIG. 1) is removed from the interface circuit 6'', and The test processing mechanism 82 is removed, and the terminal device 7' is further equipped with a specific data generation circuit 71, a selection circuit 72, and a collation circuit 74. In FIG. During communication with the time division switch 1, the addresses a2 and al of the communication path memory 2 corresponding to both terminal devices are stored in the addresses a1° and a2' of the communication path control memory 3, respectively, as described above. 7', since the empty blockage display signal C indicates the blockage state, the selection circuit 72 transmits the output data di of the terminal device 7'' to the time division switch 1 via the 2-wire 4-wire conversion circuit 73, and also The transmission data d2 of the opposite terminal device transmitted from the division switch 1 is received.

When the communication between both terminal devices ends, α111 terminal device 7"
Since the vacant/occupied display signal C indicates the vacant state, the selection circuit 72 sends the specific data d3 in a predetermined code format generated by the specific data generation circuit 71 to the time division switch l via the 2-line and 4-line conversion circuit 73. to communicate. On the other hand, the control unit 8' detecting the end of the communication activates the communication path release processing mechanism 81', and updates the address al corresponding to both terminal devices in the communication path control memory 3.
l and a 21, the non-corresponding address a in FIG.
Instead of O, addresses a1 and a2 corresponding to the respective terminal devices on the communication path memory 2 are written respectively. As a result, a return call path is set in the time division switch l, and the terminal device 7
The specific data d3 sent from the terminal device 7 is once written to the address a1 of the communication path memory 2 and then sent out from the own terminal device 7.
In the terminal device 71, the verification circuit 7
4 compares the specific data d3 returned from the time division switch 1 with the specific data d3 generated by the specific data generating circuit 71, and if the two match, it is determined that the return call path is normal. If the matching circuit 74 detects a discrepancy between the two, it determines that a fault has occurred in one of the return communication paths, and sends out a fault notification signal to notify the user of the terminal device 7°.

As is clear from the above description, according to the present embodiment, the control unit 8' uses the communication path release processing mechanism 81 to set a return communication path to the terminal device 7'' in the idle state, and 7'' sends specific data d3 to the time division switch 1, and detects a failure occurring in the return call path by comparing the specific data d3 sent back via the return call path with the sent specific data d3. You can. As a result, the test processing mechanism 82 of the control unit 8 is not required, and the processing capacity can be effectively utilized.

Note that FIG. 2 is only one embodiment of the present invention, and for example, the configurations of the terminal device 7' and the control unit 8' are not limited to those shown in the figure, and many other modifications may be considered. However, the effects of the present invention do not change in either case.

fgl Effects of the Invention According to the present invention, in the digital exchange, a failure occurring in a communication path in a time division switch can be detected by a terminal device in an idle state without putting pressure on the processing capacity of the control unit. Become.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an example of a conventional fault detection method for a time division switch, and FIG. 2 is a diagram showing a fault detection method for a time division switch according to an embodiment of the present invention. In the figure, ■ is a time division switch, 2 is a communication path memory,
3 is a communication path control memory, 4 and 72 are selection circuits, 5 is a counting circuit, 6 and 6° are interface circuits, 7' and 71 are terminal devices, 8 and 8° are a control section, 9 is a test device, 61 and 73 are two-wire and four-wire conversion circuits, 62 is a cutting circuit, 71 is a specific data generation circuit, 74 is a collation circuit, 8
1 and 81'' are call path release processing mechanisms, 82 is a test processing mechanism, al and a2 are addresses corresponding to the terminal device in the communication path memory, aO is an unsupported address, and aI' and a2'' are communication paths corresponding to the terminal device in the communication path control memory. Address, b is a fault notification signal, C is a blockage display signal, dl and d2 are data, and d3 is specific data. Dream 7 (g Fig. 2)

Claims (1)

[Claims] In a digital switching system in which a terminal device is housed in a one-stage time-division switch having a channel memory and a channel control memory, the terminal device receives a predetermined code format when the terminal device is in an idle state. a controller for controlling the communication path setting in the time-division switch; Means is provided for writing an address corresponding to the terminal device on the communication path memory to an address corresponding to the terminal device in an empty state in the communication path control memory, and a return call is set from the terminal device in an empty state to the time division switch. A fault detection method for a time division switch is characterized in that it is capable of detecting road faults.