JPS5910166A - Triple voltage booster circuit - Google Patents

Abstract

PURPOSE:To accurately obtain triple voltage of DC power source voltage without feedback by sequentially alternately turning ON and OFF five transistors and charging a capacitor. CONSTITUTION:When transistors 13, 17 are turned OFF and transistors 14-16 are turned ON, a capacitor 22 is charged to the voltage of a DC power source 11 in a circuit which has a DC power source 11, an inductance 12, a diode 18, the capacitor 22, and the transistors 16, 14, 15. When the transistors 13, 15 are turned ON and the transistors 14, 16, 17 are turned ON, a capacitor 23 is charged to the voltage of the power source 11. When the transistors 13, 14, 17 are turned ON and the transistors 15, 16 are turned OFF, a capacitor 24 is charged to the voltage of the power source 11. Since the capacitors 22-24 are charged to the voltage of the power source 11, a load voltage becomes triple of the voltage of the power source 11.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit that triples the DC power supply voltage.

Conventionally, a step-up chopper as shown in Figure 1 has been proposed as a circuit that triples the DC power supply voltage, where 1 is a DC power supply, 2 is an inductance, 3 is a transistor, 4 is a diode, and 5 is a capacitor. , 6 is the load. In the figure, when transistor 3 is turned on, DC power supply 1,
Current flows through the inductance 2, transistor 30 circuit, and rises. Here, L is the value of inductance 2, ■ is the DC power supply voltage, and t is the 9" on-time of transistor 3. Now, when t = τ and the current of inductance 2 becomes 1z = Jz, transistor 3 1 off”, the energy station LI stored in the inductance 2
L2 is consumed in a circuit including a diode 4, a capacitor 5, a load 6, a DC power supply 1, and an inductance 2, and the capacitor 5 is charged. In this way, the capacitor 5 is charged as the transistor 306 turns on and off,
Load power = supply power and balance. Therefore, if the supplied power is increased, that is, the inductance 2 is decreased, the supplied energy increases and the voltage of the load 6 increases.

At a certain load, one "on" time τ of transistor 3
If the inductance 2 is appropriately determined, the voltage of the load 6 can be three times the voltage of the DC power supply 1.

However, the disadvantage of the circuit shown in FIG. 1 is that the voltage of the load 6 changes significantly due to fluctuations in the load 6, so the voltage of the load 6 is fed back, and when the load 6 is light, the transistor 2
It is necessary to control the 06 ON period to be short, or to lengthen it when the load is heavy, and a failure of the feedback system becomes a fatal situation.

Also, if the voltage to be boosted is 2000V, for example, 20
There is a drawback that a transistor that can withstand 00V is required.
In reality, multiple transistors must be connected in series to withstand this, and parallel balance resistors, CR absorbers, etc. must be connected to balance turn-on, turn-off, storage time, leakage current, etc. There is. However, it is difficult to achieve a perfect balance, and it depends on the performance of each individual transistor.
It was expensive.

In addition, the loss of the parallel balance resistor and CR absorber cannot be ignored, which causes a decrease in efficiency.

The present invention has been made in order to eliminate the above-mentioned drawbacks inherent in the conventional technology.Therefore, an object of the present invention is to not only enable the use of low voltage transistors, but also to increase the switching speed of a fixed transistor. It is an object of the present invention to provide a novel triple voltage boosting circuit that can triple the voltage without any balance problem and without feedback.

In order to achieve the above object, a circuit according to the present invention includes a series circuit of a DC source and first, second and third semiconductor switches connected to first and second output terminals of the DC power source. and,
first and second diodes connected to the first and second output terminals, respectively, in a forward direction with respect to the DC power supply; and a load connected between the first and second diodes. a series circuit of first, second and third capacitors connected in parallel; a series circuit connected between the midpoints of the first and second semiconductor switches and the midpoints of the first and second capacitors; A fourth diode connected in parallel with a third diode.
a fifth semiconductor switch connected between the midpoints of the second and third semiconductor switches and the midpoints of the second and third capacitors, and a fourth diode connected in antiparallel to the middle point of the second and third semiconductor switches;
It is configured with a semiconductor switch.

A preferred embodiment of the present invention will be explained in detail below with reference to the drawings.

FIG. 2 shows an embodiment of the present invention, which uses direct current! FIG. 3 is a circuit configuration diagram that triples the voltage of the source. In the figure, reference number 11 is a DC source, 12 is an inductance, and 13 to 17
are transistors, 18-21 are diodes, 22-24
25 represents a capacitor, and 25 represents a load.

FIG. 3 shows the base current waveforms for controlling transistors 13 to 17 in the circuit of FIG. , - are the base currents of the transistor 17, respectively.

Further, 1-1 on the horizontal axis indicates a period for explanation.

Now, in FIG. 3, in period I, the base current B,
Since g is at 10" level and current bS'sd is at 4 high level, transistors 13 and 17 are 1" off and transistors 14 to 16 are 6" on. Therefore, the third
In the circuit shown in the figure, a power supply 11, an inductance 12, a diode 18, capacitors 22 to 24, a diode 21
From the steady state, that is, the state in which each of the capacitors 22 to 24 is charged to approximately % of the voltage of the DC power supply 11,
DC power supply 11, inductance 12, diode 18,
The capacitor 22 is charged to the voltage of the DC power supply 11 by a circuit including the capacitor 22 and the transistors 16 and 14.15.

Next, during the period ■ in FIG. 3, the transistor 13.1
5 is "on" and transistors 14, 16, and 17 are "off", so in the circuit of FIG.
, capacitor 23, diode 20, transistor 15
The capacitor 23 is charged to the voltage of the DC power supply 11 in the zero circuit.

Next, in the period (■) of the circuit in Fig. 3, the transistor 1
3.14.17 are "on" and transistors 15.16 are "off", so in the circuit of FIG.
17, a capacitor 24, and a diode 21, the capacitor 24 is charged to the voltage of the DC power supply 11.

In this way, each of the capacitors 22 to 24 is charged up to the voltage of the DC power supply 11 during the period 1-1 of the circuit in FIG. 3, so the load voltage becomes three times the voltage of the DC power supply 11.

The voltages applied to the individual transistors 13 to 17 are the voltages when each transistor is "off",
The period from 1 to (2) in FIG. 3 will be explained as follows.

During period l, the number of transistors that are off is 1.
3.17, and the voltage applied to transistor 13 is equal to the voltage across capacitor 22. The voltage of the transistor 17 is equal to the voltage of the capacitor 23 because the transistors 14 and 16 are turned on.

During period (3), the number of transistors that are off is 16.17 υ, and the voltage applied to transistor 14 is equal to the voltage of capacitor 23. Also, transistor 16.
The voltage applied to 17 is approximately equal to the voltage corresponding to the forward voltage drop of diodes 19 and 20 connected in antiparallel to each other in the opposite direction to the collector-emitter, and is about IV.

During the period (2), the transistors that are "off" are 15.16, and the transistor 17 is "on", so the voltage of the transistor 15 is equal to the voltage of the capacitor 24.The voltage of the transistor 16 is equal to the voltage of the transistor 1.
4.17 is 6" on, so it is equal to the voltage of capacitor 23.

Therefore, the voltage applied to each transistor does not exceed the voltage of the capacitors 22 to 24, that is, the voltage of the DC voltage 11.

As described above, by sequentially turning five transistors "on" and "off", the present invention can accurately obtain a voltage three times the DC power supply voltage without feedback, and Since the DC power supply voltage is applied in a well-balanced manner over time, there is no need for a special balancer resistor or CR absorber; for example, 2000V.
A transistor with a voltage of 666V can be used for a DC output voltage of .

The present invention has been described above with respect to one preferred embodiment thereof, but
These are merely illustrative, and the present invention is not limited only by the embodiments described here, and various modifications and changes as described below can be considered within the scope thereof.

First, the inductance 12 shown in FIG. 2 is used to smooth the current and efficiently charge the capacitor, but it is not necessarily required for operation.

Furthermore, by controlling the rest period between 6 on and off of each transistor, the voltage of the load 25 can be controlled from the voltage of the DC power supply 11 to a voltage three times that voltage.

Furthermore, although the semiconductor switch in this embodiment of FIG. 2 is shown as a transistor, it may also be a MOSFET or SIT.

Similar operations can be performed with semiconductor switches such as GTO and SCR.

In this example, a capacitor 22-J is used as a charging element.
24 is used, but a battery could alternatively be used.

Furthermore, although the DC source 11 is used as a power source in this embodiment, an AC power source and a rectifier circuit may be used instead.

The present invention relates to a triple voltage booster circuit that triples the power supply voltage.
By using the circuit specifically, it is possible to expand the power supply voltage to an N-fold voltage booster circuit that increases the power supply voltage by N times.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a conventional triple voltage booster circuit, FIG. 2 is a configuration diagram showing an embodiment of the triple voltage booster circuit according to the present invention,
FIG. 3 is a diagram showing a base current waveform for controlling the transistor of FIG. 2. 1.11. ,, DC power supply, 2.12. ,, inductance, 3.13-17. ,,transistor,4.18~2
1. , , diode, 5.22-24. ,, capacitor, 6.25. ,,load,am-*F-run raster 13
Base current waveform of transistor 14, C0''-base current waveform of transistor 15, dlo, base current waveform of transistor 16, eon
e) Base current waveform of transistor 17, ■ to I11.
．． ．． ) Period 4 of the operating cycle of transistors 13 to 17 Fig. 1 1 Fig. 2 1 and 1 [ Fig. 3

Claims (4)

[Claims] (1) a series circuit of a DC power supply, first, second and third semiconductor switches connected to the first and second output terminals of the DC power supply; first and second diodes connected in the forward direction with respect to the spinning DC power source; first and second diodes connected between the first and second diodes and with a load connected in parallel; 2
and a series circuit of a third capacitor, and a series circuit of the first and second capacitors.
a semiconductor switch @4 connected between the midpoint of the semiconductor switch and the midpoints of the first and second capacitors, and a third diode connected in antiparallel;
and a fifth semiconductor switch connected between the midpoint of the semiconductor switch and the midpoints of the second and third capacitors, and a fourth diode connected in antiparallel. Voltage boost circuit. (2) The triple voltage booster circuit according to claim (1), further characterized in that an inductance is connected between the first output terminal and the first semiconductor switch. (3) Claim (1) or (2) further characterized in that a battery is used in place of the capacitor.
3-fold voltage booster circuit described in ). (4) Claim 1 further characterized in that an AC power source and a rectifier circuit are used in place of the DC power source! ! (1
) or (2).